Abstract: Provided is an image recognition device. The image recognition device includes a frame data change detector that sequentially receives a plurality of frame data and detects a difference between two consecutive frame data, an ensemble section controller that sets an ensemble section in the plurality of frame data, based on the detected difference, an image recognizer that sequentially identifies classes respectively corresponding to a plurality of section frame data by applying different neural network classifiers to the plurality of section frame data in the ensemble section, and a recognition result classifier that sequentially identifies ensemble classes respectively corresponding to the plurality of section frame data by combining the classes in the ensemble section.

Abstract: Etching compositions are provided. The etching compositions can be used for etching cobalt. The etching compositions may include a chelator, water, an oxidizer, and an organic solvent, and the chelator may include an organic acid, an amine compound and/or a polyhydric alcohol. Water may be present in an amount of 1 wt % to 10 wt % based on a total weight of the etching composition.

Abstract: Disclosed is a simplified sigmoid function circuit which includes a first circuit that performs a computation on input data based on a simplified sigmoid function when a sign of a real region of the input data is positive, a second circuit that performs the computation on the input data based on the simplified sigmoid function when the sign of the real region of the input data is negative, and a first multiplexer that selects and output one of an output of the first circuit and an output of the second circuit, based on the sign of the input data. The simplified sigmoid function is obtained by transforming a sigmoid function of a real region into a sigmoid function of a logarithmic region and performing a variational transformation for the sigmoid function of the logarithmic region.

Abstract: Disclosed is a transmitter which includes a channel driver that includes a pull-up transistor and a pull-down transistor connected between a power node and a ground node and outputs a voltage between the pull-up transistor and the pull-down transistor as a transmit signal, and a pre-driver that controls the pull-up transistor and the pull-down transistor in response to a driving signal and controls the channel driver such that the transmit signal is overshot at a rising edge of the driving signal and the transmit signal is undershot at a falling edge of the driving signal.

Abstract: A disk brake apparatus may include a caliper body installed on the outer circumference of a disk; a piston member installed in the caliper body, and moved by hydraulic pressure; a brake pad pressed toward the disk by the piston member; and a shim plate installed between the piston member and the brake pad, formed in a plate shape, and abutting on a piston contact part installed on a surface of the piston member, facing the brake pad, the shim plate may include a cover shim brought into contact with the piston contact part; and a pad shim stacked on a surface of the cover shim, facing the brake pad, and including an opening formed through a region which overlaps at least a part of the piston contact part.

Abstract: Disclosed are a device and a method for calibrating a reference voltage. The reference voltage calibrating device includes a data signal communication unit that transmits/receives a data signal, a data strobe signal receiving unit that receives a first data strobe signal and a second data strobe signal, a voltage level of the second data strobe signal being opposite to a voltage level of the first data strobe signal, and a reference voltage generating unit that sets a reference voltage for determining a data value of the data signal, based on the first data strobe signal and the second data strobe signal, and the reference voltage generating unit adjusts the reference voltage based on the first data strobe signal and the second data strobe signal.

Abstract: The neuromorphic arithmetic device performs a multiply-accumulate (MAC) calculation using a multiplier and an accumulator. The neuromorphic arithmetic device includes an offset accumulator configured to receive a plurality of offset data measured a plurality of times and accumulate the plurality of offset data, a bit extractor configured to obtain average offset data by extracting at least one first bit from the plurality of accumulated offset data, and a cumulative synapse array configured to accumulate a plurality of multiplication values generated by the multiplier and output a cumulative result of the plurality of multiplication values corrected according to the average offset data.

Abstract: Disclosed are a memory interface circuit including an output impedance monitor, which is capable of monitoring and calibrating an output impedance of a driving circuit in real time, and a method of calibrating the output impedance. The memory interface circuit includes a control circuit that outputs a digital transmission signal, a driving circuit that outputs an output signal, based on the digital transmission signal, an output impedance monitor that outputs a pull-up monitoring signal or a pull-down monitoring signal, based on the digital transmission signal and the output signal, and an output impedance calibrator that outputs an impedance monitoring signal, based on the pull-up monitoring signal or the pull-down monitoring signal, and wherein the driving circuit calibrates output impedance based on the impedance monitoring signal.

Abstract: A method and apparatus for multi-level stepwise quantization for neural network are provided. The apparatus sets a reference level by selecting a value from among values of parameters of the neural network in a direction from a high value equal to or greater than a predetermined value to a lower value, and performs learning based on the reference level. The setting of a reference level and the performing of learning are iteratively performed until the result of the reference level learning satisfies a predetermined value and there is no variable parameter that is updated during learning among the parameters.

Abstract: Disclosed is a receiving circuit, which includes a hysteresis detector that receives an input signal corresponding to a first voltage level and outputs a detection signal having a first threshold voltage and a second threshold voltage, and a level shifter that receives the detection signal, converts the first voltage level of the detection signal to a second voltage level higher than the first voltage level so as to be output as an output signal, and outputs a feedback signal of the second voltage level, and the hysteresis detector receives the feedback signal from the level shifter and adjusts the first threshold voltage and the second threshold voltage based on the feedback signal.

Abstract: Disclosed is a neural network computing device. The neural network computing device includes a neural network accelerator including an analog MAC, a controller controlling the neural network accelerator in one of a first mode and a second mode, and a calibrator that calibrating a gain and a DC offset of the analog MAC. The calibrator includes a memory storing weight data, calibration weight data, and calibration input data, a gain and offset calculator reading the calibration weight data and the calibration input data from the memory, inputting the calibration weight data and the calibration input data to the analog MAC, receiving calibration output data from the analog MAC, and calculating the gain and the DC offset of the analog MAC, and an on-device quantizer reading the weight data, receiving the gain and the DC offset, generating quantized weight data, based on the gain and the DC offset.

Abstract: Disclosed are a memory interface circuit including an output impedance monitor, which is capable of monitoring and calibrating an output impedance of a driving circuit in real time, and a method of calibrating the output impedance. The memory interface circuit includes a control circuit that outputs a digital transmission signal, a driving circuit that outputs an output signal, based on the digital transmission signal, an output impedance monitor that outputs a pull-up monitoring signal or a pull-down monitoring signal, based on the digital transmission signal and the output signal, and an output impedance calibrator that outputs an impedance monitoring signal, based on the pull-up monitoring signal or the pull-down monitoring signal, and wherein the driving circuit calibrates output impedance based on the impedance monitoring signal.

Abstract: Disclosed are a device and a method for calibrating a reference voltage. The reference voltage calibrating device includes a data signal communication unit that transmits/receives a data signal, a data strobe signal receiving unit that receives a first data strobe signal and a second data strobe signal, a voltage level of the second data strobe signal being opposite to a voltage level of the first data strobe signal, and a reference voltage generating unit that sets a reference voltage for determining a data value of the data signal, based on the first data strobe signal and the second data strobe signal, and the reference voltage generating unit adjusts the reference voltage based on the first data strobe signal and the second data strobe signal.

Abstract: Provided is an image recognition device. The image recognition device includes a frame data change detector that sequentially receives a plurality of frame data and detects a difference between two consecutive frame data, an ensemble section controller that sets an ensemble section in the plurality of frame data, based on the detected difference, an image recognizer that sequentially identifies classes respectively corresponding to a plurality of section frame data by applying different neural network classifiers to the plurality of section frame data in the ensemble section, and a recognition result classifier that sequentially identifies ensemble classes respectively corresponding to the plurality of section frame data by combining the classes in the ensemble section.

Abstract: The neuromorphic arithmetic device comprises an input monitoring circuit that outputs a monitoring result by monitoring that first bits of at least one first digit of a plurality of feature data and a plurality of weight data are all zeros, a partial sum data generator that skips an arithmetic operation that generates a first partial sum data corresponding to the first bits of a plurality of partial sum data in response to the monitoring result while performing the arithmetic operation of generating the plurality of partial sum data, based on the plurality of feature data and the plurality of weight data, and a shift adder that generates the first partial sum data with a zero value and result data, based on second partial sum data except for the first partial sum data among the plurality of partial sum data and the first partial sum data generated with the zero value.

Abstract: The neuromorphic arithmetic device performs a multiply-accumulate (MAC) calculation using a multiplier and an accumulator. The neuromorphic arithmetic device includes an offset accumulator configured to receive a plurality of offset data measured a plurality of times and accumulate the plurality of offset data, a bit extractor configured to obtain average offset data by extracting at least one first bit from the plurality of accumulated offset data, and a cumulative synapse array configured to accumulate a plurality of multiplication values generated by the multiplier and output a cumulative result of the plurality of multiplication values corrected according to the average offset data.

Abstract: An analog-to-digital converter includes a capacitor array including capacitors, an amplifier receiving an input current through an input node and integrating the input current, using the capacitor array, in a first mode, a switch array including switches respectively connected to the capacitors, successive approximation logic performing a successive approximation by selectively connecting each of the capacitors to one of a common voltage and a reference voltage through the switches, in a second mode, a comparator comparing the common voltage with an output of the amplifier and output a pulse signal based on the comparison result, a counter counting the pulse signal in the first mode, a register sequentially storing values of the pulse signal, in the second mode, and error correction logic storing an output of the counter as upper bits and an output of the register as lower bits and performing error correction.

Abstract: Provided are an object recognition device, an autonomous driving system including the same, and an object recognition method using the object recognition device. The object recognition device includes an object frame information generation unit, a frame analysis unit, an object priority calculator, a frame complexity calculator, and a mode control unit. The object frame information generation unit generates object frame information based on a mode control signal. The frame analysis unit generates object tracking information based on object frame information. The object priority calculator generates based on object tracking information. The frame complexity calculator generates a frame complexity based on object tracking information. The mode control unit generates a mode control signal for adjusting an object recognition range and a calculation amount of the object frame information generation unit based on the priority information, the frame complexity, and the resource occupation state.

Abstract: The present disclosure relates to a microphone driving device and a digital microphone including the same. A microphone driving device according to an embodiment of the inventive concept includes a voltage-to-current converter, a current-to-voltage converter, an analog-to-digital converter, a digital amplification unit, and a gain controller. The voltage-to-current converter converts an acoustic signal to an output current signal based on a gain control signal. The current-to-voltage converter converts the output current signal to an amplified voltage signal. The analog-to-digital converter converts the amplified voltage signal to a digital signal. The digital amplification unit amplifies the digital signal to an amplified digital signal based on the gain control signal. The gain controller generates a gain control signal. The microphone driving device and the digital microphone including the same according to the inventive concept may have a wide dynamic range and reduce the influence of noise.

Abstract: The inventive concept relates to a body composition analysis system. A body composition analysis system according to an embodiment of the inventive concept includes a sinusoidal signal generator, a synchronous detector, and a bioimpedance analyzer. The sinusoidal signal generator converts a digital sinusoidal signal having a target frequency into an analog sinusoidal signal. The synchronous detector extracts a target frequency component of a bioelectrical signal generated in response to an analog sinusoidal signal based on the digital sinusoidal signal. The bioimpedance analyzer calculates the bioimpedance based on the target frequency component of the bioelectrical signal. According to the inventive concept, it is possible to improve the selectivity for extracting the target frequency component of the bioelectrical signal and to reduce the area and variations of characteristics for the implementation of the integrated circuit.