Patents by Inventor Min Li

Min Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200190486
    Abstract: Disclosed is a modified microorganism producing putrescine or ornithine, and a method for producing putrescine or ornithine using the same.
    Type: Application
    Filed: February 28, 2020
    Publication date: June 18, 2020
    Inventors: Su Jin PARK, Young Lyeol YANG, Hye Won UM, Hong Xian LI, Kyoung Min LEE, Baek Seok LEE, Hyo Hyoung LEE, Hee Kyoung JUNG
  • Publication number: 20200182179
    Abstract: Technical methods described herein include an emissions control system for treating exhaust gas from an internal combustion engine in a motor vehicle. The emissions control system includes a three-reaction oxygen storage model. The system further includes a three-way catalyst and a controller that controls an oxygen storage level for the three-way catalyst. The controller determines a first reaction rate representing a net rate of cerium oxidation by oxygen, a second reaction rate representing a net rate of cerium reduction by carbon monoxide, and a third reaction rate representing a net rate of cerium reduction by hydrogen. The controller further determines the oxygen storage level based on the first reaction rate, the second reaction rate, and the third reaction rate.
    Type: Application
    Filed: December 11, 2018
    Publication date: June 11, 2020
    Inventors: Gongshin Qi, Sergio A. Mendoza Galvis, Se H. Oh, Min Sun, Wei Li, Patricia A. Mulawa
  • Publication number: 20200186915
    Abstract: A speaker unit for a vehicle includes a subwoofer unit for outputting sound in a base sound region, an amplifier (AMP) circuit unit mounted on a side of the subwoofer unit for amplifying an acoustic current signal and supplying the amplified acoustic current signal to the subwoofer unit, and an amplifier protection cover unit coupled to the subwoofer unit at one side of the subwoofer unit and configured to cover the amplifier circuit unit.
    Type: Application
    Filed: February 5, 2019
    Publication date: June 11, 2020
    Inventors: Keunsang Woo, Zhe Li, Min Wu, Jeongtae Lee
  • Publication number: 20200185941
    Abstract: A charger adapted to charge either one of a first battery pack and a second battery pack. The first battery pack and the second battery pack have respectively a first interface and a second interface being substantially different from each other. The charger includes a housing having a receiving area in which the first battery pack and the second battery pack can be selectively received in such a way that the first battery pack is accommodated in a first region and the second battery pack is accommodated in a second region. The receiving area is at least partially defined by the first region partially overlapping the second region. The charger according to the invention is adapted to charge more than one type of battery pack, which saves cost and space needed for two separate chargers.
    Type: Application
    Filed: July 4, 2018
    Publication date: June 11, 2020
    Inventors: Hei Man Raymond LEE, Yong Min LI, Ming Jun ZHUANG
  • Publication number: 20200181661
    Abstract: The present disclosure relates to a novel polypeptide having an ability to export an ornithine-based product, and a method for producing an ornithine-based product using the same.
    Type: Application
    Filed: June 14, 2018
    Publication date: June 11, 2020
    Inventors: Seon Hye KIM, Su Jin PARK, Kyoung Min LEE, Kyungsu NA, Hong Xian LI, Hyun-jung BAE, Jihyun SHIM, Young Lyeol YANG, Hye Won UM, Hyo Hyoung LEE, Min Gyeong KANG, Hye Won KIM, Byeong Cheol SONG, Haena OH, Han Hyoung LEE
  • Patent number: 10680498
    Abstract: A motor includes a rotor and a stator. The stator includes a stator core, stator windings wound around the stator core and a circuit board fixed relative to the stator core. The circuit board includes a motor control circuit. The motor control circuit includes a magnetic sensor integrated circuit magnetically coupled with the rotor to detect a position of a magnetic pole of the rotor. The magnetic sensor integrated circuit includes a package housing near the magnetic poles of the rotor, an electronic circuit provided in the package housing, and a plurality of pins extending from the package housing and soldered on the circuit board. An electric equipment with the motor is also provided.
    Type: Grant
    Filed: April 11, 2018
    Date of Patent: June 9, 2020
    Assignee: JOHNSON ELECTRIC INTERNATIONAL AG
    Inventors: Min Li, Xiaolin Zhang, Shaopeng Mo
  • Patent number: 10679780
    Abstract: A composite soft magnetic material includes the following components: 67.9 to 95.54 wt % of FeSiCr, 0.1 to 0.3 wt % of TiO2, 0.15 to 0.75 wt % of SiO2, 0.1 to 0.5 wt % of Mn3O4, 0.1 to 0.5 wt % of ZnO, 3.4 to 25.9 wt % of BaO, 0.4 to 3 wt % of B2O3, 0.2 to 0.85 wt % of CaO, and 0.01 to 0.3 wt % of CuO. The composite soft magnetic material has high initial permeability and high Bs, excellent temperature stability, and low temperature coefficient.
    Type: Grant
    Filed: January 8, 2018
    Date of Patent: June 9, 2020
    Assignee: Shenzhen Sunlord Electronics Co., Ltd.
    Inventors: Min Tan, Min Nie, Youyun Li
  • Patent number: 10678124
    Abstract: Provided is a method for manufacturing a color filter substrate including a base substrate, a black matrix layer and a plurality of color pixel units, and the color pixel unit including sub-pixel units of at least three colors. The method for manufacturing a color filter substrate includes: providing a base substrate; and forming a black matrix layer and the plurality of color pixel units on the base substrate, wherein the forming of the plurality of color pixel units includes: depositing an irreversible temperature-change material on the base substrate; and heating the irreversible temperature-change material to form sub-pixel units of at least two colors in the color pixel unit.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: June 9, 2020
    Assignees: BOE TECHNOLOGY GROUP CO., LTD., CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Xiongzhou Wei, Min Li, Qiang Xiong, Jiaqi Pang, Chao Liu, Bin Wan, Hongyu Sun, Ruilin Bi
  • Publication number: 20200177353
    Abstract: This application provides a reference signal sending and receiving method, a network device, a terminal device, and a system, to be applicable to resource configuration for an SRS in NR. The method includes: sending, by a terminal device, a sounding reference signal SRS based on a location of a starting subcarrier for transmitting the SRS, where the location of the starting subcarrier for transmitting the SRS is determined by an offset of a sounding region, the offset of the sounding region indicates a resource offset between a starting subcarrier of the sounding region and a starting subcarrier of a bandwidth part BWP of the terminal device, and the sounding region is a resource that can be used to transmit the SRS.
    Type: Application
    Filed: February 11, 2020
    Publication date: June 4, 2020
    Inventors: Mengying DING, Yuanzhou HU, Yi QIN, Zhongfeng LI, Min ZHANG, Weimin XIAO, Shengyue DOU
  • Publication number: 20200174843
    Abstract: Direct inter-processor communication is enabled with respect to data in a memory location without having to switch specific circuits through a switching element (e.g., an optical switch). Rather, in this approach a memory pool is augmented to include a dedicated portion that serves as a disaggregated memory common space for communicating processors. The approach obviates the requirement of switching of physical memory modules through the optical switch to enable the processor-to-processor communication. Rather, processors (communicating with another) have an overlapping ability to access the same memory module in the pool; thus, there is no longer a need to change physical optical switch circuits to facilitate the inter-processor communication. The disaggregated memory common space is shared among the processors, which can access the common space for reads and writes, although particular locations in the memory common space for reads and writes are different.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Yaoping RUAN, John A. BIVENS, Min LI, Ruchi MAHINDRU, HariGovind V. RAMASAMY, Valentina SALAPURA, Eugen SCHENFELD
  • Publication number: 20200176024
    Abstract: A hard magnet stabilization scheme is disclosed for a top shield and junction shields for double or triple dimension magnetic reader structures. In one design, the hard magnet (HM) adjoins a top or bottom surface of all or part of a shield domain such that the HM is recessed from the air bearing surface to satisfy reader-to-reader spacing requirements and stabilizes a closed loop magnetization in the top shield. The HM may have a height and width greater than that of the top shield. The top shield may have a ring shape with a HM formed above, below, or within the ring shape, and wherein the HM stabilizes a vortex magnetization. HM magnetization is set or reset from room temperature to 100° C. to maintain a desired magnetization direction in the top shield, junction shield, and free layer in the sensor.
    Type: Application
    Filed: February 7, 2020
    Publication date: June 4, 2020
    Inventors: Junjie Quan, Glen Garfunkel, Yewhee Chye, Kunliang Zhang, Min Li
  • Publication number: 20200174838
    Abstract: Server resources in a data center are disaggregated into shared server resource pools, including an accelerator (e.g., FPGA) pool. Servers are constructed dynamically, on-demand and based on workload requirements, by allocating from these resource pools. According to this disclosure, accelerator utilization in the data center is managed proactively by assigning accelerators to workloads in a fine granularity and agile way, and de-provisioning them when no longer needed. In this manner, the approach is especially advantageous to automatically provision accelerators for data analytic workloads. The approach thus provides for a “micro-service” enabling data analytic workloads to automatically and transparently use FPGA resources without providing (e.g., to the data center customer) the underlying provisioning details. Preferably, the approach dynamically determines the number and the type of FPGAs to use, and then during runtime auto-scales the FPGAs based on workload.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Min LI, John A. BIVENS, Ruchi MAHINDRU, HariGovind V. RAMASAMY, Yaoping RUAN, Valentina SALAPURA, Eugen SCHENFELD
  • Publication number: 20200176508
    Abstract: A micro semiconductor structure is provided. The micro semiconductor structure includes a substrate, a plurality of micro semiconductor devices disposed on the substrate, and a first supporting layer disposed between the substrate and the micro semiconductor devices. Each of the micro semiconductor devices has a first electrode and a second electrode disposed on a lower surface of the micro semiconductor devices. The lower surface includes a region, wherein the region is between the first electrode and the second electrode. An orthographic projection of the first supporting layer on the substrate at least overlaps an orthographic projection of a portion of the region on the substrate. The first supporting layer directly contacts the region.
    Type: Application
    Filed: June 7, 2019
    Publication date: June 4, 2020
    Applicant: PlayNitride Display Co., Ltd.
    Inventors: Chih-Ling WU, Ying-Tsang LIU, Pei-Hsin CHEN, Yi-Chun SHIH, Yi-Ching CHEN, Yu-Chu LI, Huan-Pu CHANG, Yu-Yun LO, Yi-Min SU, Tzu-Yang LIN, Yu-Hung LAI
  • Publication number: 20200175588
    Abstract: The present disclosure relates to blockchain-based payments. In some aspects, a financial institution node of a blockchain network obtains target purchase data. The target purchase data includes attribute data of a target object to be purchased by a buyer using a buyer client device communicatively connected to a commerce platform node of the blockchain and identity information data of the buyer. The attribute data of the target object includes a name and price information of the target object. The identity information data is registered with a commerce platform. The financial institution node performs, based on the target purchase data, a credit check to determine whether the buyer qualifies for a loan. In response to determining that the buyer qualifies for the loan, the financial institution node transfers a loan to an account of the commerce platform.
    Type: Application
    Filed: February 7, 2020
    Publication date: June 4, 2020
    Applicant: Alibaba Group Holding Limited
    Inventor: Min Li
  • Publication number: 20200174847
    Abstract: MapReduce processing is carried out in a disaggregated compute environment comprising a set of resource pools that comprise a processor pool, and a memory pool. Upon receipt of a MapReduce job, a task scheduler allocates resources from the set of resource pools, the resources including one or more processors drawn from the processor pool, and one or more memory modules drawn from the memory pool. The task scheduler then schedules a set of tasks required by the MapReduce job. At least one particular task in the set is scheduled irrespective of a location of data required for the particular task. In association with a shuffle phase of the MapReduce job, and in connection with the particular task, at least one connection between a processor and at least one memory module is dynamically rewired based on the location of the data required for the particular task, thereby obviating network transfer of that data.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Min LI, John A. BIVENS, Ruchi MAHINDRU, HariGovind V. RAMASAMY, Yaoping RUAN, Valentina SALAPURA, Eugen SCHENFELD
  • Publication number: 20200174899
    Abstract: A new approach to resiliency management is provided in a data center wherein servers are constructed dynamically, on-demand and based on workload requirements and a tenant's resiliency requirements by allocating resources from these pools. In this approach, a set of functionally-equivalent “interchangeable compute units” (ICUs) are composed of resources from resource pools that have been extended to include not only different resource types (CPU, memory, accelerators), but also resources of different specifications (specs) and flavors. As a workload is being processed, the health or status of the resources are monitored. Upon a performance issue or failure event, a resiliency manager can swap out a current ICU and replace it with a functionally-equivalent ICU. Preferably, individual ICUs are hosted on one of: resources of a same type each with different specifications, and resources of a same type and specification and different flavors.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: HariGovind V. RAMASAMY, Eugen SCHENFELD, Valentina SALAPURA, John A. BIVENS, Min LI, Ruchi MAHINDRU, Yaoping RUAN
  • Publication number: 20200174949
    Abstract: Server resources in a data center are disaggregated into shared server resource pools, which include a pool of secure processors. Advantageously, servers are constructed dynamically, on-demand and based on a tenant's workload requirements, by allocating from these resource pools. According to this disclosure, secure processor modules for new servers are allocated to provide security for data-in-use (and data-at-rest) in a dynamic fashion so that virtual and non-virtual capacity can be adjusted in the disaggregate compute system without any downtime, e.g., based on workload security requirements and data sensitivity characteristics. The approach herein optimizes an overall utilization of an available secure processors resource pool in the disaggregated environment. The resulting disaggregate compute system that is configured according to the approach cryptographically-protects workload data whenever it is outside the CPU chip.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: HariGovind V. RAMASAMY, Eugen SCHENFELD, Valentina SALAPURA, John A. BIVENS, Yaoping RUAN, Min LI, Ashish KUNDU, Ruchi MAHINDRU, Richard H. BOIVIE
  • Publication number: 20200175183
    Abstract: A group of processors in a processor pool comprise a secure “enclave” in which user code is executable and user data is readable solely with the enclave. This is facilitated through the key management scheme described that includes two sets of key-pairs, namely: a processor group key-pair, and a separate user key-pair (typically one per-user, although a user may have multiple such key-pairs). The processor group key-pair is associated with all (or some define subset of) the processors in the group. This key-pair is used to securely communicate a user private key among the processors. The user private key, however, is not transmitted to non-members of the group. Further, preferably the user private key is refreshed periodically or upon any membership change (in the group) to ensure that non-members or ex-members cannot decipher the encrypted user key.
    Type: Application
    Filed: November 29, 2018
    Publication date: June 4, 2020
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: HariGovind V. RAMASAMY, John A. BIVENS, Ruchi MAHINDRU, Valentina SALAPURA, Min LI, Yaoping RUAN, Eugen SCHENFELD
  • Publication number: 20200172529
    Abstract: Provided are a pyrimidinyl amino compound having protein kinase inhibitor activity, and a pharmaceutical composition containing said compound; also provided are a use and application of said compound. What is provided is selected from a group consisting of the compound represented by formula (I), a stereoisomer thereof, a tautomer thereof, a pharmacologically acceptable salt thereof, a solvate thereof, and a prodrug thereof. The described compound has good inhibitory activity against the JAK family of kinases and the SYK family of kinases, and therefore may serve as a JAK inhibitor and SYK inhibitor, and is effective in use for the prevention or treatment of diseases related to the JAK and SYK families of kinases.
    Type: Application
    Filed: August 17, 2018
    Publication date: June 4, 2020
    Applicant: Beijing Hanmi Pharm. Co., Ltd.
    Inventors: Tao ZHAO, Dong WEI, Min LI, Maeng Sup KIM, Chul Woong CHUNG
  • Patent number: 10671557
    Abstract: Embodiments are provided herein for efficient component communication and resource utilization in a disaggregated computing system. A general purpose link is provided between a plurality of devices in the disaggregated computing system such that the general purpose link is used to connect the plurality of devices. For those of the plurality of devices communicating with one another within a same pool, the connection of the general purpose link is established using a backplane to facilitate the communication; and for those of the plurality of devices communicating with one another within differing pools, the connection of the general purpose link is established through an optical switching device to facilitate the communication.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: June 2, 2020
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Min Li, John A. Bivens, Ruchi Mahindru, Valentina Salapura, Eugen Schenfeld