Patents by Inventor Min-Yong Lee
Min-Yong Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10868038Abstract: A memory device may include multiple channel regions extending in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode layers and a plurality of insulating layers stacked on the substrate to be adjacent at least a portion of the plurality of channel regions, an interlayer insulating layer disposed on the plurality of gate electrode layers, a plurality of cell contact plugs passing through the interlayer insulating layer. Each of the plurality of cell contacts is connected to each of the plurality of gate electrode layers. A vertical insulating layer extends from the interlayer insulating layer disposed between the plurality of channel regions and the plurality of cell contact plugs and has a portion surrounded by at least one of the plurality of gate electrode layers.Type: GrantFiled: July 9, 2019Date of Patent: December 15, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seok Cheon Baek, Young Woo Kim, Dong Sik Lee, Min Yong Lee, Woong Seop Lee
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Patent number: 10844956Abstract: A piston ring for an engine includes a compression ring fitted into one of a plurality of ring grooves of a piston head, wherein the compression ring has a first section of which a cross-section has a quadrangular shape and a second section of which a cross-section has an internal bevel shape having a bevel surface on a top corner of an inner peripheral surface, the first section and the second section alternately arranged along a circumferential direction of the piston ring.Type: GrantFiled: June 8, 2018Date of Patent: November 24, 2020Assignees: Hyundai Motor Company, Kia Motors CorporationInventor: Min Yong Lee
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Publication number: 20200332683Abstract: An apparatus for controlling oil pump pressure includes a sensor for sensing knocking of an engine, an oil pump configured to determine a pressure for discharging engine oil toward a piston of the engine, and a control unit configured to control the pressure of the engine oil discharged toward the piston by determining whether the knocking occurs based on a parameter transmitted from the sensor for determining whether the knocking occurs, and by controlling the oil pump based on whether the knocking occurs in the engine.Type: ApplicationFiled: August 19, 2019Publication date: October 22, 2020Inventors: Min Yong Lee, Seong Sik Kim, Jun Sik Park
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Publication number: 20190333935Abstract: A memory device may include multiple channel regions extending in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode layers and a plurality of insulating layers stacked on the substrate to be adjacent at least a portion of the plurality of channel regions, an interlayer insulating layer disposed on the plurality of gate electrode layers, a plurality of cell contact plugs passing through the interlayer insulating layer. Each of the plurality of cell contacts is connected to each of the plurality of gate electrode layers. A vertical insulating layer extends from the interlayer insulating layer disposed between the plurality of channel regions and the plurality of cell contact plugs and has a portion surrounded by at least one of the plurality of gate electrode layers.Type: ApplicationFiled: July 9, 2019Publication date: October 31, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seok Cheon BAEK, Young Woo Kim, Dong Sik Lee, Min Yong Lee, Woong Seop Lee
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Publication number: 20190257424Abstract: A piston ring for an engine includes a compression ring fitted into one of a plurality of ring grooves of a piston head, wherein the compression ring has a first section of which a cross-section has a quadrangular shape and a second section of which a cross-section has an internal bevel shape having a bevel surface on a top corner of an inner peripheral surface, the first section and the second section alternately arranged along a circumferential direction of the piston ring.Type: ApplicationFiled: June 8, 2018Publication date: August 22, 2019Inventor: Min Yong LEE
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Patent number: 10373975Abstract: A memory device may include multiple channel regions extending in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode layers and a plurality of insulating layers stacked on the substrate to be adjacent at least a portion of the plurality of channel regions, an interlayer insulating layer disposed on the plurality of gate electrode layers, a plurality of cell contact plugs passing through the interlayer insulating layer. Each of the plurality of cell contacts is connected to each of the plurality of gate electrode layers. A vertical insulating layer extends from the interlayer insulating layer disposed between the plurality of channel regions and the plurality of cell contact plugs and has a portion surrounded by at least one of the plurality of gate electrode layers.Type: GrantFiled: October 17, 2018Date of Patent: August 6, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Seok Cheon Baek, Young Woo Kim, Dong Sik Lee, Min Yong Lee, Woong Seop Lee
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Publication number: 20190051664Abstract: A memory device may include multiple channel regions extending in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode layers and a plurality of insulating layers stacked on the substrate to be adjacent at least a portion of the plurality of channel regions, an interlayer insulating layer disposed on the plurality of gate electrode layers, a plurality of cell contact plugs passing through the interlayer insulating layer. Each of the plurality of cell contacts is connected to each of the plurality of gate electrode layers. A vertical insulating layer extends from the interlayer insulating layer disposed between the plurality of channel regions and the plurality of cell contact plugs and has a portion surrounded by at least one of the plurality of gate electrode layers.Type: ApplicationFiled: October 17, 2018Publication date: February 14, 2019Inventors: SEOK CHEON BAEK, YOUNG WOO KIM, DONG SIK LEE, MIN YONG LEE, WOONG SEOP LEE
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Patent number: 10128263Abstract: A memory device may include multiple channel regions extending in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode layers and a plurality of insulating layers stacked on the substrate to be adjacent at least a portion of the plurality of channel regions, an interlayer insulating layer disposed on the plurality of gate electrode layers, a plurality of cell contact plugs passing through the interlayer insulating layer. Each of the plurality of cell contacts is connected to each of the plurality of gate electrode layers. A vertical insulating layer extends from the interlayer insulating layer disposed between the plurality of channel regions and the plurality of cell contact plugs and has a portion surrounded by at least one of the plurality of gate electrode layers.Type: GrantFiled: July 29, 2016Date of Patent: November 13, 2018Assignee: Samsung Electronics Co., Ltd.Inventors: Seok Cheon Baek, Young Woo Kim, Dong Sik Lee, Min Yong Lee, Woong Seop Lee
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Publication number: 20170191187Abstract: The present disclosure relates to a single crystal metal film containing hydrogen atoms or hydrogen ions, which is oriented only in the (111) crystal plane on a substrate or without a substrate, and a method for preparing the same. According to the present disclosure, a single crystal metal film containing hydrogen atoms or hydrogen ions, which is oriented only in the (111) crystal plane, can be formed in various shapes such as a foil, a plate, a block or a tube even without an expensive substrate only by heat-treating a metal precursor having crystallinity and preference for orientation in the crystal plane under a hydrogen atmosphere. Because electrical conductivity is improved due to the contained hydrogen atoms or hydrogen ions, the single crystal metal film can be used as a material for a display driver IC, a semiconductor device, a lithium secondary battery, a fuel cell, a solar cell or a gas sensor.Type: ApplicationFiled: June 3, 2015Publication date: July 6, 2017Applicant: IUCF-HYU (INDUSTRY-UNIVERSITY COOPERATION FOUNDATION HANYANG UNIVERSITY)Inventors: Ho Bum PARK, Min Yong LEE, Sunmi PARK, Hee Wook YOON, Hansu KIM
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Publication number: 20170186767Abstract: A memory device may include multiple channel regions extending in a direction perpendicular to an upper surface of a substrate, a plurality of gate electrode layers and a plurality of insulating layers stacked on the substrate to be adjacent at least a portion of the plurality of channel regions, an interlayer insulating layer disposed on the plurality of gate electrode layers, a plurality of cell contact plugs passing through the interlayer insulating layer. Each of the plurality of cell contacts is connected to each of the plurality of gate electrode layers. A vertical insulating layer extends from the interlayer insulating layer disposed between the plurality of channel regions and the plurality of cell contact plugs and has a portion surrounded by at least one of the plurality of gate electrode layers.Type: ApplicationFiled: July 29, 2016Publication date: June 29, 2017Inventors: Seok Cheon BAEK, YOUNG WOO KIM, DONG SIK LEE, MIN YONG LEE, WOONG SEOP LEE
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Publication number: 20160372595Abstract: A semiconductor substrate and a fabrication method thereof, and a semiconductor apparatus using the same and a fabrication method thereof are provided. The semiconductor substrate includes a semiconductor wafer, a silicon germanium (SiGe)-based impurity doping region formed on the semiconductor wafer, and a protection layer formed on the SiGe-based impurity doping region.Type: ApplicationFiled: August 29, 2016Publication date: December 22, 2016Inventors: Jong Chul LEE, Min Yong LEE, Jin Ku LEE
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Patent number: 9431418Abstract: A vertical memory device and a method of manufacturing a vertical memory device are disclosed. The vertical memory device includes a substrate, a plurality of channels, a charge storage structure, a plurality of gate electrodes, a first semiconductor structure, and a protection layer pattern. The substrate includes a first region and a second region. The plurality of channels is disposed in the first region. The plurality of channels extends in a first direction substantially perpendicular to a top surface of the substrate. The charge storage structure is disposed on a sidewall of each channel. The plurality of gate electrodes is arranged on a sidewall of the charge storage structure and is spaced apart from each other in the first direction. The first semiconductor structure is disposed in the second region. The protection layer pattern covers the first semiconductor structure. The protection layer pattern has a thickness substantially similar to a thickness of a lowermost gate electrode.Type: GrantFiled: April 28, 2015Date of Patent: August 30, 2016Assignee: Samsung Electronics Co., Ltd.Inventors: Won-Seok Jung, Chang-Seok Kang, Min-Yong Lee, Sang-Woo Jin
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Publication number: 20160108546Abstract: The present invention relates to a large-area single-crystal monolayer graphene film in which a graphene layer is formed on a single-crystal metal catalyst layer whose crystal plane orientation is (111) optionally on a substrate. In the large-area single crystal monolayer graphene film of the present invention, a single-crystal metal catalyst layer whose crystal plane orientation is (111) can be formed in the shape of a foil, plate, block or tube optionally on a substrate and a graphene layer is formed on the catalyst layer. The present invention also relates to a method for producing a large-area single-crystal monolayer graphene film whose crystal plane orientation is (111) by annealing and chemical vapor deposition of a metal precursor.Type: ApplicationFiled: May 21, 2014Publication date: April 21, 2016Inventors: Ho Bum PARK, Hansu KIM, Hee Wook YOON, Sun Mi PARK, Min Yong LEE
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Patent number: 9305775Abstract: An access device having a reduced height and capable of suppressing leakage current, a method of fabricating the same, and a semiconductor memory device including the same, are provided. The access device may include a stacked structure including a first-type semiconductor layer having a first dopant, a second-type semiconductor layer having a second dopant, and a third-type semiconductor layer. A first counter-doping layer, having a counter-dopant to the first dopant, is interposed between the first-type semiconductor layer and the third-type semiconductor layer. A second counter-doping layer, having a counter-dopant to the second dopant, is interposed between the third-type semiconductor layer and the second-type semiconductor layer.Type: GrantFiled: March 25, 2015Date of Patent: April 5, 2016Assignee: SK Hynix Inc.Inventors: Young Ho Lee, Keum Bum Lee, Min Yong Lee, Hyung Suk Lee, Seung Beom Baek
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Publication number: 20150372004Abstract: A vertical memory device and a method of manufacturing a vertical memory device are disclosed. The vertical memory device includes a substrate, a plurality of channels, a charge storage structure, a plurality of gate electrodes, a first semiconductor structure, and a protection layer pattern. The substrate includes a first region and a second region. The plurality of channels is disposed in the first region. The plurality of channels extends in a first direction substantially perpendicular to a top surface of the substrate. The charge storage structure is disposed on a sidewall of each channel. The plurality of gate electrodes is arranged on a sidewall of the charge storage structure and is spaced apart from each other in the first direction. The first semiconductor structure is disposed in the second region. The protection layer pattern covers the first semiconductor structure. The protection layer pattern has a thickness substantially similar to a thickness of a lowermost gate electrode.Type: ApplicationFiled: April 28, 2015Publication date: December 24, 2015Inventors: Won-Seok Jung, Chang-Seok Kang, Min-Yong Lee, Sang-Woo Jin
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Publication number: 20150200088Abstract: An access device having a reduced height and capable of suppressing leakage current, a method of fabricating the same, and a semiconductor memory device including the same, are provided. The access device may include a stacked structure including a first-type semiconductor layer having a first dopant, a second-type semiconductor layer having a second dopant, and a third-type semiconductor layer. A first counter-doping layer, having a counter-dopant to the first dopant, is interposed between the first-type semiconductor layer and the third-type semiconductor layer. A second counter-doping layer, having a counter-dopant to the second dopant, is interposed between the third-type semiconductor layer and the second-type semiconductor layer.Type: ApplicationFiled: March 25, 2015Publication date: July 16, 2015Inventors: Young Ho LEE, Keum Bum LEE, Min Yong LEE, Hyung Suk LEE, Seung Beom BAEK
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Patent number: 8980683Abstract: A resistive memory device and a fabrication method thereof are provided. The resistive memory device includes a variable resistive layer formed on a semiconductor substrate in which a bottom structure is formed, a lower electrode formed on the variable resistive layer, a switching unit formed on the lower electrode, and an upper electrode formed on the switching unit.Type: GrantFiled: July 3, 2014Date of Patent: March 17, 2015Assignee: SK Hynix Inc.Inventors: Min Yong Lee, Young Ho Lee, Seung Beom Baek, Jong Chul Lee
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Patent number: 8951857Abstract: The present invention provides various methods for implanting ions in a semiconductor device that substantially compensate for a difference in threshold voltages between a central portion and edge portions of a substrate generated while performing uniform ion implantation to entire surfaces of a substrate. Other methods for fabricating a semiconductor device improve distribution of transistor parameters across a substrate by forming a nonuniform channel doping layer or by forming a nonuniform junction profile, across the substrate.Type: GrantFiled: October 27, 2010Date of Patent: February 10, 2015Assignee: Sk hynix Inc.Inventors: Young-Sun Sohn, Seung-Woo Jin, Min-Yong Lee, Kyoung-Bong Rouh
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Patent number: 8901528Abstract: A PCRAM device and a method of manufacturing the same are provided. The PCRAM device includes a semiconductor substrate, and a PN diode formed on the semiconductor substrate and including a layer interposed therein to suppress thermal diffusion of ions.Type: GrantFiled: December 14, 2012Date of Patent: December 2, 2014Assignee: SK Hynix Inc.Inventors: Jin Ku Lee, Min Yong Lee, Jong Chul Lee
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Patent number: 8890104Abstract: A resistive memory device and a fabrication method thereof are provided. The resistive memory device includes a variable resistive layer formed on a semiconductor substrate in which a bottom structure is formed, a lower electrode formed on the variable resistive layer, a switching unit formed on the lower electrode, and an upper electrode formed on the switching unit.Type: GrantFiled: August 29, 2012Date of Patent: November 18, 2014Assignee: SK Hynix Inc.Inventors: Min Yong Lee, Young Ho Lee, Seung Beom Baek, Jong Chul Lee