Abstract: A phase-change memory device and a fabrication method thereof, capable of reducing driving current while minimizing a size of a contact hole used for forming a PN diode in the phase-change memory device that employs the PN diode. The method of fabricating the phase-change memory device includes the steps of preparing a semiconductor substrate having a junction area formed with a dielectric layer, forming an interlayer dielectric layer having etching selectivity lower than that of the dielectric layer over an entire structure, and forming a contact hole by removing predetermined portions of the interlayer dielectric layer and the dielectric layer. The contact area between the PN diode and the semiconductor substrate is increased so that interfacial resistance is reduced.

Abstract: Disclosed herein is an apparatus and method for partial ion implantation. The apparatus includes a wafer support, an ion beam irradiator capable of generating and irradiating an ion beam entering the wafer, and an ion beam exposure adjustor to adjust exposure of the wafer with respect to the ion beam according to regions of the wafer by setting an exposure opening via combination of ion beam shields for blocking the ion beam with respect to the wafer. The exposure opening enables the wafer to be partially exposed to the ion beam irradiated therethrough. With this apparatus, effective partial ion implantation can be performed to compensate variation of a threshold voltage Vt in a channel of a transistor, thereby providing more uniform characteristics of the transistor.

Abstract: A nonuniform ion implantation apparatus comprises a wide ion beam generator for generating a wide ion beam including a plurality of wide ion beams irradiated on at least two sections among a plurality of sections into which a wafer is divided, and a wafer drive unit for vertically reciprocating the wafer while the wide ion beam generated by the wide ion beam generator is irradiated on the wafer. At least one of the wide ion beams has a dose different from that of at least another wide ion beam.

Abstract: A method for fabricating a semiconductor device having a bulb-type recessed channel including forming a mask layer on the semiconductor substrate to expose a region where a trench for a bulb-type recessed channel can be formed, forming the trench in the semiconductor substrate, implanting dopant ions in three-dimensional radial directions with a predetermined tilt angle in the exposed region of the semiconductor substrate, removing the mask layer, forming a gate stack in the region including the trench, and forming a source/drain in the semiconductor substrate.

Abstract: A method of fabricating a semiconductor device includes forming a mask pattern for exposing a region of a semiconductor substrate. Dopant ions are implanted into the exposed region of the semiconductor substrate at a tilt angle of approximately 4.4° to 7°.

Abstract: Disclosed herein is a memory device having an increased level of integration with a simplified method of manufacture The memory device includes: a plurality of word lines and a plurality of bit lines each regularly arranged, and a plurality of unit memory cells each formed at an intersection between an associated one of the word lines and an associated one of the bit lines, wherein each unit memory cell includes a capacitor connected to one of the bit lines and a threshold voltage switching device comprising two terminals, one terminal being connected to the capacitor and the other terminal being connected to one of the bit lines, the threshold voltage switching device being capable of switching current flow at a specific threshold voltage via a rapid variation in resistance depending upon a voltage applied through the word line and the bit line, wherein the capacitor is capable of accumulating electric charges supplied from the bit line based on a switching operation of the threshold voltage switching device

Abstract: A non-uniform ion implantation apparatus comprises a wide ion beam generator configured to generate a plurality of wide ion beams to irradiate at least two regions on the entire area of a wafer, and a wafer rotating device configured to rotate the wafer in a predetermined direction while the wide ion beams generated by the wide ion beam generator are irradiated to the wafer. Among the wide ion beams, at least one wide ion beam has a different dose from that of at least one different wide ion beam. Since the wide ion beams are irradiated at different doses to the wafer, a smooth circular border is formed between the regions to which the impurity ions are implanted to different concentrations. Since the position of the wafer is suitably changed for the wide ion beams, it is possible to control disposition of the regions implanted with the impurity ions of different concentrations.

Abstract: An ion implantation apparatus includes an ion beam source for generating an ion beam; an implantation energy controller disposed on a path of the ion beam for controlling the ion implantation energy of the ion beam so that an ion beam having a first implantation energy is created for a first period of time and an ion beam having a second implantation energy is created for a second period of time; a beam line for accelerating the ion beam; and an end station for mounting a substrate, into which the ion beam accelerated by the beam line is implanted onto the substrate.

Abstract: An ion implantation apparatus comprises an ion beam source for generating an initial ion beam, a bundled ion beam generator adapted to change the initial ion beam into a bundled ion beam based on a predetermined frequency to pass the bundled ion beam for a first time while passing the initial ion beam for a second time, a beam line for accelerating the ion beam having passed through the ion beam generator, and an end station for arranging a wafer therein to allow the ion beam accelerated by the beam line to be implanted in the wafer, the end station operating to move the wafer in a direction perpendicular to an ion beam implantation direction, so as to implant the bundled ion beam in a first region of the wafer and the initial ion beam in a second region of the wafer.

Abstract: A non-uniform ion implantation apparatus comprises a wide ion beam generator configured to generate a plurality of wide ion beams to irradiate at least two regions on the entire area of a wafer, and a wafer rotating device configured to rotate the wafer in a predetermined direction while the wide ion beams generated by the wide ion beam generator are irradiated to the wafer. Among the wide ion beams, at least one wide ion beam has a different dose from that of at least one different wide ion beam. Since the wide ion beams are irradiated at different doses to the wafer, a smooth circular border is formed between the regions to which the impurity ions are implanted to different concentrations. Since the position of the wafer is suitably changed for the wide ion beams, it is possible to control disposition of the regions implanted with the impurity ions of different concentrations.

Abstract: Disclosed herein is a method of manufacturing a semiconductor device via gate-through ion implantation, comprising forming a gate stack on a semiconductor substrate and performing ion implantation for control of the threshold voltage and junction ion implantation for formation of source/drain regions, on the entire surface of the semiconductor substrate having the gate stack formed thereon. In accordance with the present invention, since ion implantation is carried out after formation of the gate stack involving a thermal process, there are no changes in concentrations of implanted dopants due to heat treatment upon formation of the gate stack.

Abstract: A semiconductor device, having a recessed gate and asymmetric dopant regions, comprises a semiconductor substrate having a trench with a first sidewall and a second sidewall, the heights of which are different from each other, a gate insulating layer pattern disposed on the semiconductor substrate, a gate stack disposed on the semiconductor such that the gate stack protrudes from the surface of the semiconductor substrate while the gate stack fills the trench, and first and second dopant regions disposed at the upper part of the semiconductor substrate adjacent to the first and second sidewalls of the trench, respectively, such that the first and second dopant regions have different steps.

Abstract: A method for fabricating a metal oxide semiconductor (MOS) transistor comprises forming a source region of a first conductivity type and a drain region of the first conductivity type, which are separated from each other by a channel region, in upper regions of a semiconductor substrate, forming a gate stack on the channel region, and feeding hydrogen into junctions of the source and drain regions to neutralize dopants of the first conductivity type present within particular portions of the junctions.

Abstract: Disclosed are an ion implantation apparatus and a method for implanting ions by using the same. The ion implanter for implanting ions into a wafer, includes: a first quadrupole magnet assembly for focusing an ion beam transmitted from an ion beam source; a scanner for deflecting the transmitted ion beam in the directions of an X-axis and an Y-axis; a second quadrupole magnet assembly for converging and diverging the ion beam passing through the scanner in the directions of the X- and Y-axes; and a beam parallelizer for rotating the ion beam in synchronization with the second quadrupole magnet assembly, thereby implanting the ion beam into the wafer.

Abstract: Disclosed herein is an apparatus and method for partial ion implantation. The apparatus includes a wafer support, an ion beam irradiator capable of generating and irradiating an ion beam entering the wafer, and an ion beam exposure adjustor to adjust exposure of the wafer with respect to the ion beam according to regions of the wafer by setting an exposure opening via combination of ion beam shields for blocking the ion beam with respect to the wafer. The exposure opening enables the wafer to be partially exposed to the ion beam irradiated therethrough. With this apparatus, effective partial ion implantation can be performed to compensate variation of a threshold voltage Vt in a channel of a transistor, thereby providing more uniform characteristics of the transistor.

Abstract: A semiconductor device having recess gates and a method for fabricating the same. The semiconductor device includes a semiconductor substrate having inverse triangular recesses formed therein; a gate insulating film having a designated thickness formed on the semiconductor substrate; gate electrodes formed on the gate insulating film so that the gate electrodes fill the inverse triangular recesses and protrude from the surface of the semiconductor substrate; and first and second junction regions formed in the semiconductor substrate and opposed to each other so that the corresponding one of the gate electrodes is interposed therebetween.

Abstract: Provided is a method for manufacturing a semiconductor device comprising forming a device isolation layer on a semiconductor substrate; forming gate insulating layers on the upper part of the semiconductor substrate having the device isolation layers formed thereon; forming an undoped layer for a gate electrode; implanting mixed dopant ions consisting of at least two dopant ions containing 11B ions into the undoped layer, utilizing an ion-implantation mask; and heat-treating the mixed dopant ion-implanted layer.

Abstract: The present invention relates to a method for forming a contact in a semiconductor device. The method includes the steps of: forming a P-type source/drain junction in a substrate; forming an inter-layer insulation layer on the substrate; forming a contact hole exposing at least one portion of the P-type source/drain junction by etching the inter-layer insulation layer; forming a plug ion implantation region by implanting boron fluoride ions into the exposed portion of the P-type source/drain junction, the boron fluoride ion having the less bonding number of fluorine than 49BF2; performing an activation annealing process for activating dopants implanted into the plug ion implantation region; and forming a contact connected to the P-type source/drain junction through the contact hole.

Abstract: The present invention discloses a method for manufacturing semiconductor device wherein a cleaning process of a buffer layer is performed prior to a formation of a nitride film. The cleaning process allows to maintain the deposition thickness of the nitride film even when the time between the formation of the buffer layer and the formation of the nitride film is long.

Abstract: Disclosed are an ion implantation apparatus and a method for implanting ions by using the same. The ion implanter for implanting ions into a wafer, includes: a first quadrupole magnet assembly for focusing an ion beam transmitted from an ion beam source; a scanner for deflecting the transmitted ion beam in the directions of an X-axis and an Y-axis; a second quadrupole magnet assembly for converging and diverging the ion beam passing through the scanner in the directions of the X- and Y-axes; and a beam parallelizer for rotating the ion beam in synchronization with the second quadrupole magnet assembly, thereby implanting the ion beam into the wafer.