Patents by Inventor Ming Ding

Ming Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210230295
    Abstract: Provided is an antibody or an antigen-binding fragment thereof, having one or more properties selected from the group consisting of: 1) being capable of binding to an AXL protein by a KD value of 1×10?8M or lower; 2) being capable of specifically recognizing an AXL protein expressed on a cell surface; and 3) being capable of mediating internalization after binding to the AXL protein expressed on the cell surface. The antibody may further used for constructing an immunoconjugate. The antibody and the immunoconjugate may inhibit the proliferation of tumor cells.
    Type: Application
    Filed: May 28, 2019
    Publication date: July 29, 2021
    Inventors: Ming LV, Xiaoran DING, Shiwei MlAO, Bin TAN, Xuegong WANG
  • Publication number: 20210235223
    Abstract: The present disclosure describes how a master beacon having a known UUID can be used to capture beacons within its range and superimpose a systematic address scheme on those beacons. The superimposed address scheme can then be used as a proxy for the individual beacons when developing applications that make use of the beacons. A master beacon automatically detects each beacon in a plurality of beacons and, for a set of beacons in the plurality of beacons, automatically changes either the first profile identifier or the second profile identifier for each beacon in the set of beacons. The change is such that the first profile identifier or the second profile identifier is identical for each beacon in the set of beacons and is also associated with the master beacon.
    Type: Application
    Filed: March 19, 2021
    Publication date: July 29, 2021
    Inventors: Aaron Lyon PHILLIPS-LUBIMIV, Jay FALLAH, Ming DING, Samson Grant KIRK-KOFFI
  • Publication number: 20210223915
    Abstract: A touch structure and a method of manufacturing the touch structure are provided. The method includes: forming a first conductive layer on a base substrate; forming a second conductive layer on the first conductive layer; and patterning the first conductive layer and the second conductive layer to respectively form a first conductive layer pattern and a second conductive layer pattern; the first conductive layer pattern is formed after the second conductive layer pattern is formed, and the first conductive layer pattern and the second conductive layer pattern are different from each other.
    Type: Application
    Filed: April 8, 2018
    Publication date: July 22, 2021
    Applicants: BOE Technology Group Co., Ltd., Hefei Xinsheng Optoelectronics Technology Co., Ltd.
    Inventors: Jing Wang, Zouming Xu, Xiaodong Xie, Lei Zhang, Xianlin Ding, Qitao Zheng, Tsung Chieh Kuo, Dong Li, Qicheng Chen, Ting Zeng, Ming Zhang, Seong Cho Lee, Lingyan Wu, Guiyu Zhang
  • Publication number: 20210225598
    Abstract: The present invention discloses a muted key module, an electronic device and an implementation method. The key module includes a switch member, a triggering mechanism and a supporting member, wherein the triggering mechanism is arranged corresponding to the switch member. The triggering mechanism can be moved along the contacting and separating directions of the switch member, thus to realize an ON or OFF operation of the switch member. A muting layer is arranged between the switch member and the supporting member. In the present invention, the muting layer is arranged between the switch member and the supporting member, so the impact force the between the triggering mechanism and the switch member can be cushioned by the muting layer, thereby reducing the noise produced when the key is pressed, thus to improve the quality of the final product as a whole.
    Type: Application
    Filed: August 7, 2018
    Publication date: July 22, 2021
    Inventors: MING LI, CHUANCHUN CAO, NIAN HU, JlNXlN DING, QIDONG LI
  • Publication number: 20210212751
    Abstract: A surgical instrument (1000) includes an end effector assembly (200) including first and second grasping components (210, 220) each defining a tissue-contacting portion (214, 218, 224, 228). One or both of the first or second grasping components (210, 220) is movable relative to the other between an open position and a closed position. In the closed position, the first and second tissue-contacting portions (214, 218, 224, 228) cooperate to define a grasping area therebetween. One or both of the first or second grasping components (210, 220) is configured to apply energy from the tissue-contacting portion (214, 218, 224, 228) thereof to tissue disposed within the grasping area to treat tissue. The tissue-contacting portion (214, 224) of the first grasping component (210) defines a first opening (219) therethrough. The first opening (219) is disposed within the grasping area and in communication with a first lumen (118) defined at least partially through the first grasping component (210).
    Type: Application
    Filed: August 22, 2017
    Publication date: July 15, 2021
    Inventors: WEIJIANG DING, MING CAO, YUANXUN LI, PU LIU
  • Publication number: 20210218543
    Abstract: A system is provided for generating a time reference in duty-cycled wireless communications. The system includes at least one master module including a master transceiver adapted to transmit data packets. The system further includes at least one slave module including a slave transceiver adapted to receive the data packets. The slave module further includes a signal generator adapted to generate a clock signal with a period equal to the time interval of two data packets transmitted by the master module. Moreover, the slave module further includes a slave timer adapted to utilize the clock signal as a time reference in order to perform the sleep/wakeup control for the slave module.
    Type: Application
    Filed: January 5, 2021
    Publication date: July 15, 2021
    Inventors: Ming Ding, Yao-Hong Liu
  • Patent number: 10992266
    Abstract: A power amplifier circuit includes a first transistor, a second transistor and a bias circuit. The first transistor has a base configured to receive a first signal. The second transistor has an emitter connecting to a collector of the first transistor and a collector configured to output a second signal. The bias circuit is coupled to the first transistor and the second transistor. The bias circuit is configured to provide a direct current (DC) voltage at the collector of the second transistor about twice a DC voltage at the collector of the first transistor. The bias circuit is configured to provide an alternating current (AC) or radio frequency (RF) voltage at the collector of the second transistor about twice an AC or RF voltage at the collector of the first transistor.
    Type: Grant
    Filed: March 26, 2019
    Date of Patent: April 27, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Jaw-Ming Ding
  • Patent number: 10979853
    Abstract: The present disclosure describes how a master beacon having a known QUID can be used to capture beacons within its range and superimpose a systematic address scheme on those beacons. The superimposed address scheme can then be used as a proxy for the individual beacons when developing applications that make use of the beacons. A master beacon automatically detects each beacon in a plurality of beacons and, for a set of beacons in the plurality of beacons, automatically changes either the first profile identifier or the second profile identifier for each beacon in the set of beacons. The change is such that the first profile identifier or the second profile identifier is identical for each beacon in the set of beacons and is also associated with the master beacon.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: April 13, 2021
    Assignee: AP1 INC.
    Inventors: Aaron Lyon Phillips-Lubimiv, Jay Fallah, Ming Ding, Samson Grant Kirk-Koffi
  • Patent number: 10965249
    Abstract: A crystal oscillator circuit comprises: a crystal oscillator; and an injection frequency generating circuit, the injection frequency generating circuit being configured to sense a signal of the crystal oscillator and amplify the sensed signal, the injection frequency generating circuit being further configured to inject the amplified signal to the crystal oscillator; wherein the crystal oscillator circuit is configured such that the crystal oscillator receives the amplified signal during an initial start-up period of the crystal oscillator and stops receiving the amplified signal at an end of the initial start-up period.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: March 30, 2021
    Assignee: IMEC vzw
    Inventor: Ming Ding
  • Patent number: 10959278
    Abstract: A call setup method and associated apparatus discloses sending a first message to a network device, wherein the first message is used by the electronic device to request to set up an outgoing call; receiving a second message sent by the network device, wherein the second message is used by the electronic device to set up an incoming call; caching the second message when the electronic device is in a call initiation state; releasing the outgoing call based on an indication message received from the network device and setting up the incoming call.
    Type: Grant
    Filed: June 15, 2017
    Date of Patent: March 23, 2021
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Kai Yuan, Fenghui Dou, Ming Ding, Hui Jin
  • Publication number: 20210083628
    Abstract: A power amplifier circuit includes a current generator and a current mirror driver. The current generator has a first input connected to a first voltage supply and an output configured to generate a first current. The current generator includes a first transistor, a second transistor, a first resistor and a second resistor. The first transistor has an emitter connected to ground. The second transistor has a base connected to a base of the first transistor and an emitter connected to ground. The first resistor is connected between the first voltage supply and a collector of the first transistor. The second resistor is connected between the first voltage supply and a collector of the second transistor. The current mirror drive has a first input connected to the output of the current generator to receive the first current and an output configured to generate a second current.
    Type: Application
    Filed: September 18, 2019
    Publication date: March 18, 2021
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Jaw-Ming DING
  • Patent number: 10944363
    Abstract: The present disclosure relates to a power amplifier circuit. The power amplifier circuit includes a voltage-controlled current source and a current mirror. The voltage-controlled current source is configured to receive a first voltage and to generate a first current. The current mirror is connected to the voltage-controlled current source and to generate a second current in response to the first current. The second current continuously changes from 0 mA to about 120 mA as the first voltage continuously changes from 0 V to about 1 V.
    Type: Grant
    Filed: June 29, 2018
    Date of Patent: March 9, 2021
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Jaw-Ming Ding
  • Publication number: 20210012524
    Abstract: Provided are a method and a device that can efficiently generate a training dataset.
    Type: Application
    Filed: March 28, 2019
    Publication date: January 14, 2021
    Inventors: Keita TOMOCHIKA, Takuya KIYOKAWA, Tsukasa OGASAWARA, Jun TAKAMATSU, Ming DING
  • Publication number: 20200313626
    Abstract: A power amplifier circuit includes a first transistor, a second transistor and a bias circuit. The first transistor has a base configured to receive a first signal. The second transistor has an emitter connecting to a collector of the first transistor and a collector configured to output a second signal. The bias circuit is coupled to the first transistor and the second transistor. The bias circuit is configured to provide a direct current (DC) voltage at the collector of the second transistor about twice a DC voltage at the collector of the first transistor. The bias circuit is configured to provide an alternating current (AC) or radio frequency (RF) voltage at the collector of the second transistor about twice an AC or RF voltage at the collector of the first transistor.
    Type: Application
    Filed: March 26, 2019
    Publication date: October 1, 2020
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Jaw-Ming DING
  • Patent number: 10756025
    Abstract: A semiconductor package device includes: (1) a substrate having a top surface; (2) a passive component disposed on the substrate and having a top surface; (3) an active component disposed on the substrate and having a top surface; and (4) a package body disposed on the substrate, the package body including a first portion covering the active component and the passive component, and a second portion covering the passive component, wherein a top surface of the second portion of the package body is higher than a top surface of the first portion of the package body, and the first portion and the second portion of the package body include different materials.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: August 25, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Hsuan Lee, Jaw-Ming Ding, Wei-Yu Chen
  • Patent number: 10681811
    Abstract: Embodiments of present invention provide various device assemblies for digital communication. The device assemblies may include a main printed-circuit-board (PCB); and an OSA-on-daughter-board (OODB) directly connected to the main PCB. The OODB has an optical sub-assembly (OSA) wire-bonded onto a daughter PCB. In one embodiment, the daughter PCB includes a flexible printed-circuit (FPC) sheet connecting the OODB directly to the main PCB. In another embodiment, the main PCB includes a FPC sheet connecting the main PCB directly to the OODB. In one embodiment, the connection may be made through an anisotropic conductive film or an anisotropic conductive adhesive.
    Type: Grant
    Filed: February 10, 2019
    Date of Patent: June 9, 2020
    Inventors: Tongqing Wang, Ming Ding
  • Patent number: 10651796
    Abstract: The present disclosure relates to a power amplifier circuit including a current source, a power control circuit, a current mirror and an output circuit. The current source circuit includes a first transistor and a second transistor. A source of the first transistor is connected to a drain of the second transistor and a gate of the first transistor is connected to a source with the second transistor. The power control circuit is connected to a gate of the second transistor. The current mirror circuit is connected to the gate of the first transistor and a source of the second transistor. The output circuit is connected to the current mirror circuit.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: May 12, 2020
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventor: Jaw-Ming Ding
  • Patent number: 10652823
    Abstract: Systems and methods providing a wakeup receiver for latency-critical applications are described herein. An example system includes a wakeup receiver communicatively coupled to a communication channel. The wakeup receiver is configured to monitor an input signal of the communication channel and down-convert the input signal to a DC signal. The system also includes an analog to digital converter (ADC) configured to digitize the DC signal and provide an ADC output. The system further includes a digital baseband (DBB) module configured to determine a received signal strength indication (RSSI) from the signal. The DBB is also configured to, for each packet, determine a respective packet length and compare the RSSI and respective packet length with a two-dimensional template. The DBB is additionally configured to, based on the comparison, determine an interrupt condition and, based on determining the interrupt condition, generate a wakeup signal.
    Type: Grant
    Filed: May 30, 2018
    Date of Patent: May 12, 2020
    Assignee: IMEC VZW
    Inventors: Ming Ding, Peng Zhang, Yan Zhang, Akio Hirata, Akifumi Nagao
  • Patent number: 10548113
    Abstract: A method of resource allocation for Channel State Information (CSI) feedback is provided, which comprises the following steps of: configuring a downlink transmission approach and a feedback mode for each User Equipment (UE); allocating feedback resources required for CSI feedback by each UE based on the configured downlink transmission approach and feedback mode, such that different types underlying different feedback modes for a single UE will not collide with each other within one sub-frame; and notifying each UE of the corresponding configured downlink transmission approach and feedback mode and allocated feedback resources.
    Type: Grant
    Filed: April 4, 2011
    Date of Patent: January 28, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Ming Ding, Renmao Liu, Yingyu Zhang, Yongming Liang, Zeng Yang
  • Patent number: 10530545
    Abstract: A user equipment receives, from the base station apparatus, bit information. The bit information indicates first information indicating one or more antenna ports and second information indicating a number of layers for downlink data symbols.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: January 7, 2020
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yingyu Zhang, Renmao Liu, Ming Ding, Yongming Liang, Zeng Yang