Patents by Inventor Ming Ding

Ming Ding has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190245487
    Abstract: The present disclosure relates to a logic control circuit including a first inverter and a voltage limiter. The first inverter is connected to a first input voltage. The first inverter includes a first transistor having a first terminal and a second terminal. The second terminal of the first transistor is connected to a ground. The voltage limiter includes a second transistor. The second transistor has a gate connected to a ground, a source connected to the first terminal of the first transistor and a drain connected to a second input voltage.
    Type: Application
    Filed: February 2, 2018
    Publication date: August 8, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Jaw-Ming DING
  • Publication number: 20190245488
    Abstract: The present disclosure relates to a power amplifier circuit including a current source, a power control circuit, a current mirror and an output circuit. The current source circuit includes a first transistor and a second transistor. A source of the first transistor is connected to a drain of the second transistor and a gate of the first transistor is connected to a source with the second transistor. The power control circuit is connected to a gate of the second transistor. The current mirror circuit is connected to the gate of the first transistor and a source of the second transistor. The output circuit is connected to the current mirror circuit.
    Type: Application
    Filed: February 2, 2018
    Publication date: August 8, 2019
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventor: Jaw-Ming DING
  • Patent number: 10355809
    Abstract: A Channel State Information (CSI) feedback method and a User Equipment (UE) are disclosed. The method comprises the following steps of: determining a set of coordinated Base Stations (BSs) participating multi-BS coordination, the set of coordination BSs containing a serving BS and at least one non-serving BS; for each BS in the set of coordinated BSs: calculating a Signal to Interference and Noise Ratio (SINR) for a channel between a UE and the BS based on a hypothetical BS coordination mode corresponding to the BS; and deriving a Channel Quality Index (CQI) corresponding to the calculated SINR and feeding back the derived CQI to the serving BS.
    Type: Grant
    Filed: June 1, 2015
    Date of Patent: July 16, 2019
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Ming Ding, Lei Huang, Zeng Yang, Renmao Liu
  • Patent number: 10230386
    Abstract: A method of offset calibration in a SAR ADC is disclosed. In one aspect, the method comprises determining a number of bits of an analog input signal (VIN), detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code, using at least one setting code to determine a calibration bit (B*LSB; B*MSB), analyzing a bit of the digital signal (COUT) and the calibration bit (B*LSB; B*MSB), determining an indication of a presence of offset error, and calibrating the offset error. As the determination of the calibration bit (B*LSB; B*MSB) requires only one additional comparison, when compared to the normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and thus can be performed frequently thereby taking into account time-varying changes due to environmental effects.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: March 12, 2019
    Assignee: Stichting IMEC Nederland
    Inventors: Ming Ding, Hanyue Li, Pieter Harpe
  • Patent number: 10157855
    Abstract: The present disclosure relates to a semiconductor device package and a manufacturing method thereof. The semiconductor device package includes a carrier, at least one electronic component, a first magnetic layer and a second magnetic layer. The carrier has a top surface on which the electronic component is disposed. The first magnetic layer is disposed on the top surface of the carrier and encapsulates the electronic component. The second magnetic layer is disposed on the first magnetic layer and covers a top surface and a lateral surface of the first magnetic layer. A permeability of the first magnetic layer is less than a permeability of the second magnetic layer.
    Type: Grant
    Filed: June 3, 2015
    Date of Patent: December 18, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Hsuan Lee, Chien-Yeh Liu, Sung-Mao Li, Jaw-Ming Ding
  • Publication number: 20180359706
    Abstract: Systems and methods providing a wakeup receiver for latency-critical applications are described herein. An example system includes a wakeup receiver communicatively coupled to a communication channel. The wakeup receiver is configured to monitor an input signal of the communication channel and down-convert the input signal to a DC signal. The system also includes an analog to digital converter (ADC) configured to digitize the DC signal and provide an ADC output. The system further includes a digital baseband (DBB) module configured to determine a received signal strength indication (RSSI) from the signal. The DBB is also configured to, for each packet, determine a respective packet length and compare the RSSI and respective packet length with a two-dimensional template. The DBB is additionally configured to, based on the comparison, determine an interrupt condition and, based on determining the interrupt condition, generate a wakeup signal.
    Type: Application
    Filed: May 30, 2018
    Publication date: December 13, 2018
    Applicants: Panasonic Intellectual Property Management Co., Ltd., Stichting IMEC Nederland
    Inventors: Ming Ding, Peng Zhang, Yan Zhang, Akio Hirata, Akifumi Nagao
  • Publication number: 20180350753
    Abstract: A semiconductor package device includes: (1) a substrate having a top surface; (2) a passive component disposed on the substrate and having a top surface; (3) an active component disposed on the substrate and having a top surface; and (4) a package body disposed on the substrate, the package body including a first portion covering the active component and the passive component, and a second portion covering the passive component, wherein a top surface of the second portion of the package body is higher than a top surface of the first portion of the package body, and the first portion and the second portion of the package body include different materials.
    Type: Application
    Filed: August 8, 2018
    Publication date: December 6, 2018
    Applicant: Advanced Semiconductor Engineering, Inc.
    Inventors: Wei-Hsuan LEE, Jaw-Ming Ding, Wei-Yu CHEN
  • Publication number: 20180302034
    Abstract: A crystal oscillator circuit comprises: a crystal oscillator; and an injection frequency generating circuit, the injection frequency generating circuit being configured to sense a signal of the crystal oscillator and amplify the sensed signal, the injection frequency generating circuit being further configured to inject the amplified signal to the crystal oscillator; wherein the crystal oscillator circuit is configured such that the crystal oscillator receives the amplified signal during an initial start-up period of the crystal oscillator and stops receiving the amplified signal at an end of the initial start-up period.
    Type: Application
    Filed: April 13, 2018
    Publication date: October 18, 2018
    Applicant: Stichting IMEC Nederland
    Inventor: Ming Ding
  • Patent number: 10068854
    Abstract: A semiconductor package device includes a substrate, a passive component, an active component and a package body. The passive component is disposed on the substrate. The active component is disposed on the substrate. The package body is disposed on the substrate. The package body includes a first portion covering the active component and the passive component, and a second portion covering the passive component. A top surface of the second portion of the package body is higher than a top surface of the first portion of the package body.
    Type: Grant
    Filed: October 24, 2016
    Date of Patent: September 4, 2018
    Assignee: ADVANCED SEMICONDUCTOR ENGINEERING, INC.
    Inventors: Wei-Hsuan Lee, Jaw-Ming Ding, Wei-Yu Chen
  • Patent number: 10050638
    Abstract: A method of gain calibration in a SAR ADC is disclosed. In one aspect, the method comprises determining a number of bits of an analog input signal (VIN), detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code, using at least one setting code to determine a calibration residue signal (V*RES) and a calibration bit (B*LSB), analyzing a least significant bit of the digital signal (COUT) and the calibration bit (B*LSB), determining an indication of a presence of gain error in the gain module, and calibrating the gain error. As the determination of the calibration bit (B*LSB) requires only one additional comparison, as compared to normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and, as such, can be performed frequently thereby taking into account time-varying changes due to environmental effects.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: August 14, 2018
    Assignee: Stichting IMEC Nederland
    Inventors: Ming Ding, Pieter Harpe, Hanyue Li
  • Publication number: 20180227098
    Abstract: A user equipment receives, from the base station apparatus, bit information. The bit information indicates first information indicating one or more antenna ports and second information indicating a number of layers for downlink data symbols.
    Type: Application
    Filed: April 4, 2018
    Publication date: August 9, 2018
    Applicant: SHARP KABUSHIKI KAISHA
    Inventors: Yingyu ZHANG, Renmao LIU, Ming DING, Yongming LIANG, Zeng YANG
  • Patent number: 10044477
    Abstract: The present disclosure provides a method in a base station for Channel State Information (CSI) process configuration and an associated base station. The method comprises: setting CSI process information for a User Equipment (UE) supporting three dimensional (3D) Multiple Input Multiple Output (MIMO), the CSI process information including at least an index of a CSI Reference Signal Resource (CSI-RS-R) for a vertical direction of a 3D MIMO antenna array; and transmitting the set CSI process information to the UE. Also disclosed are a method in a UE for CSI feedback and an associated UE.
    Type: Grant
    Filed: August 4, 2014
    Date of Patent: August 7, 2018
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Ming Ding
  • Patent number: 10027339
    Abstract: A method of DAC mismatch calibration in a SAR ADC is disclosed. In one aspect, the method comprises determining a number of bits of an analog input signal (VIN), detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code, using at least one setting code to determine a calibration residue signal (V*RES) and a calibration bit (B*LSB), analyzing a least significant bit of the digital signal (COUT) and the calibration bit (B*LSB), determining an indication of a presence of DAC mismatch, and calibrating the DAC mismatch. As the determination of the calibration bit (B*LSB) requires only one additional comparison, when compared to the normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and, as such, can be performed frequently thereby taking into account time-varying changes due to environmental effects.
    Type: Grant
    Filed: December 6, 2017
    Date of Patent: July 17, 2018
    Assignee: Stichting IMEC Nederland
    Inventors: Ming Ding, Pieter Harpe, Hanyue Li
  • Publication number: 20180175874
    Abstract: A method of gain calibration in a SAR ADC is disclosed. In one aspect, the method comprises determining a number of bits of an analog input signal (VIN), detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code, using at least one setting code to determine a calibration residue signal (V*RES) and a calibration bit (B*LSB), analyzing a least significant bit of the digital signal (COUT) and the calibration bit (B*LSB), determining an indication of a presence of gain error in the gain module, and calibrating the gain error. As the determination of the calibration bit (B*LSB) requires only one additional comparison, as compared to normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and, as such, can be performed frequently thereby taking into account time-varying changes due to environmental effects.
    Type: Application
    Filed: December 7, 2017
    Publication date: June 21, 2018
    Inventors: Ming DING, Pieter Harpe, Hanyue Li
  • Publication number: 20180167078
    Abstract: A method of DAC mismatch calibration in a SAR ADC is disclosed. In one aspect, the method comprises determining a number of bits of an analog input signal (VIN), detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code, using at least one setting code to determine a calibration residue signal (V*RES) and a calibration bit (B*LSB), analyzing a least significant bit of the digital signal (COUT) and the calibration bit (B*LSB), determining an indication of a presence of DAC mismatch, and calibrating the DAC mismatch. As the determination of the calibration bit (B*LSB) requires only one additional comparison, when compared to the normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and, as such, can be performed frequently thereby taking into account time-varying changes due to environmental effects.
    Type: Application
    Filed: December 6, 2017
    Publication date: June 14, 2018
    Inventors: Ming Ding, Pieter Harpe, Hanyue Li
  • Publication number: 20180167079
    Abstract: A method of offset calibration in a SAR ADC is disclosed. In one aspect, the method comprises determining a number of bits of an analog input signal (VIN), detecting if a binary code determined from the analog input signal (VIN) matches at least one trigger code, using at least one setting code to determine a calibration bit (B*LSB; B*MSB), analyzing a bit of the digital signal (COUT) and the calibration bit (B*LSB; B*MSB), determining an indication of a presence of offset error, and calibrating the offset error. As the determination of the calibration bit (B*LSB; B*MSB) requires only one additional comparison, when compared to the normal operation, the normal operation does not need to be interrupted. Therefore, the calibration can be done in the background and thus can be performed frequently thereby taking into account time-varying changes due to environmental effects.
    Type: Application
    Filed: December 7, 2017
    Publication date: June 14, 2018
    Inventors: Ming Ding, Hanyue Li, Pieter HARPE
  • Patent number: 9989704
    Abstract: Embodiments of present invention provide a digital dispersion compensation module. The digital dispersion compensation module includes a multi-port optical circulator and a plurality of dispersion compensation units connected to the multi-port optical circulator, wherein at least one of the plurality of dispersion compensation units includes a first and a second reflectively terminated element and an optical switch being capable of selectively connecting to one of the first and second reflectively terminated elements, and wherein the at least one of the plurality of dispersion compensation units is adapted to provide a substantially zero dispersion to an optical signal, coming from the multi-port optical circulator, when the optical switch connects to the first reflectively terminated element and is adapted to provide a non-zero dispersion to the optical signal when the optical switch connects to the second reflectively terminated element.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: June 5, 2018
    Assignee: LUXAR TECH INC
    Inventors: Tongqing Wang, Dobby Lam, Jinghui Li, Ming Ding
  • Publication number: 20180152811
    Abstract: The present disclosure describes how a master beacon having a known UUID can be used to capture beacons within its range and superimpose a systematic address scheme on those beacons. The superimposed address scheme can then be used as a proxy for the individual beacons when developing applications that make use of the beacons. A master beacon automatically detects each beacon in a plurality of beacons and, for a set of beacons in the plurality of beacons, automatically changes either the first profile identifier or the second profile identifier for each beacon in the set of beacons. The change is such that the first profile identifier or the second profile identifier is identical for each beacon in the set of beacons and is also associated with the master beacon.
    Type: Application
    Filed: January 23, 2018
    Publication date: May 31, 2018
    Inventors: Aaron Lyon Phillips-Lubimiv, Jay Fallah, Ming Ding, Samson Grant Kirk-Koffi
  • Publication number: 20180114757
    Abstract: A semiconductor package device includes a substrate, a passive component, an active component and a package body. The passive component is disposed on the substrate. The active component is disposed on the substrate. The package body is disposed on the substrate. The package body includes a first portion covering the active component and the passive component, and a second portion covering the passive component. A top surface of the second portion of the package body is higher than a top surface of the first portion of the package body.
    Type: Application
    Filed: October 24, 2016
    Publication date: April 26, 2018
    Inventors: Wei-Hsuan LEE, Jaw-Ming DING, Wei-Yu CHEN
  • Patent number: 9954660
    Abstract: A user equipment receives, from the base station apparatus, bit information. The bit information indicates first information indicating one or more antenna ports and second information indicating a number of layers for downlink data symbols.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: April 24, 2018
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Yingyu Zhang, Renmao Liu, Ming Ding, Yongming Liang, Zeng Yang