Patents by Inventor Ming Feng

Ming Feng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240153881
    Abstract: A method of forming semiconductor structure includes attaching backsides of top dies to a front side of a bottom wafer, the bottom wafer comprising a plurality of bottom dies; forming first conductive pillars on the front side of the bottom wafer adjacent to the top dies; forming a first dielectric material on the front side of the bottom wafer around the top dies and around the first conductive pillars; and dicing the bottom wafer to form a plurality of structures, each of the plurality of structures comprising at least one of the top dies and at least one of the bottom dies.
    Type: Application
    Filed: January 2, 2024
    Publication date: May 9, 2024
    Inventors: Chen-Hua Yu, Tzuan-Horng Liu, Ming-Fa Chen, Chao-Wen Shih, Sung-Feng Yeh
  • Publication number: 20240153860
    Abstract: An electronic device is provided. The electronic device includes a redistribution structure, an electronic unit and a first conductive pad. The first conductive pad is disposed between the redistribution structure and the electronic unit. The electronic unit is electrically connected to the redistribution structure through the first conductive pad. The first conductive pad has a first coefficient of thermal expansion and a first Young's modulus. The first coefficient of thermal expansion and the first Young's modulus conform to the following formula: 0.7×(0.0069E2?1.1498E+59.661)?CTE?1.3×(0.0069E2?1.1498E+59.661), wherein CTE is the first coefficient of thermal expansion, and E is the first Young's modulus in the formula.
    Type: Application
    Filed: December 21, 2022
    Publication date: May 9, 2024
    Inventors: Te-Hsun LIN, Wen-Hsiang LIAO, Yung-Feng CHEN, Ming-Hsien SHIH
  • Patent number: 11977947
    Abstract: The present invention provides an electronic shelf label communication system, method and apparatus.
    Type: Grant
    Filed: August 9, 2019
    Date of Patent: May 7, 2024
    Assignee: Hanshow Technology Co., Ltd.
    Inventors: Shiguo Hou, Liangyan Li, Yunliang Feng, Bo Gao, Jun Chen, Qi Jiang, Ming Shen
  • Patent number: 11979730
    Abstract: The present disclosure provides a loudspeaker assembly and an electronic device, relating to the technical field of electronic devices, so as to solve the problems of single sound effect and lack of good sound effect. The loudspeaker assembly includes a first housing, a second housing, a loudspeaker vibrator and an adjusting mechanism. The first housing and the loudspeaker vibrator form a first cavity, and the second housing and the loudspeaker vibrator form a second cavity. The adjusting mechanism includes a driving mechanism and a filling part. The driving mechanism drives the filling part to move, so as to change the volume of the filling part extending into the second cavity.
    Type: Grant
    Filed: August 6, 2019
    Date of Patent: May 7, 2024
    Assignee: Gree Electric Appliances, Inc. of Zhuhai
    Inventors: Chao Xu, Ruimin Li, Ke Feng, Ming Xie, Shicai Long, Qilu Ye, Zhekang Luo, Yadong Zheng
  • Patent number: 11978678
    Abstract: A display device includes a first substrate, a light-emitting element, a light conversion layer, and a color filter layer. The light-emitting element is disposed on the first substrate. The light conversion layer is disposed on the light-emitting element. In addition, the color filter layer is overlapped the light-emitting element and the light conversion layer.
    Type: Grant
    Filed: August 5, 2022
    Date of Patent: May 7, 2024
    Assignee: INNOLUX CORPORATION
    Inventors: Tung-Kai Liu, Tsau-Hua Hsieh, Wei-Cheng Chu, Chun-Hsien Lin, Chandra Lius, Ting-Kai Hung, Kuan-Feng Lee, Ming-Chang Lin, Tzu-Min Yan, Hui-Chieh Wang
  • Patent number: 11978716
    Abstract: A 3DIC structure includes a die, a conductive terminal, and a dielectric structure. The die is bonded to a carrier through a bonding film. The conductive terminal is disposed over and electrically connected to the die. The dielectric structure comprises a first dielectric layer and a second dielectric layer. The first dielectric layer is disposed laterally aside the die. The second dielectric layer is disposed between the first dielectric layer and the bonding film, and between the die and the boding film. A second edge of the second dielectric layer is more flat than a first edge of the first dielectric layer.
    Type: Grant
    Filed: June 1, 2023
    Date of Patent: May 7, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Sung-Feng Yeh, Hsien-Wei Chen, Ming-Fa Chen
  • Publication number: 20240145370
    Abstract: A semiconductor device includes a first region and a second region, and the second region surrounds the first region. The semiconductor device includes at least one electronic unit, a redistribution structure, a plurality of first pads, and a plurality of second pads. The redistribution structure may be electrically connected to at least one electronic unit. A plurality of first pads are arranged on the redistribution structure and correspondingly to the first region. There is a first pitch between two adjacent first pads. A plurality of second pads are arranged on the redistribution structure and correspondingly to the second region. There is a second pitch between two adjacent second pads, so that the first pitch is smaller than the second pitch.
    Type: Application
    Filed: December 18, 2022
    Publication date: May 2, 2024
    Applicant: InnoLux Corporation
    Inventors: Te-Hsun LIN, Wen-Hsiang LIAO, Ming-Hsien SHIH, Yung-Feng CHEN, Cheng-Chi WANG
  • Patent number: 11971539
    Abstract: An annular optical element includes an outer annular surface, an inner annular surface, a first side surface, a second side surface and a plurality of strip-shaped wedge structures. The outer annular surface surrounds a central axis of the annular optical element and includes at least two shrunk portions. The first side surface connects the outer annular surface and the inner annular surface. The second side surface connects the outer annular surface and the inner annular surface, wherein the second side surface is disposed correspondingly to the first side surface. The strip-shaped wedge structures are disposed on the inner annular surface, wherein each of the strip-shaped wedge structures is disposed along a direction from the first side surface towards the second side surface and includes an acute end and a tapered portion connecting the inner annular surface and the acute end.
    Type: Grant
    Filed: September 27, 2022
    Date of Patent: April 30, 2024
    Assignee: LARGAN PRECISION CO., LTD.
    Inventors: Cheng-Feng Lin, Wei-Hung Weng, Ming-Ta Chou
  • Patent number: 11970601
    Abstract: A thermoplastic polyolefin composition comprises: (A) a polypropylene polymer; (B) an elastomer component; (C) an additive component; and (D) a scavenger component comprising a polyacetoacetate compound having the Formula (I) defined herein and calcium carbonate. And an article is made from the thermoplastic polyolefin composition.
    Type: Grant
    Filed: November 29, 2018
    Date of Patent: April 30, 2024
    Assignee: Dow Global Technologies LLC
    Inventors: Haiying Li, Andong Liu, Shaoguang Feng, Xiuhan Yang, Jian Zou, Ming Ming, Yonghua Gong, Xuemei Zhai
  • Patent number: 11970235
    Abstract: An adaptive vehicle headlight is provided for being installed on a vehicle body for use. The adaptive vehicle headlight includes a light body, an optical lens, a driver, and a control unit. The optical lens, the driver, and the control unit are integrated into the light body. In practice, the optical lens can optionally include a light distributing member. The control unit can cause an operation of the driver according to a tilt angle of the vehicle body, such that the optical lens and/or the light distributing member are rotated to a predetermined angle, so as to produce an illumination pattern in a horizontal state.
    Type: Grant
    Filed: March 17, 2022
    Date of Patent: April 30, 2024
    Assignee: CHIAN YIH OPTOTECH CO., LTD.
    Inventors: Cheng Wang, Ming-Feng Kuo, Wen-Hong Zhang
  • Patent number: 11966153
    Abstract: A wavelength conversion module includes a driving element, a wavelength conversion wheel, and at least one flow guide. The wavelength conversion wheel includes a rotary disc and at least one wavelength conversion layer. The driving element is connected to the rotary disc to drive the wavelength conversion wheel to rotate along an axis of the driving element as a central axis. The flow guide is disposed beside the wavelength conversion wheel at intervals along the axis, and at least one airflow channel is formed between the flow guide and the wavelength conversion wheel. The flow guide and the driving element are disposed at intervals, and the flow guide does not contact the rotary disc and the driving element. An orthographic projection of the flow guide on the rotary disc overlaps the wavelength conversion layer. When the wavelength conversion wheel rotates, the wavelength conversion wheel and the flow guide move relatively.
    Type: Grant
    Filed: April 14, 2022
    Date of Patent: April 23, 2024
    Assignee: Coretronic Corporation
    Inventors: Ming-Feng Hou, Shi-Wen Lin, Shih-Hang Lin
  • Patent number: 11967553
    Abstract: The present disclosure provides a semiconductor package, including a first semiconductor structure, including an active region in a first substrate portion, wherein the active region includes at least one of a transistor, a diode, and a photodiode, a first bonding metallization over the first semiconductor structure, a first bonding dielectric over the first semiconductor structure, surrounding and directly contacting the first bonding metallization, a second semiconductor structure over a first portion of the first semiconductor structure, wherein the second semiconductor structure includes a conductive through silicon via, a second bonding dielectric at a back surface of the second semiconductor structure, a second bonding metallization surrounded by the second bonding dielectric and directly contacting the second bonding dielectric, and a conductive through via over a second portion of the first semiconductor structure different from the first portion.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: April 23, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Fa Chen, Sung-Feng Yeh, Chen-Hua Yu
  • Publication number: 20240130022
    Abstract: This application relates to the field of lighting, and discloses an LED filament. The LED filament includes an LED chip unit, a light conversion layer, and an electrode. The light conversion layer covers the LED chip unit and part of the electrode, and a color of a light emitted by the LED filament after lighting is different from a color of the light conversion layer. This application has the characteristics of uniform light emission and good heat dissipation effect.
    Type: Application
    Filed: September 18, 2022
    Publication date: April 18, 2024
    Inventors: Tao Jiang, Lin Zhou, Ming-Bin Wang, Chih-Shan Yu, Rong-Huan Yang, Ji-Feng Xu, Heng Zhao, Jian Lu, Qi Wu
  • Publication number: 20240118073
    Abstract: Manufacturing of a shoe is enhanced by creating 3-D models of shoe parts. For example, a laser beam may be projected onto a shoe-part surface, such that a projected laser line appears on the shoe part. An image of the projected laser line may be analyzed to determine coordinate information, which may be converted into geometric coordinate values usable to create a 3-D model of the shoe part. Once a 3-D model is known and is converted to a coordinate system recognized by shoe-manufacturing tools, certain manufacturing steps may be automated.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 11, 2024
    Inventors: Patrick C. Regan, Chih-Chi Chang, Kuo-Hung Lee, Ming-Feng Jean
  • Patent number: 11955460
    Abstract: In accordance with some embodiments, a package-on-package (PoP) structure includes a first semiconductor package having a first side and a second side opposing the first side, a second semiconductor package having a first side and a second side opposing the first side, and a plurality of inter-package connector coupled between the first side of the first semiconductor package and the first side of the second semiconductor package. The PoP structure further includes a first molding material on the second side of the first semiconductor package. The second side of the second semiconductor package is substantially free of the first molding material.
    Type: Grant
    Filed: October 5, 2020
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yi-Da Tsai, Meng-Tse Chen, Sheng-Feng Weng, Sheng-Hsiang Chiu, Wei-Hung Lin, Ming-Da Cheng, Ching-Hua Hsieh, Chung-Shi Liu
  • Patent number: 11955433
    Abstract: A package includes a redistribution structure, a die package on a first side of the redistribution structure including a first die connected to a second die by metal-to-metal bonding and dielectric-to-dielectric bonding, a dielectric material over the first die and the second die and surrounding the first die, and a first through via extending through the dielectric material and connected to the first die and a first via of the redistribution structure, a semiconductor device on the first side of the redistribution structure includes a conductive connector, wherein a second via of the redistribution structure contacts the conductive connector of the semiconductor device, a first molding material on the redistribution structure and surrounding the die package and the semiconductor device, and a package through via extending through the first molding material to contact a third via of the redistribution structure.
    Type: Grant
    Filed: July 20, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ming-Fa Chen, Sung-Feng Yeh, Hsien-Wei Chen
  • Patent number: 11953877
    Abstract: Manufacturing of a shoe or a portion of a shoe is enhanced by executing various shoe-manufacturing processes in an automated fashion. For example, information describing a shoe part may be determined, such as an identification, an orientation, a color, a surface topography, an alignment, a size, etc. Based on the information describing the shoe part, automated shoe-manufacturing apparatuses may be instructed to apply various shoe-manufacturing processes to the shoe part, such as a pickup and placement of the shoe part with a pickup tool.
    Type: Grant
    Filed: October 20, 2022
    Date of Patent: April 9, 2024
    Assignee: NILE, Inc.
    Inventors: Dragan Jurkovic, Patrick Conall Regan, Chih-Chi Chang, Chang-chu Liao, Ming-Feng Jean, Kuo-Hung Lee, Yen-Hsi Liu, Hung-Yu Wu
  • Patent number: 11955484
    Abstract: A semiconductor device includes a semiconductor substrate having a first region and a second region, insulators, gate stacks, and first and second S/Ds. The first and second regions respectively includes at least one first semiconductor fin and at least one second semiconductor fin. A width of a middle portion of the first semiconductor fin is equal to widths of end portions of the first semiconductor fin. A width of a middle portion of the second semiconductor fin is smaller than widths of end portions of the second semiconductor fin. The insulators are disposed on the semiconductor substrate. The first and second semiconductor fins are sandwiched by the insulators. The gate stacks are over a portion of the first semiconductor fin and a portion of the second semiconductor fin. The first and second S/Ds respectively covers another portion of the first semiconductor fin and another portion of the second semiconductor fin.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kuan-Jung Chen, I-Chih Chen, Chih-Mu Huang, Kai-Di Wu, Ming-Feng Lee, Ting-Chun Kuan
  • Publication number: 20240113032
    Abstract: Interconnect structure packages (e.g., through silicon vias (TSV) packages, through interlayer via (TIV) packages) may be pre-manufactured as opposed to forming TIVs directly on a carrier substrate during a manufacturing process for a semiconductor die package at backend packaging facility. The interconnect structure packages may be placed onto a carrier substrate during manufacturing of a semiconductor device package, and a semiconductor die package may be placed on the carrier substrate adjacent to the interconnect structure packages. A molding compound layer may be formed around and in between the interconnect structure packages and the semiconductor die package.
    Type: Application
    Filed: April 25, 2023
    Publication date: April 4, 2024
    Inventors: Kai-Fung CHANG, Chin-Wei LIANG, Sheng-Feng WENG, Ming-Yu YEN, Cheyu LIU, Hung-Chih CHEN, Yi-Yang LEI, Ching-Hua HSIEH
  • Patent number: D1025064
    Type: Grant
    Filed: July 21, 2021
    Date of Patent: April 30, 2024
    Assignee: Logitech Europe S.A.
    Inventors: Yi-Hsuan Lin, Blaithin Crampton, Marcel Twohig, Anish Shakthi Ovia Selvan, Anatoliy Polyanker, Jingyan Ma, Ming Feng Hsieh, Olivia Hildebrand