Abstract: A housing fabricating mechanism is used for fabricating a first housing and a second housing of a wireless communication devices, and the housing fabricating mechanism comprises a first fabricating surface of the first housing and a second fabricating surface of the second housing. Where the first fabricating surface of the first housing comprises a first hook and an inserted ditch, the second fabricating surface of the second housing comprises a second hook, an inserting end and a stopper for combining with the first housing fabricating surface. The second hook is located in the opposite position of the first hook and has an opening on the second housing for accommodating and wedging the first hook when the first housing and the second housing are fabricated together. The stopper is used for plugging the opening when the first housing and the second housing are fabricated together so as to prevent the first hook from detaching from the second hook after the two are wedged together.

Abstract: A fixing mechanism for use in a peripheral storage device having a cover and a core, includes a first hook slip element on the cover and a second hook slip element on the core. The first hook slip element is formed with a bending part and an extension part. The second hook slip element is formed with a first step part on which the bending part rests and a hook slip part for the extension part to pass therethrough to be engaged with the hook slip part, such that the cover and the core are hooked together in a way that movement of the cover in both vertical and horizontal directions is restricted with respect to the core.

Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the-same. In one advantageous embodiment the semiconductor device includes a doped layer located over a semiconductor substrate and an isolation trench located in the doped layer. The isolation trench may further include a bottom surface and a sidewall. Additionally, the semiconductor device may include a dopant barrier layer located on the sidewall and a doped region located in the bottom surface.

Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the same. In one advantageous embodiment, the semiconductor device includes a doped layer located over a semiconductor substrate, and an isolation trench located in the doped layer and having a dielectric layer located on a sidewall thereof. The semiconductor device may further include a conductive material located within the isolation trench and an interconnect that electrically connects the conductive material and the doped layer.

Abstract: An adjusting mechanism for an optical pickup head has a cam-shaped adjusting base used to optimally adjust the inclination of optical pickup head. The cam-shaped adjusting base is formed by plastics injection molding in a manner so as to be directly connected to the chassis, which simplifies the assembly process and reduces the production cost.

Abstract: An inkjet cartridge. The inkjet cartridge includes a body and a seal member. The body includes a first chamber, a second chamber, a third chamber, a first exit, a second exit, a third exit, an opening, and a channel. Ink is received in the first chamber, the second chamber, and the third chamber. The second and third chambers communicate with the second and third exits so that the ink in the second and third chambers flows directly to the second and third exits. The channel communicates the first chamber and the first exit so that the ink in the first chamber flows to the first exit via the channel. The seal member is disposed on the channel via the opening, and seals the channel to prevent ink in the first chamber flowing through the first exit from flowing out of the opening.

Abstract: A Schottky diode is fabricated by a sequence of fabrication by a sequence of fabrication steps. An active region of a semiconductor substrate is defined in which a Schottky diode is fabricated. At least first and second layers of insulating material are applied over the active area. A first layer of insulating material, having a first etching rate, is applied over the active area. A second layer of insulating material having a second, greater, etch rate is applied over the first layer of insulating material to a thickness that is about twice the thickness of the first layer of insulating material. The insulating material is patterned and a window is etched through the layers of insulating material to the semiconductor substrate. Metal is applied and unwanted metal is etched away leaving metal in the window forming a Schottky contact therein. One or more barrier layers may be employed.

Abstract: The invention provides methods and compositions relating to identification and use of genetic information from the IL-1 gene cluster—including the structure and organization of novel IL-1-like genes found within the IL-1 locus as well as polymorphisms and associated haplotypes within these genes. The invention thereby expands the repertoire of useful genetic information available from the IL-1 locus—which contains the previously-identified IL-1&agr;, IL-1&bgr; and IL-1RN genes, for predicting IL-1 associated phenotypes (e.g. increased or decreased risks of inflammatory disease) and for treating IL-1 haplotype associated inflammatory phenotypes.

Abstract: A method for filling an ink into an ink cartridge. A filter or an ink passage is treated with a surfactant to increase its hydrophilicity. Therefore, during ink filling, the ink can pass through the filter smoothly or air in the ink passage can be purged without any external force such as a vacuum, thus preventing cracks in the nozzle on the printhead chip.

Abstract: A mechanism for connecting a horizontal upper circuit board to a horizontal lower circuit board includes two insulating bodies fixed respectively on two opposite side portions of the lower circuit board, and two flexible retaining hooks fixed respectively on and projecting respectively and upwardly from the insulating bodies. Each of the insulating bodies has an inner side surface that is formed with a row of pin holes, each of which has a resilient conductive pin mounted therein. The upper circuit board is retained between the retaining hooks, and is clamped between abutment faces of the retaining hooks and upper contact portions of the conductive pins.

Abstract: A ball grid array package includes a chip having a substrate with a bottom surface, a plurality of solder bumps projecting outwardly from the bottom surface of the substrate, and an electromagnetic shield including a housing that defines an inner space which receives the chip and the solder bumps therein, and a bottom opening for access into the inner space. The solder bumps project outwardly of the inner space through the bottom opening in the housing.

Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the semiconductor device. The semiconductor device may include a well doped with a P-type dopant located over a semiconductor substrate. The semiconductor device may further include a buried layer including the P-type dopant located between the well and the semiconductor substrate, and a gate located over the well.

Abstract: A Schottky diode is fabricated by a sequence of fabrication by a sequence of fabrication steps. An active region of a semiconductor substrate is defined in which a Schottky diode is fabricated. At least first and second layers of insulating material are applied over the active area. A first layer of insulating material, having a first etching rate, is applied over the active area. A second layer of insulating material having a second, greater, etch rate is applied over the first layer of insulating material to a thickness that is about twice the thickness of the first layer of insulating material. The insulating material is patterned and a window is etched through the layers of insulating material to the semiconductor substrate. Metal is applied and unwanted metal is etched away leaving metal in the window forming a Schottky contact therein. One or more barrier layers may be employed.

Abstract: A system that determines where a particular XIP component is stored on a medium and loads the component into RAM for execution, providing the ability to demand page specific components at will from storage media, frees up working RAM on memory constrained devices. A Binary File System uses a generic block driver component that loads the XIP code from a block based storage medium. Features of the file system include the ability to load pre-“fixed up” components from a block based device. The invention thus allows an operating system to load code that was previously Executed In Place (XIP) from a block-oriented device.

Abstract: The present invention discloses improved heatsink designs and methods for cooling a heat source. One embodiment is a heatsink assembly for removing heat from an electronic component, the heatsink assembly comprising a copper-based core section having a first surface generally adapted to conform to an exposed mating surface of an electronic device and a second surface having a generally convex curvature having a greater surface area than the first surface. An aluminum-based outer section has a first surface comprising a concave curvature that is generally adapted to conform to the convex curvature of the core and a second surface. A plurality of fin elements protrude outwardly from the second surface of the outer section. At least one cooling fan can be positioned to direct airflow onto the fin elements. The core section can comprise a semi-spherical shape and can be joined by a finger-joint type connection to the outer section.

Abstract: A Schottky diode is fabricated by a sequence of fabrication by a sequence of fabrication steps. An active region of a semiconductor substrate is defined in which a Schottky diode is fabricated. At least first and second layers of insulating material are applied over the active area. A first layer of insulating material, having a first etching rate, is applied over the active area. A second layer of insulating material having a second, greater, etch rate is applied over the first layer of insulating material to a thickness that is about twice the thickness of the first layer of insulating material. The insulating material is patterned and a window is etched through the layers of insulating material to the semiconductor substrate. Metal is applied and unwanted metal is etched away leaving metal in the window forming a Schottky contact therein. One or more barrier layers may be employed.

Abstract: The invention provides methods and reagents for detecting a polymorphism associated with in an upstream region of the interleukin-1 beta (IL-B) gene (IL-1B (−3737)) that affects transcription of the gene and susceptibility to inflammatory and infectious diseases such as periodontal disease and Alzheimer's disease.

Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the same. In one advantageous embodiment, the semiconductor device includes a doped layer located over a semiconductor substrate, and an isolation trench located in the doped layer and having a dielectric layer located on a sidewall thereof. The semiconductor device may further include a conductive material located within the isolation trench and an interconnect that electrically connects the conductive material and the doped layer.

Abstract: The present invention provides a semiconductor device, a method of manufacture therefor, and an integrated circuit including the same. In one advantageous embodiment the semiconductor device includes a doped layer located over a semiconductor substrate and an isolation trench located in the doped layer. The isolation trench may further include a bottom surface and a sidewall. Additionally, the semiconductor device may include a dopant barrier layer located on the sidewall and a doped region located in the bottom surface.

Abstract: A method and apparatus are disclosed for testing the accuracy of digital test images generated by a computer graphics program executed on a computer graphics system. A test program is utilized to compare a test image with a reference image. Regional image quantification verification aims at an image comparison test that accepts minor color value differences and spatial shifts in rendered pixel values. The test image and reference image are divided into corresponding sub-regions. The average color value for each sub-region of the test image is compared to the average color value of the corresponding reference image sub-region and also to other nearby reference image sub-regions. A test image is unacceptably different from a reference image, if for any sub-region of the test image, no reference image sub-region is found with an average color value difference and spatial shift less than specified maximums.