Patents by Inventor Ming-Jui Chen

Ming-Jui Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150052491
    Abstract: A method for generating a layout pattern is provided. First, a layout pattern is provided to a computer system and is classified into two sub-patterns and a blank pattern. Each of the sub-patterns has pitches in simple integer ratios and the blank pattern is between the two sub-patterns. Then, a plurality of first stripe patterns and at least two second stripe patterns are generated. The edges of the first stripe patterns are aligned with the edges of the sub-patterns and the first stripe patterns have equal spacings and widths. The spacings or widths of the second stripe patterns are different from that of the first stripe patterns.
    Type: Application
    Filed: August 15, 2013
    Publication date: February 19, 2015
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Po-Chao Tsao, Shih-Fang Hong, Chia-Wei Huang, Ming-Jui Chen, Shih-Fang Tzou, Ming-Te Wei
  • Publication number: 20150036116
    Abstract: An aperture is configured to be disposed between an illumination source and a semiconductor substrate in a photolithography system. The aperture includes a light-transmission portion with a non-planar thickness profile to compensate the discrepancy of wave-fronts of the light beams of different orders.
    Type: Application
    Filed: August 2, 2013
    Publication date: February 5, 2015
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Te-Hsien Hsieh, Shih-Ming Kuo, Ming-Jui Chen, Cheng-Te Wang, Jing-Yi Lee
  • Patent number: 8930858
    Abstract: A smooth process is provided in the present invention. The smooth process is applied to a retarget layout, wherein the retarget layout is dissected into a plurality of segments. Furthermore, the retarget layout comprises a first original pattern, a first adding pattern and a second adding pattern. The smooth process includes changing the second adding pattern to a first smooth pattern. Latter, a second smooth pattern is added to extend from a bottom of the first smooth pattern and a tail portion of the first adding pattern is shrunk to a third smooth pattern. After the smooth process, an optical proximity correction process is applied to the smooth layout to produce an optical proximity correction layout.
    Type: Grant
    Filed: November 27, 2013
    Date of Patent: January 6, 2015
    Assignee: United Microelectronics Corp.
    Inventors: Hui-Fang Kuo, Ming-Jui Chen
  • Patent number: 8885917
    Abstract: A mask pattern and a correcting method thereof are provided. The correcting method includes the following steps. An original pattern having a first original contour and a second original contour is provided. The first original contour has a first original corner. The second original contour has a second original corner, which is near the first original corner. The first and second original corners are cut to form a cut pattern. An optical proximity correction (OPC) process is applied to the cut pattern to form the mask pattern.
    Type: Grant
    Filed: December 27, 2011
    Date of Patent: November 11, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Te-Hsien Hsieh, Ming-Jui Chen, Cheng-Te Wang, Jing-Yi Lee
  • Publication number: 20140282295
    Abstract: The present invention provides a method for forming at least a photo mask. A first photo-mask pattern relating to a first structure is provides. A second photo-mask pattern relating to a second structure is provides. A third photo-mask pattern relating to a third structure is provides. The first structure, the second structure and the third structure are disposed in a semiconductor structure in sequence. An optical proximity process including a comparison step is provided, wherein the comparison step includes comparing the first photo-mask pattern and the third photo-mask pattern. Last, the first photo-mask pattern is import to form a first mask, the second photo-mask pattern is import to form a second mask, and the third photo-mask pattern is import to form a third mask. The present invention further provides an OPC method.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Hsien Huang, Ming-Jui Chen, Ching-Chun Huang, Chia-Wei Huang, Yu-Feng Chao, Yu-Chuan Chang
  • Publication number: 20140258946
    Abstract: A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth.
    Type: Application
    Filed: May 26, 2014
    Publication date: September 11, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Fang Kuo, Ming-Jui Chen, Ting-Cheng Tseng, Cheng-Te Wang
  • Publication number: 20140256132
    Abstract: A method for patterning a semiconductor structure is provided. The method comprises following steps. A first mask defining a first pattern in a first region and a second pattern in a second region adjacent to the first region is provided. The first pattern defined by the first mask is transferred to a first film structure in the first region, and the second pattern defined by the first mask is transferred to the first film structure in the second region. A second film structure is formed on the first film structure. A second mask defining a third pattern in the first region is provided. At least 50% of a part of the first region occupied by the first pattern defined by the first mask is identical with a part of the first region occupied by the third pattern defined by the second mask.
    Type: Application
    Filed: March 7, 2013
    Publication date: September 11, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Wei Huang, Ming-Jui Chen, Ting-Cheng Tseng, Ping-I Hsieh
  • Patent number: 8822328
    Abstract: A method for patterning a semiconductor structure is provided. The method comprises following steps. A first mask defining a first pattern in a first region and a second pattern in a second region adjacent to the first region is provided. The first pattern defined by the first mask is transferred to a first film structure in the first region, and the second pattern defined by the first mask is transferred to the first film structure in the second region. A second film structure is formed on the first film structure. A second mask defining a third pattern in the first region is provided. At least 50% of a part of the first region occupied by the first pattern defined by the first mask is identical with a part of the first region occupied by the third pattern defined by the second mask.
    Type: Grant
    Filed: March 7, 2013
    Date of Patent: September 2, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chia-Wei Huang, Ming-Jui Chen, Ting-Cheng Tseng, Ping-I Hsieh
  • Patent number: 8810785
    Abstract: A mask inspecting method includes the following steps. A processing parameter is defined. An incident light is decided by the processing parameter. At least a portion of the incident light is emitted to and passes through a first position and a second position of a first area of a mask, to detect a first parameter and a second parameter respectively corresponding to the first position and the second position, and then the variation of the first parameter and the second parameter is compared. Additionally, at least a portion of the incident light is emitted to and passes through a third position and a fourth position of a second area of a mask, to detect a third parameter and a fourth parameter respectively corresponding to the third position and the fourth position, and then the variation of the third parameter and the fourth parameter is also compared.
    Type: Grant
    Filed: August 26, 2011
    Date of Patent: August 19, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Wei-Cyuan Lo, Yung-Feng Cheng, Ming-Jui Chen
  • Patent number: 8806391
    Abstract: A method of optical proximity correction (OPC) includes the following steps. At first, a layout pattern is provided to a computer system. Subsequently, the layout pattern is classified into at least a first region and at least a second region. Then, several iterations of OPC calculations are performed to the layout pattern, and a total number of OPC calculations performed in the first region is substantially larger than a total number of OPC calculations performed in the second region. Afterwards, a corrected layout pattern is outputted through the computer system onto a mask.
    Type: Grant
    Filed: July 31, 2012
    Date of Patent: August 12, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Te-Hsien Hsieh, Ming-Jui Chen, Cheng-Te Wang, Shih-Ming Kuo, Jing-Yi Lee
  • Patent number: 8782569
    Abstract: An inspection method for a photo-mask in a semiconductor process is provided. First, a first photo-mask with a first wafer anchor point (1st wafer FAM) is provided. Then, Dmax and Dmin are calculated according to the 1st wafer FAM. A second photo-mask and a second mask anchor point (2nd mask FAM) of the second photo-mask are provided. A CD average, and a CD range of the second photo-mask are measured. Finally, the second photo-mask is inspected by using equation A and/or equation B: CD average?2nd mask FAM<Dmax?CD range/2??(equation A) 2nd mask FAM?CD average<Dmin?CD range/2??(equation B).
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: July 15, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chain-Ting Huang, Yung-Feng Cheng, Ming-Jui Chen
  • Patent number: 8782572
    Abstract: A method of optical proximity correction (OPC) includes the following steps. First, a layout pattern is provided to a computer system. Subsequently, the layout pattern is classified into a first sub-layout pattern and a second sub-layout pattern. Then, an OPC calculation based on a first OPC model is performed on the first sub-layout pattern so as to form a corrected first sub-layout pattern and an OPC calculation based on a second OPC model is performed on the second sub-layout pattern so as to form a corrected second sub-layout pattern. Afterward, the corrected first sub-layout pattern and the corrected second sub-layout pattern are output from the computer system into a photomask.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: July 15, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Sheng-Yuan Huang, Chia-Wei Huang, Ming-Jui Chen
  • Patent number: 8778604
    Abstract: A mask set for double exposure process and method of using said mask set. The mask set is provided with a first mask pattern having a first base and a plurality of first teeth and protruding portions, and a second mask pattern having a second base and a plurality of second teeth, wherein the second base may at least partially overlap the first base such that each of the protruding portions at least partially overlaps one of the second teeth.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: July 15, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Hui-Fang Kuo, Ming-Jui Chen, Ting-Cheng Tseng, Cheng-Te Wang
  • Patent number: 8745547
    Abstract: A method for making a photomask layout is disclosed. A graphic data of a photomask is provided. A first correction step is performed to the graphic data. A first verification step is performed to all of the graphic data which has been subjected to the first correction step, wherein at least one failed pattern not passing the first verification step is found. A second correction step is performed to the at least one failed pattern, so as to obtain at least one modified pattern. A second verification step is performed only to at least one buffer region covering the at least one modified pattern, wherein the buffer region has an area less than a whole area of the photomask. Besides, each of the first correction step, the first verification step, the second correction step and the second verification step is executed by a computer.
    Type: Grant
    Filed: July 11, 2013
    Date of Patent: June 3, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Shih-Ming Kuo, Ming-Jui Chen, Te-Hsien Hsieh, Cheng-Te Wang, Jing-Yi Lee
  • Patent number: 8741507
    Abstract: A method for separating photomask pattern, including the following steps: first, a layout pattern is provided, wherein the layout pattern is defined to have at least one critical pattern and at least one non-critical pattern. Then, a first split process is performed to separate the critical pattern into a plurality of first patterns and a plurality of second patterns. A second split process is performed to separate the non-critical pattern into a plurality of third patterns and a plurality of fourth patterns. Finally, the first patterns and the third patterns are output to a first photomask, and the second patterns and the fourth patterns are output to a second photomask.
    Type: Grant
    Filed: January 16, 2013
    Date of Patent: June 3, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Chun-Hsien Huang, Ming-Jui Chen, Chia-Wei Huang, Ting-Cheng Tseng
  • Patent number: 8701052
    Abstract: A method of optical proximity correction (OPC) includes the following steps. A layout pattern is provided to a computer system, and the layout pattern is classified into at least a first sub-layout pattern and at least a second sub-layout pattern. Then, at least an OPC calculation is performed respectively on the first sub-layout pattern and the second sub-layout pattern to form a corrected first sub-layout pattern and a corrected second sub-layout pattern. The corrected first sub-layout pattern/the corrected second sub-layout pattern and the layout pattern are compared to select a part of the corrected first sub-layout pattern/the corrected second sub-layout pattern as a first selected pattern/the second selected pattern, and the first selected pattern/the second selected pattern is further altered to modify the corrected first sub-layout pattern/the corrected second sub-layout pattern as a third sub-layout pattern/a fourth sub-layout pattern.
    Type: Grant
    Filed: January 23, 2013
    Date of Patent: April 15, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Hui-Fang Kuo, Ming-Jui Chen, Cheng-Te Wang
  • Publication number: 20140045105
    Abstract: A method for fabricating a semiconductor layout includes providing a first layout having a plurality of line patterns and a second layout having a plurality of connection patterns, defining at least a first to-be-split pattern overlapping with the connection pattern among the line patterns, splitting the first to-be-split pattern at where the first to-be-split pattern overlapping with the connection pattern, decomposing the first layout to form a third layout and a fourth layout, and outputting the third layout and the further layout to a first mask and a second mask respectively.
    Type: Application
    Filed: October 29, 2013
    Publication date: February 13, 2014
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chia-Wei Huang, Ming-Jui Chen, Chun-Hsien Huang
  • Publication number: 20140040837
    Abstract: A method of optical proximity correction (OPC) includes the following steps. At first, a layout pattern is provided to a computer system. Subsequently, the layout pattern is classified into at least a first region and at least a second region. Then, several iterations of OPC calculations are performed to the layout pattern, and a total number of OPC calculations performed in the first region is substantially larger than a total number of OPC calculations performed in the second region. Afterwards, a corrected layout pattern is outputted through the computer system onto a mask.
    Type: Application
    Filed: July 31, 2012
    Publication date: February 6, 2014
    Inventors: Te-Hsien Hsieh, Ming-Jui Chen, Cheng-Te Wang, Shih-Ming Kuo, Jing-Yi Lee
  • Patent number: 8627242
    Abstract: A method for making a photomask layout is provided. A first graphic data of a photomask is provided, wherein the first graphic data includes a first line with a first line end target, a second line with a second line end target and a hole, the first line is aligned with the second line, and the first line, the second line and the hole partially overlap with each other. Thereafter, a retarget step is performed to the first graphic data to obtain a second graphic data, wherein the retarget step includes moving the first line end target and the second line end target in opposite directions away from each other.
    Type: Grant
    Filed: January 30, 2013
    Date of Patent: January 7, 2014
    Assignee: United Microelectronics Corp.
    Inventors: Hui-Fang Kuo, Ming-Jui Chen, Cheng-Te Wang
  • Patent number: 8598712
    Abstract: A method for fabricating a semiconductor layout includes providing a first layout having a plurality of line patterns and a second layout having a plurality of connection patterns, defining at least a first to-be-split pattern overlapping with the connection pattern among the line patterns, splitting the first to-be-split pattern at where the first to-be-split pattern overlapping with the connection pattern, decomposing the first layout to form a third layout and a fourth layout, and outputting the third layout and the further layout to a first mask and a second mask respectively.
    Type: Grant
    Filed: June 20, 2011
    Date of Patent: December 3, 2013
    Assignee: United Microelectronics Corp.
    Inventors: Chia-Wei Huang, Ming-Jui Chen, Chun-Hsien Huang