Patents by Inventor Ming Lee

Ming Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129167
    Abstract: A communication receiver includes a first signal processing circuit and a second signal processing circuit. The first signal processing circuit includes a first feedforward equalizer and a decision circuit. The first feedforward equalizer processes a received signal to generate a first equalized signal. The decision circuit performs hard decision upon the first equalized signal to generate a first symbol decision signal. The second signal processing circuit includes a second feedforward equalizer, a decision feedforward equalizer, and a first decision feedback equalizer. The second feedforward equalizer processes the first equalized signal to generate a second equalized signal. The decision feedforward equalizer processes the first symbol decision signal to generate a third equalized signal. The first decision feedback equalizer generates a second symbol decision signal according to the second equalized signal and the third equalized signal.
    Type: Application
    Filed: September 18, 2023
    Publication date: April 18, 2024
    Applicant: MEDIATEK INC.
    Inventors: Chung-Hsien Tsai, Che-Yu Chiang, Yu-Ting Liu, Tsung-Lin Lee, Chia-Sheng Peng, Ting-Ming Yang
  • Publication number: 20240128676
    Abstract: A connector assembly includes a base, a wire unit, and a wire fixing unit. The base includes a body and two side wings. The two side wings are respectively rotatably connected to two opposite sides of the body, and each of the side wings includes a first fixing portion. The wire unit is located between the two side wings. The wire unit includes a connection seat disposed in the body, and various wires disposed in the connection seat and protruding from one side of the connection seat. The wire fixing unit includes two second fixing portions and various through holes, in which the through holes are located between the two second fixing portions, the two first fixing portions respectively clamp the two second fixing portions, and the wires correspondingly pass through the through holes.
    Type: Application
    Filed: December 22, 2022
    Publication date: April 18, 2024
    Inventors: Lei-Ming LEE, Hung-Chuan LIN
  • Patent number: 11961768
    Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Yu-Sheng Wang, Chih-Hsiang Fan, Kun-Wa Kuok
  • Publication number: 20240120411
    Abstract: A method of forming a semiconductor structure includes the following operations. A semiconductor epitaxial layer is formed on a first semiconductor substrate. A first side of the semiconductor epitaxial layer is adhered to a transfer substrate by an adhesive layer covering the first side of the semiconductor epitaxial layer. The semiconductor epitaxial layer and the first semiconductor substrate are turned over by the transfer substrate. The first semiconductor substrate is removed to expose a second side of the semiconductor epitaxial layer opposite to the first side. A first semiconductor doped region is formed on the second side of the semiconductor epitaxial layer. After the first semiconductor doped region is formed, the adhesive layer and the transfer substrate are removed.
    Type: Application
    Filed: February 17, 2023
    Publication date: April 11, 2024
    Inventors: Yu-Tsu LEE, Yan-Ru CHEN, Liang-Ming LIU, Kuang-Hao CHIANG
  • Publication number: 20240119874
    Abstract: Disclosed are a source driver and a method of detecting crack of a display panel. A source driver may comprise a first circuit configured to apply first data to data lines connected to sub-pixels of a display panel to charge a first driving voltage; and a second circuit formed on the display panel that applies the first driving voltage to a detection line formed on the display panel to detect the presence of cracks in the display panel based on the illumination status of the sub-pixels, wherein the detection line includes a first detection node and a second detection node formed on one side of the display panel along its extension direction, wherein the first detection node is connected to data lines of the first and third sub-pixels, and wherein the second detection node is connected to data line of the second sub-pixel.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 11, 2024
    Applicant: LX SEMICON CO., LTD.
    Inventors: Byeon Cheol LEE, Seong Geon KIM, Won KIM, Tai Ming PIAO, Young Ho SHIN
  • Patent number: 11957064
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: October 18, 2022
    Date of Patent: April 9, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 11955397
    Abstract: A semiconductor structure is provided. The semiconductor structure includes a substrate, a channel layer, a barrier layer, a compound semiconductor layer, a gate electrode, and a stack of dielectric layers. The channel layer is disposed on the substrate. The barrier layer is disposed on the channel layer. The compound semiconductor layer is disposed on the barrier layer. The gate electrode is disposed on the compound semiconductor layer. The stack of dielectric layers is disposed on the gate electrode. The stack of dielectric layers includes layers having different etching rates.
    Type: Grant
    Filed: November 9, 2020
    Date of Patent: April 9, 2024
    Assignee: Vanguard International Semiconductor Corporation
    Inventors: Shin-Cheng Lin, Cheng-Wei Chou, Ting-En Hsieh, Yi-Han Huang, Kwang-Ming Lin, Yung-Fong Lin, Cheng-Tao Chou, Chi-Fu Lee, Chia-Lin Chen, Shu-Wen Chang
  • Patent number: 11957070
    Abstract: A memory cell includes a memory device, a connecting structure, an insulating layer and a selector. The connecting structure is disposed on and electrically connected to the memory device. The insulating layer covers the memory device and the connecting structure. The selector is located on and electrically connected to the memory device, where the selector is disposed on the insulating layer and connected to the connecting structure by penetrating through the insulating layer.
    Type: Grant
    Filed: August 6, 2021
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Tung-Ying Lee, Bo-Jiun Lin, Shao-Ming Yu, Yu-Chao Lin
  • Publication number: 20240114158
    Abstract: A computer-implemented method for generating video representations utilizing a hierarchical video encoder includes obtaining a video, wherein the video includes a plurality of frames, processing each of the plurality of frames with a machine-learned frame-level encoder model to respectively generate a plurality of frame representations for the plurality of frames, the plurality of frame representations respective to the plurality of frames determining a plurality of segment representations representative of a plurality of video segments including one or more of the plurality of frames, the plurality of segment representations based at least in part on the plurality of frame representations, processing the plurality of segment representations with a machine-learned segment-level encoder model to generate a plurality of contextualized segment representations, determining a video representation based at least in part on the plurality of contextualized segment representations, and providing the video representati
    Type: Application
    Filed: December 5, 2023
    Publication date: April 4, 2024
    Inventors: Vihan Jain, Joonseok Lee, Ming Zhao, Sheide Chammas, Hexiang Hu, Bowen Zhang, Fei Sha, Tze Way Eugene Ie
  • Publication number: 20240112905
    Abstract: A method of forming a semiconductor device includes forming a mask layer over a substrate and forming an opening in the mask layer. A gap-filling material is deposited in the opening. A plasma treatment is performed on the gap-filling material. The height of the gap-filling material is reduced. The mask layer is removed. The substrate is patterned using the gap-filling material as a mask.
    Type: Application
    Filed: November 30, 2023
    Publication date: April 4, 2024
    Inventors: Ching-Yu Chang, Jei Ming Chen, Tze-Liang Lee
  • Publication number: 20240113237
    Abstract: The present disclosure provides a semiconductor structure and a method of manufacturing the same. The semiconductor structure includes a sensing device, a solar cell, and an interconnecting structure. The solar cell is disposed above the sensing device and is electrically connected to the sensing device. The interconnecting structure is disposed between the sensing device and the solar cell and has a first surface facing the solar cell and a second surface facing the sensing devices. The interconnecting structure comprises a first energy storage component and a second energy storage component. The first energy storage component is disposed closer to the first surface of the interconnecting structure than the second energy storage component.
    Type: Application
    Filed: January 10, 2023
    Publication date: April 4, 2024
    Inventors: FENG-CHIEN HSIEH, YUN-WEI CHENG, KUO-CHENG LEE, CHENG-MING WU, PING KUAN CHANG
  • Publication number: 20240110190
    Abstract: Compositions and methods for treating fibrosis using oligonucleotide-based therapies are provided. These therapies can be used to increase expression of Bone morphogenetic protein receptor type II (BMPR2) via inhibition of upstream Open Reading Frames, thereby reducing vasoconstriction, vascular remodeling, and formation of fibrosis, particularly pulmonary arterial fibrosis related in patients in need thereof.
    Type: Application
    Filed: February 28, 2022
    Publication date: April 4, 2024
    Applicant: THE TRUSTEES OF THE UNIVERSITY OF PENNSYLVANIA
    Inventors: Yoseph BARASH, David Sheng Ming LEE, Louis R. GHANEM, Nicholas J. HAND
  • Patent number: 11944935
    Abstract: A gas detection purification device is disclosed and includes a main body, a purification unit, a gas guider, a gas detection module and a controlling-driving module. The main body includes an inlet, an outlet, an external socket and a gas-flow channel disposed between the inlet and the outlet. The purification unit is disposed in the gas-flow channel for filtering gas introduced through the gas-flow channel. The gas guider is disposed in the gas channel and located at a side of the purification unit. The gas is inhaled through the inlet, flows through the purification unit and is discharged out through the outlet. The gas detection module is plugged into or detached from the external socket. The controlling driving module is disposed within the main body and electrically connected to the gas guider to control the operation of the gas guider in an enabled state and a disabled state.
    Type: Grant
    Filed: December 2, 2020
    Date of Patent: April 2, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Yung-Lung Han, Chi-Feng Huang, Chang-Yen Tsai, Wei-Ming Lee, Tsung-I Lin
  • Patent number: 11946569
    Abstract: An actuating and sensing module is disclosed and includes a bottom plate, a gas pressure sensor, a thin gas transportation device and a cover plate. The bottom plate includes a pressure relief orifice, a discharging orifice and a communication orifice. The gas pressure sensor is disposed on the bottom plate and seals the communication orifice. The thin gas transportation device is disposed on the bottom plate and seals the pressure relief orifice and the discharging orifice. The cover plate is disposed on the bottom plate and covers the gas pressure sensor and the thin gas-transportation device. The cover plate includes an intake orifice. The thin gas transportation device is driven to inhale gas through the intake orifice, the gas is then discharged through the discharging orifice by the thin gas transportation device, and a pressure change of the gas is sensed by the gas pressure sensor.
    Type: Grant
    Filed: April 19, 2021
    Date of Patent: April 2, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Shih-Chang Chen, Jia-Yu Liao, Hung-Hsin Liao, Chung-Wei Kao, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee
  • Patent number: 11950491
    Abstract: A semiconductor mixed material comprises an electron donor, a first electron acceptor and a second electron acceptor. The first electron donor is a conjugated polymer. The energy gap of the first electron acceptor is less than 1.4 eV. At least one of the molecular stackability, ?-?*stackability, and crystallinity of the second electron acceptor is smaller than the first electron acceptor. The electron donor system is configured to be a matrix to blend the first electron acceptor and the second electron acceptor. The present invention also provides an organic electronic device including the semiconductor mixed material.
    Type: Grant
    Filed: November 17, 2020
    Date of Patent: April 2, 2024
    Assignee: RAYNERGY TEK INCORPORATION
    Inventors: Yi-Ming Chang, Chuang-Yi Liao, Wei-Long Li, Yu-Tang Hsiao, Chun-Chieh Lee, Chia-Hua Li, Huei-Shuan Tan
  • Patent number: 11944412
    Abstract: A blood pressure detection device manufactured by a semiconductor process includes a substrate, a microelectromechanical element, a gas-pressure-sensing element, a driving-chip element, an encapsulation layer and a valve layer. The substrate includes inlet apertures. The microelectromechanical element and the gas-pressure-sensing element are stacked and integrally formed on the substrate. The encapsulation layer is encapsulated and positioned on the substrate. A flowing-channel space is formed above the microelectromechanical element and the gas-pressure-sensing element. The encapsulation layer includes an outlet aperture in communication with an airbag. The driving-chip element controls the microelectromechanical element, the gas-pressure-sensing element and valve units to transport gas.
    Type: Grant
    Filed: June 2, 2021
    Date of Patent: April 2, 2024
    Assignee: MICROJET TECHNOLOGY CO., LTD.
    Inventors: Hao-Jan Mou, Ying-Lun Chang, Ching-Sung Lin, Chi-Feng Huang, Yung-Lung Han, Chang-Yen Tsai, Wei-Ming Lee, Chun-Yi Kuo, Tsung-I Lin
  • Patent number: 11946252
    Abstract: Some embodiments of the present disclosure relate to an roofing shingle comprising a low penetration point asphalt reinforced glass mat. In some embodiments, the reinforced glass mat comprises a glass mat and a reinforcement material. In some embodiments, the glass mat comprises a web of glass fibers. In some embodiments, the reinforcement material is embedded into the web of glass fibers of the glass mat. In some embodiments, the reinforced glass mat comprises a sufficient amount of the reinforcement material, so as to result in a nail shank shear resistance of 13 lbs to 17 lbs, according to ASTM 1761 at 140° F. Methods of making the roofing shingle and methods of forming a roofing shingle from the roofing shingle are also disclosed herein.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: April 2, 2024
    Assignee: BMIC LLC
    Inventors: Ming-Liang Shiao, Jim Svec, Brian Lee
  • Patent number: 11949002
    Abstract: In an embodiment, a method includes: forming a fin extending from a substrate, the fin having a first width and a first height after the forming; forming a dummy gate stack over a channel region of the fin; growing an epitaxial source/drain in the fin adjacent the channel region; and after growing the epitaxial source/drain, replacing the dummy gate stack with a metal gate stack, the channel region of the fin having the first width and the first height before the replacing, the channel region of the fin having a second width and a second height after the replacing, the second width being less than the first width, the second height being less than the first height.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: April 2, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: I-Hsieh Wong, Yen-Ting Chen, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 11949177
    Abstract: An antenna has an exciting element disposed above a ground plane of an electronic device. Power fed to the exciting element excites the ground plane to generate radiation. In this way, radiation capability of the ground plane is not affected by clearance between a display screen and the ground plane, and the antenna is applicable to an electronic device with limited antenna space. In addition, the ground plane serves as a radiation aperture of the electronic device.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: April 2, 2024
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventors: Yan Wang, Chien-Ming Lee, Jikang Wang, Jiaqing You, Hanyang Wang
  • Publication number: 20240102194
    Abstract: A plating system and a method thereof are disclosed. The plating system performs a N-stage plating drilling filling process in which a M-th stage plating drilling filling process with a M-th current density is performed on a hole of a substrate for a M-th plating time to form a M-th plating layer on the to-be-plated layer, wherein N is a positive integer equal to or greater than 3, and M is a positive integer positive integer in a range of 1 to N. Therefore, the technical effect of providing a higher drilling filling rate than conventional plating filling technology under a condition that a total thickness of plating layers is fixed can be achieved.
    Type: Application
    Filed: August 7, 2023
    Publication date: March 28, 2024
    Inventors: Cheng-EN HO, Yu-Lian CHEN, Cheng-Chi WANG, Yu-Jen CHANG, Yung-Sheng LU, Cheng-Yu LEE, Yu-Ming LIN