Patents by Inventor Ming Liu

Ming Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250107454
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on a first sidewall of the MTJ, and a second spacer on a second sidewall of the MTJ. Preferably, the first spacer and the second spacer are asymmetric, the first spacer and the second spacer have different heights, and a top surface of the MTJ includes a reverse V-shape.
    Type: Application
    Filed: December 11, 2024
    Publication date: March 27, 2025
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Ying-Cheng Liu, Yi-An Shih, Yi-Hui Lee, Chen-Yi Weng, Chin-Yang Hsieh, I-Ming Tseng, Jing-Yin Jhang, Yu-Ping Wang
  • Publication number: 20250102701
    Abstract: Disclosed are a method and a device for identifying full-section excavation parameters of large-section tunnel with broken surrounding rock, which is capable of solving the problem of inaccurate arrangement of blasting hole points in tunnel excavation engineering, including following steps: establishing a three-dimensional finite element model based on a blasting section design of a tunnel; performing a simulation with the three-dimensional finite element model based on blasting design parameters to obtain blasting quality parameters; selecting a group closest to a preset quality parameter from multiple groups of the blasting design parameters as target blasting design parameters, wherein the preset quality parameter is an acceptance grade standard of the tunnel; obtaining first thermal imaging information of a first hot spot of a surface to be blasted; calibrating actual hole spacing parameters based on the first thermal imaging information and the target blasting design parameters.
    Type: Application
    Filed: October 11, 2024
    Publication date: March 27, 2025
    Inventors: Jun GAO, Zhongyi ZHANG, Xiao LIN, Xiaowei ZUO, Kaiwen LIU, Ming ZHANG, Bin ZHOU, Feng WANG, Yuxin GAO, Huiling XUE, Ling WANG, Zhengyi WANG, Xiaokai WEN, Yongtai WANG, Dan XU, Ke CHEN, Tenghui XU, Zhiguo LIU, Yongguo QI, Geng CHEN, Songzhen LI, Junlei ZHOU, Juntao KANG, Chunfeng MENG, Dongsheng XU, Linyue GAO
  • Publication number: 20250107137
    Abstract: A lateral power semiconductor device layout and a device structure belong to the technical field of power semiconductor devices. A method for designing a lateral power semiconductor device layout with high integrity and high cell density has the following advantages of reducing a specific on-resistance of the device, increasing a width of a channel per unit area, improving the current capability of the device, optimizing the static characteristic of the device, reducing the area of a drain region and the parasitic capacitance of the device, reducing the delay time of a cell switch caused by an excessively long gate electrode of a traditional finger cell, optimizing the dynamic characteristic of the device, optimizing the cell edge of the device and the curvature effect of a terminal, and reducing the pre-breakdown risk of the device.
    Type: Application
    Filed: December 28, 2023
    Publication date: March 27, 2025
    Applicant: University of Electronic Science and Technology of China
    Inventors: Ming QIAO, Jiawei WANG, Dingxiang MA, Yue GAO, Gen LIU, Shengduo WANG, Yuanqing YE, Bo ZHANG
  • Publication number: 20250107244
    Abstract: A semiconductor device includes a first diode having a first cathode and a first anode, wherein the first cathode is floating. The semiconductor device includes a second diode having a second cathode and a second anode, wherein the first anode is coupled to the second anode with the second cathode connected to a first supply voltage. The semiconductor device includes a third diode having a third cathode and a third anode, wherein the third cathode is connected to the first anode at an input/output pin, with the third anode connected to a second supply voltage. The second anode is coupled to a circuit that is powered by the first supply voltage and the second supply voltage. The first diode has a first size and the second diode has a second size, and the first size is substantially greater than the second size.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Li-Wei Chu, Jam-Wem Lee, Wun-Jie Lin, Shou Ming Liu
  • Publication number: 20250104640
    Abstract: A driving circuit includes a driving signal generation circuit, a gating circuit, an output control circuit, an output circuit, a voltage control circuit and a second node control circuit; the driving signal generation circuit generates an Nth stage of driving signal; the output control circuit controls to connect the first control node and the second node under the control of the potential of the first node; the gating circuit writes a gating input signal into the first node under the control of a gating control signal; the voltage control circuit controls a potential of the second node according to the potential of the first node; the second node control circuit controls to connect the second node and the first voltage terminal under the control of the potential of the first node.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 27, 2025
    Applicants: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ziyang Yu, Haijun Qiu, Ming Hu, Zhiliang Jiang, Tianyi Cheng, Jianpeng Wu, Wenbo Chen, Mengqi Wang, Cong Liu, Qian Xu, Erjin Zhao
  • Publication number: 20250104762
    Abstract: A Compute-In-Memory (CIM) architecture includes a plurality of memories and a plurality of processing elements. Each of the processing elements has a look-up table unit configured to store values of a look-up table of a k-cluster residue number system, and output one of the values of the look-up table according to a first remainder and a second remainder as a result of a residue calculation. The look-up table unit receives the first remainder and the second remainder from one of the memories.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Applicant: Kneron Inc.
    Inventors: Oscar Ming Kin LAW, Chun Chen LIU
  • Publication number: 20250098916
    Abstract: The present disclosure provides a hair cutting assembly, a cleaning device and a cutting control method, and the hair cutting assembly includes a housing; a rolling brush connected to the housing, and the rolling brush comprises a rotating axis and is able to rotate with respect to the housing along the rotating axis; a fixed blade, connected to the housing, and the fixed blade is fixed relative to the housing; a movable blade, connected to the housing, and the movable blade can move with respect to the fixed blade, the movable blade abuts on the fixed blade and the fixed blade is adjacent to the movable blade with respect to the circumferential direction of the rolling brush.
    Type: Application
    Filed: July 28, 2023
    Publication date: March 27, 2025
    Inventors: Hui GUO, Ming LIU, Manman CHEN, Ruochen CHAO
  • Publication number: 20250103796
    Abstract: Example embodiments relate to expanding textual content using transfer learning and iterative inference. An example method includes receiving, by a computing device, a snippet of text that contains one or more terms expressed using succinct representations. The method also includes performing an iterative expansion, by the computing device, using the snippet of text as an input snippet of text. The iterative expansion includes receiving, by the computing device, the input snippet of text. The iterative expansion also includes determining, by the computing device using a machine-learned model, a set of intermediate expanded snippets. Each of the intermediate expanded snippets has an associated score based on the machine-learned model.
    Type: Application
    Filed: February 23, 2023
    Publication date: March 27, 2025
    Inventors: Alvin Rajkomar, Eric Loreaux, Yuchen Liu, Ming-Jun Chen, Yi Zhang, Afroz Mohiuddin, Juraj Gottweis
  • Patent number: 12260816
    Abstract: Provided are a pixel circuit, a driving method and a display apparatus, including: a light emitting device; a driving transistor, configured to produce a current for driving the light emitting device to emit light according to a data voltage; a voltage control circuit, coupled to the driving transistor, wherein the voltage control circuit is configured to reset the driving transistor (M0) and input the data voltage in response to a loaded signal; and a light emitting control circuit, coupled to the driving transistor and the light emitting device, wherein the light emitting control circuit is configured to provide the current produced by the driving transistor to the light emitting device; wherein a frequency of resetting the driving transistor is not less than a frequency of inputting the data voltage.
    Type: Grant
    Filed: January 29, 2022
    Date of Patent: March 25, 2025
    Assignees: Chengdu BOE Optoelectronics Technology Co., Ltd., BOE Technology Group Co., Ltd.
    Inventors: Yi Zhang, Ming Hu, Huijuan Yang, Tingliang Liu, Kai Zhang, Haijun Qiu, Youngyik Ko, Tinghua Shang, Biao Liu
  • Patent number: 12259558
    Abstract: An optical sensor includes a light source emitting signal light, a light sensing element on an optical path of the signal light, and a photoelectric conversion element on a side of the light sensing element away from the light source. The light sensing element is used to receive ambient light and the signal light on one side and transmit an incident light on another side, wherein a transmittance of the light sensing element changes according to an intensity of the ambient light to adjust an intensity of the incident light transmitted from the light sensing element. The photoelectric conversion element is configured to receive the incident light transmitted from the light sensing element, and to output a voltage modulation signal according to the incident light. A glasses is also provided.
    Type: Grant
    Filed: January 8, 2024
    Date of Patent: March 25, 2025
    Assignees: Asphetek Solution (Chengdu) Ltd., ADVANCED OPTOELECTRONIC TECHNOLOGY, INC., Asphetek Solution Inc.
    Inventors: Yuan-Ting Liang, Chung-Wu Liu, Yi-Huan Chou, I-Ming Cheng
  • Patent number: 12257890
    Abstract: A method and a system for controlling cooling of a vehicle, and a vehicle are provided in the present disclosure. In the present disclosure, a maximum value among cooling demand values of cooling objects is used to control a servo component in a cooling system to operate according to an execution opening determined by a preset corresponding relation, so that operating states of the servo components may be correlated and may be comprehensively controlled, so as to prevent the control system from oscillating and improve control stability, thus solving a problem that periodic oscillation of the operating states of the servo components is easily caused and service life of the servo components is affected in existing control modes of the cooling system of the vehicle.
    Type: Grant
    Filed: August 19, 2021
    Date of Patent: March 25, 2025
    Assignee: GREAT WALL MOTOR COMPANY LIMITED
    Inventors: Xuemeng Li, Chao Li, Haolong Fan, Zhenhui Liu, Ming Sun
  • Patent number: 12258507
    Abstract: The present invention provides a fluorescent diamond containing an MV center emitting fluorescence at a concentration of 1×1014/cm3 or higher, where M represents a metal or metalloid, and V represents a vacancy.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: March 25, 2025
    Assignees: DAICEL CORPORATION, KYUSHU INSTITUTE OF TECHNOLOGY
    Inventors: Motoi Nakao, Shinji Nagamachi, Masahiro Nishikawa, Ming Liu
  • Patent number: 12262647
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a spacer adjacent to the MTJ, a liner adjacent to the spacer, and a first metal interconnection on the MTJ. Preferably, the first metal interconnection includes protrusions adjacent to two sides of the MTJ and a bottom surface of the protrusions contact the liner directly.
    Type: Grant
    Filed: March 1, 2024
    Date of Patent: March 25, 2025
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 12260902
    Abstract: A complementary storage unit and a method of preparing the same, and a complementary memory. The complementary storage unit includes: a control transistor, a pull-up diode and a pull-down diode. The control transistor is configured to control reading and writing of the storage unit. One end of the pull-up diode is connected to a positive selection line, and the other end thereof is connected to a source end of the control transistor, so as to control a high-level input. One end of the pull-down diode is connected to a negative selection line, and the other end thereof is connected to the source end of the control transistor, so as to control a low-level input. The pull-up diode and the pull-down diode are symmetrically arranged in a first direction.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: March 25, 2025
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Qing Luo, Bing Chen, Hangbing Lv, Ming Liu, Cheng Lu
  • Patent number: 12262013
    Abstract: A point cloud encoding method, including: obtaining attribute information about the attributes of a current point in a point cloud; processing the attribute information of the current point to obtain a residual value of the attribute information of the current point; using a target quantization manner, quantizing the residual value of the attribute information of the current point to obtain a quantized residual value of the attribute information of the current point; the target quantization manner comprises at least two of the following quantization manners: a first quantization manner, a second quantization manner, and a third quantization manner.
    Type: Grant
    Filed: March 23, 2023
    Date of Patent: March 25, 2025
    Assignee: GUANGDONG OPPO MOBILE TELECOMMUNICATIONS CORP., LTD.
    Inventors: Hui Yuan, Xiaohui Wang, Ming Li, Lu Wang, Qi Liu
  • Publication number: 20250094234
    Abstract: A system and computer-implemented method include accessing a request for allocating graphical processing unit (GPU) resources for performing an operation. The request includes metadata identifying a client identifier associated with a client, throughput, and a latency of the operation. A predicted resource limit for performing the operation is determined based on the metadata. A parameter of GPU resources is obtained. The parameter includes a status indicating whether a GPU resource is occupied for performing another operation. A GPU resource utilization value is determined for each node based on the status. The GPU resource utilization value indicates the amount of utilization of GPU resources of the corresponding node. The GPU resource utilization value of each node is compared with a pre-defined resource utilization threshold value. The GPU resources are re-scheduled based on the predicted resource limit. Further, a set of GPU resources from the re-scheduled GPU resources for performing the operation.
    Type: Application
    Filed: May 28, 2024
    Publication date: March 20, 2025
    Applicant: Oracle International Corporation
    Inventors: Ming Fang, Yifeng Liu, Simo Lin, Wei Gao
  • Publication number: 20250089741
    Abstract: The present disclosure relates animal feed or animal feed additives comprising one or more polypeptides having lysozyme activity. The present disclosure also relates to polypeptides having lysozyme activity, polynucleotides encoding the polypeptides nucleic acid constructs, vectors, and host cells comprising the polynucleotides as well as methods of producing and using the polypeptides.
    Type: Application
    Filed: November 22, 2024
    Publication date: March 20, 2025
    Applicant: Novozymes A/S
    Inventors: Mikkel KLAUSEN, Kirk Matthew SCHNORR, Soeren NYMAND-GRARUP, Peter Bjarke OLSEN, Marianne Thorup COHN, Robert Piotr OLINSKI, Marc Dominique MORANT, Ming LI, Ye LIU, Lars Kobbeeroee SKOV, Dominique Aubert SKOVLUNDE, Han BUCONG
  • Publication number: 20250094292
    Abstract: Techniques for recovering data involve determining, in response to a request of user equipment, at least one storage block to be recovered under the request, wherein the at least one storage block is composed of storage regions. Such techniques further involve acquiring a cache type of the at least one storage block in a buffer, wherein the cache type is based on the number of recovery regions indicated by the buffer for the at least one storage block. Such techniques further involve determining, based on the cache type, cache regions from regions composing the at least one storage block. Such techniques further involve updating recovery data in the cache regions to the buffer. Such techniques further involve recovering, in response to a recovery confirmation operation, data of the at least one storage block in the user equipment based on the recovery data cached in the buffer after the update.
    Type: Application
    Filed: March 25, 2024
    Publication date: March 20, 2025
    Inventors: Ming Zhang, Chen Gong, Liangfeng Zhu, Jian Liu
  • Publication number: 20250096140
    Abstract: An interconnect structure, along with methods of forming such, are described. The structure includes a dielectric layer, a conductive feature disposed in the dielectric layer, and a conductive layer disposed over the dielectric layer, wherein the conductive layer includes a first portion and a second portion adjacent the first portion. The structure also includes a first barrier layer in contact with the first portion of the conductive layer, a second barrier layer in contact with the second portion of the conductive layer, and a dielectric material disposed between and in contact with the first and second barrier layers, wherein a bottom surface of the second barrier layer and a bottom surface of the dielectric material are substantially co-planar.
    Type: Application
    Filed: September 17, 2023
    Publication date: March 20, 2025
    Inventors: Hsien-Chang WU, Shih-Kang FU, Shin-Yi YANG, Gary LIU, Ting-Ya LO, Ming-Han LEE
  • Publication number: 20250098383
    Abstract: A display panel includes a substrate, a plurality of connection wires, an isolation region and a first electrostatic discharge structure disposed on a second surface. The substrate includes a first surface and a second surface that are opposite, and a plurality of side surfaces, and at least one of the side surfaces is a selected side surface. The connection wires are arranged side by side at intervals, and each of the connection wires includes a first-segment wire, a second-segment wire and a third-segment wire connected in sequence. The first-segment wire is located on the first surface, the second-segment wire is located on the selected side surface, and the third-segment wire is located on the second surface. The first electrostatic discharge structure is arranged on a side of third-segment wires away from the selected side surface. The isolation region is located between the third-segment wires and the first electrostatic discharge structure.
    Type: Application
    Filed: December 19, 2022
    Publication date: March 20, 2025
    Applicants: BOE MLED Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Lili WANG, Jing WANG, Chao LIU, Sha FENG, Ming ZHAI, Qi QI