Patents by Inventor Ming Liu

Ming Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240071504
    Abstract: A memory device is provided, including a memory array, a driver circuit, and recover circuit. The memory array includes multiple memory cells. Each memory cell is coupled to a control line, a data line, and a source line and, during a normal operation, is configured to receive first and second voltage signals. The driver circuit is configured to output at least one of the first voltage signal or the second voltage signal to the memory cells. The recover circuit is configured to output, during a recover operation, a third voltage signal, through the driver circuit to at least one of the memory cells. The third voltage signal is configured to have a first voltage level that is higher than a highest level of the first voltage signal or the second voltage signal, or lower than a lowest level of the first voltage signal or the second voltage signal.
    Type: Application
    Filed: August 30, 2022
    Publication date: February 29, 2024
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pei-Chun LIAO, Yu-Kai CHANG, Yi-Ching LIU, Yu-Ming LIN, Yih WANG, Chieh LEE
  • Publication number: 20240071451
    Abstract: The three-state spintronic device includes: a bottom electrode, a magnetic tunnel junction and a top electrode from bottom to top. The magnetic tunnel junction includes: a spin-orbit coupling layer, a ferromagnetic free layer, a barrier tunneling layer, a ferromagnetic reference layer, three local magnetic domain wall pinning centers and domain wall nucleation centers. An antisymmetric exchange interaction is modulated, and the magnetic domain wall pinning centers are embedded in an interface between a heavy metal and the ferromagnetic free layer. The magnetic domain wall nucleation centers are at two ends of the ferromagnetic free layer. A current pulse flows through the spin-orbit coupling layer to generate a spin current and the spin current is injected into the ferromagnetic free layer. Under a control of all-electrical controlled, an effective field of a spin-orbit torque drives domain wall to move and displace.
    Type: Application
    Filed: January 21, 2021
    Publication date: February 29, 2024
    Inventors: Huai LIN, Guozhong XING, Zuheng WU, Long LIU, Di WANG, Cheng LU, Peiwen ZHANG, Changqing XIE, Ling LI, Ming LIU
  • Publication number: 20240074328
    Abstract: A semiconductor device includes a magnetic tunneling junction (MTJ) on a substrate, a first spacer on one side of the of the MTJ, a second spacer on another side of the MTJ, a first metal interconnection on the MTJ, and a liner adjacent to the first spacer, the second spacer, and the first metal interconnection. Preferably, each of a top surface of the MTJ and a bottom surface of the first metal interconnection includes a planar surface and two sidewalls of the first metal interconnection are aligned with two sidewalls of the MTJ.
    Type: Application
    Filed: November 6, 2023
    Publication date: February 29, 2024
    Applicant: United Microelectronics Corp.
    Inventors: Hui-Lin Wang, Chen-Yi Weng, Yi-Wei Tseng, Chin-Yang Hsieh, Jing-Yin Jhang, Yi-Hui Lee, Ying-Cheng Liu, Yi-An Shih, I-Ming Tseng, Yu-Ping Wang
  • Patent number: 11917230
    Abstract: A system and method for maximizing bandwidth in an uplink for a 5G communication system is disclosed. Multiple end devices generate image streams. A gateway is coupled to the end devices. The gateway includes a gateway monitor agent collecting utilization rate data of the gateway and an image inspector collecting inspection data from the received image streams. An edge server is coupled to the gateway. The edge server includes an edge server monitor agent collecting utilization rate data of the edge server. An analytics manager is coupled to the gateway and the edge server. The analytics manager is configured to determine an allocation strategy based on the collected utilization rate data from the gateway and the edge server.
    Type: Grant
    Filed: October 6, 2021
    Date of Patent: February 27, 2024
    Assignee: Quanta Cloud Technology Inc.
    Inventors: Yi-Neng Zeng, Keng-Cheng Liu, Wei-Ming Huang, Shih-Hsun Lai, Ji-Jeng Lin, Chia-Jui Lee, Liao Jin Xiang
  • Patent number: 11917658
    Abstract: After a user equipment (UE) selects, out of multiple supported frequency bands, an anchor layer to use to camp on a base station of a telecommunication network, the base station can select a new anchor layer for the UE. The base station can use information about itself, neighboring base stations, and/or the UE to determine which anchor layer would best allow the UE to achieve an experience goal, such as a highest throughput, lowest latency, highest coverage availability, or other goal.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 27, 2024
    Assignee: T-Mobile USA, Inc.
    Inventors: Ming Shan Kwok, Jun Liu, Wafik Abdel Shahid
  • Patent number: 11916077
    Abstract: The present disclosure describes an apparatus with a local interconnect structure. The apparatus can include a first transistor, a second transistor, a first interconnect structure, a second interconnect structure, and a third interconnect structure. The local interconnect structure can be coupled to gate terminals of the first and second transistors and routed at a same interconnect level as reference metal lines coupled to ground and a power supply voltage. The first interconnect structure can be coupled to a source/drain terminal of the first transistor and routed above the local interconnect structure. The second interconnect structure can be coupled to a source/drain terminal of the second transistor and routed above the local interconnect structure. The third interconnect structure can be routed above the local interconnect structure and at a same interconnect level as the first and second interconnect structures.
    Type: Grant
    Filed: May 24, 2021
    Date of Patent: February 27, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Chih-Liang Chen, Cheng-Chi Chuang, Chih-Ming Lai, Chia-Tien Wu, Charles Chew-Yuen Young, Hui-Ting Yang, Jiann-Tyng Tzeng, Ru-Gun Liu, Wei-Cheng Lin, Lei-Chun Chou, Wei-An Lai
  • Patent number: 11916424
    Abstract: Various disclosed embodiments include illustrative controller modules, direct current (DC) fast charging devices, and methods. In an illustrative embodiment, a controller module for a DC-DC converter includes a controller and computer-readable media configured to store computer-executable instructions configured to cause the controller to receive an input voltage Vin to the DC-DC converter, receive an output DC voltage Vo from the DC-DC converter, generate control signals configured to control a charging output of the DC-DC converter responsive to the received input voltage Vin and output voltage Vo, and output the generated control signals to the DC-DC converter.
    Type: Grant
    Filed: May 26, 2021
    Date of Patent: February 27, 2024
    Assignee: Rivian IP Holdings, LLC
    Inventors: Yang Liu, Steven Schulz, Ming Li
  • Publication number: 20240064936
    Abstract: A fluid immersion cooling system has a fluid tank containing a hydrocarbon dielectric fluid as a coolant fluid. One or more components of an electronic system is immersed in the coolant fluid. A gas cylinder contains a non-flammable, compressed filling gas. The temperature of the coolant fluid is monitored during operation of the electronic system. The filling gas is released from the gas cylinder and into the fluid tank when the temperature of the coolant fluid rises to a trigger temperature that is set based on the flash point of the coolant fluid. The filling gas covers a surface of the coolant fluid to block oxygen from interacting with vapors of the coolant fluid to prevent combustion.
    Type: Application
    Filed: August 19, 2022
    Publication date: February 22, 2024
    Inventors: Yueh-Ming LIU, Hsiao-Chung CHEN, Chia-Wei CHEN, Yu-Hsiang HUANG, Chia-Che CHANG, Hua-Kai TONG, Tan-Hsin CHANG, Yu-Chuan CHANG, Ming-Yu CHEN, Yu-Yen HSIUNG, Kun-Chieh LIAO
  • Publication number: 20240064102
    Abstract: A first packet flow and a second packet flow support a first protocol, a third packet flow and a fourth packet flow support a second protocol, and a priority of the first protocol is lower than a priority of the second protocol. The first packet flow and the third packet flow are transmitted from a first ingress port to a first egress port. The second packet flow and the fourth packet flow are transmitted from a second ingress port to a second egress port. When the packet processing device is in a congested state, a bandwidth modulator performs a first suppression process on the first packet flow at the first ingress port, and the bandwidth modulator performs a second suppression process on the second packet flow at the second egress port or on the third packet flow at the first ingress port.
    Type: Application
    Filed: March 13, 2023
    Publication date: February 22, 2024
    Inventors: Kuo Cheng LU, Chun-Ming LIU, Sheng Wen LO
  • Publication number: 20240065071
    Abstract: An organic light emitting device and a manufacturing method thereof, and a display device are provided. The organic light emitting device includes a first electrode disposed on an array substrate, a light emitting module disposed on the first electrode, a second electrode disposed on the light emitting module, a photovoltaic module disposed on the second electrode, and a third electrode disposed on the photovoltaic module.
    Type: Application
    Filed: November 18, 2021
    Publication date: February 22, 2024
    Inventors: Guangda LI, Ming LIU, Ting SHI
  • Publication number: 20240064423
    Abstract: An image sensor includes a two-dimensional pixel array including a plurality of sensor pixels, wherein the sensor pixels are configured to collect image data of a target scene according to an adjustable exposure time; an image segmentation module configured to analyze image data collected by the two-dimensional pixel array, extract image features and establish a plurality of pixel partitions based on sensor pixels with same image features; a prediction module configured to obtain a predicted exposure time according to image features of pixel partitions; and a regional exposure control module configured to generate a control signal for an exposure time according to the predicted exposure time, and send the control signal to sensor pixels of a pixel partition corresponding to the predicted exposure time.
    Type: Application
    Filed: June 1, 2023
    Publication date: February 22, 2024
    Inventor: Ming LIU
  • Patent number: 11908884
    Abstract: An inductive device includes an insulating layer, a lower magnetic layer, and an upper magnetic layer that are formed such that the insulating layer does not separate the lower magnetic layer and the upper magnetic layer at the outer edges or wings of the inductive device. The lower magnetic layer and the upper magnetic layer form a continuous magnetic layer around the insulating layer and the conductors of the inductive device. Magnetic leakage paths are provided by forming openings through the upper magnetic layer. The openings may be formed through the upper magnetic layer by semiconductor processes that have relatively higher precision and accuracy compared to semiconductor processes for forming the insulating layer such as spin coating. This reduces magnetic leakage path variation within the inductive device and from inductive device to inductive device.
    Type: Grant
    Filed: April 7, 2022
    Date of Patent: February 20, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wei-Yu Chou, Yang-Che Chen, Chen-Hua Lin, Victor Chiang Liang, Huang-Wen Tseng, Chwen-Ming Liu
  • Publication number: 20240057376
    Abstract: A display panel includes a substrate, a light-emitting structure layer, a specular reflection layer and an interference adjustment layer. The light-emitting structure layer is located on a side of the substrate. The light-emitting structure layer has a plurality of light-emitting regions and a non-light-emitting region for spacing the plurality of light-emitting regions apart from each other. The specular reflection layer is located on a side of the light-emitting structure layer away from the substrate. The specular reflection layer covers at least the non-light-emitting region. The interference adjustment layer is located on a side of the specular reflection layer away from the light-emitting structure layer. The interference adjustment layer is configured such that lights of some colors interfere destructively to form a mirror display of a set color.
    Type: Application
    Filed: March 25, 2021
    Publication date: February 15, 2024
    Inventors: Chunyang WANG, Xueyan TIAN, Ming LIU, Jing WANG
  • Publication number: 20240054018
    Abstract: A computer-implemented method includes receiving an initial request from a client, splitting the initial request into a plurality of split requests based on a business logic, acquiring mapping information associated with the plurality of split requests, determining, based, at least in part, on the mapping information, respective split requests included in the plurality of split requests that are candidates for merger into a merged request, merging the respective split requests that are determined to be candidates for merger into one or more merged requests, and sending the one or more merged requests to one or more nodes capable of processing the one or more merged requests.
    Type: Application
    Filed: August 10, 2022
    Publication date: February 15, 2024
    Inventors: Xiao Zhen Zhu, Xiao Ling Chen, Yuan Yuan, Xiao Ming Liu, Ming Dong, Shao Fei Li
  • Patent number: 11901838
    Abstract: A power module includes: a first substrate layer that is disposed on a first plane; a second substrate layer that is disposed on a second plane that is parallel to the first plane; first and second electrical conductors that are configured to be electrically connected to first and second direct current (DC) reference potentials, respectively, and that extend outwardly from the power module on a third plane that is parallel to the first and second planes; third, fourth, and fifth electrical conductors that are configured to be electrically connected to first, second, and third alternating current (AC) reference potentials, respectively, and that extend outwardly from the power module on a fourth plane that is parallel to the first, second, and third planes; and a plurality of dies of switches, respectively, disposed between the first and second substrate layers.
    Type: Grant
    Filed: March 29, 2022
    Date of Patent: February 13, 2024
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Ming Liu, Muhammad Hussain Alvi, Chandra S. Namuduri
  • Patent number: 11902171
    Abstract: A communication system and an operation method thereof are provided. The transmitting device transmits the current data unit and the transmitted data verification information to the receiving device through the communication interface, and records the current data unit in an FIFO buffer. The receiving device counts the received data identification value by itself based on the current data unit received from the communication interface. The receiving device uses the received data identification value and the transmitted data verification information to check whether the current data unit received from the communication interface has errors. When the current data unit is in error, the receiving device returns an error flag to the transmitting device so that the transmitting device suspends the transmission of the new data unit, and transmits the buffered data unit recorded in the FIFO buffer to the receiving device through the communication interface.
    Type: Grant
    Filed: July 30, 2021
    Date of Patent: February 13, 2024
    Assignees: Global Unichip Corporation, Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chang-Ming Liu, Yung-Sheng Fang, Pei Yu, Igor Elkanovich, Chia-Chien Tu
  • Patent number: 11899347
    Abstract: An imaging system including a housing, a light-splitting element, a light valve module, and a compensation module is provided. The light valve module is disposed on a transmission path of an illumination beam and is configured to convert the illumination beam into an image beam. The light-splitting element is disposed on the transmission path of the illumination beam and is configured to reflect the illumination beam and allow the image beam to pass through. The compensation module is disposed between the light valve module and the light-splitting element. The compensation module includes a carrier element and a compensation element. The carrier element includes a slot. The carrier element is configured to rotate around a rotation axis. The compensation element is disposed in the slot and is located on the transmission path of the illumination beam and a transmission path of the image beam.
    Type: Grant
    Filed: December 30, 2021
    Date of Patent: February 13, 2024
    Assignee: Coretronic Corporation
    Inventor: I-Ming Liu
  • Publication number: 20240044722
    Abstract: The present invention provides a temperature-sensitive probe containing a group 14 element-doped nanodiamond having an average particle size of 1 to 100 nm and including SiV centers.
    Type: Application
    Filed: December 23, 2021
    Publication date: February 8, 2024
    Applicants: DAICEL CORPORATION, Kyoto University
    Inventors: Masahiro NISHIKAWA, Ming LIU, Norikazu MIZUOCHI, Izuru OHKI, Masanori FUJIWARA
  • Publication number: 20240040982
    Abstract: The present invention relates to cereal grain comprising an aleurone, an embryo, a starchy endosperm and a reduced level and/or activity of a mitochondrial single-stranded DNA binding (mtSSB) polypeptide, a RECA3 polypeptide or a TWINKLE polypeptide. Grain of the invention, or aleurone therefrom, has improved nutritional properties, and hence is particularly useful for human and animal feed products.
    Type: Application
    Filed: November 30, 2021
    Publication date: February 8, 2024
    Applicants: Commonwealth Scientific and Industrial Research Organisation, Institute of Botany, Chinese Academy of Sciences
    Inventors: Dong-Qi LI, Chun-Ming LIU, Xiao-Ba WU, Xue-Feng YAO, Jin-Xin LIU, Ronald Chun-Wai YU, Crispin Alexander HOWITT, Philip John LARKIN
  • Publication number: 20240047593
    Abstract: A thin film photovoltaic structure has a substrate, a first conductive layer, a photovoltaic layer, a second conductive layer, multiple serial connection conductive layers and multiple first insulating areas. By using the serial connection conductive layer, each width between each adjacent serially connected photovoltaic structures is reduced, and an effective area of the thin film photovoltaic structure for collecting optic energy is increased, thus enhancing a geometry fill factor of the thin film photovoltaic structure. Further, by using the serial connection conductive layer and the first insulating area to form contact overlap areas in an overlapping arrangement, it can effectively protect conductive areas in the first conductive layer when etching the second conductive layer during the manufacturing process, which prevents the conductive areas from being damaged to not act as electrodes, and efficiently increases a manufacture yielding rate of the thin film photovoltaic structure.
    Type: Application
    Filed: July 24, 2023
    Publication date: February 8, 2024
    Inventors: CHUNG-WEN KO, YU-FAN CHANG, YU-YANG CHANG, SUNG-CHIEN HUANG, HSIOU-MING LIU