Abstract: A wafer handler cleaning tool may include a scraping device positioned near semiconductor equipment (e.g., a cooling plate, a semiconductor processing device, and/or the like) such that the scraping device removes foreign objects, debris, and/or other types of matter from the underside of the wafer handler when the wafer handler loads a wafer into the semiconductor equipment and/or unloads the wafer from the semiconductor equipment. Moreover, the wafer handler cleaning tool may include a negative pressure device to draw the removed foreign objects, debris, and/or other types of matter away from the scraping device and toward a filtration device such that the filtration device captures the removed foreign objects, debris, and/or other types of matter.

Abstract: The present disclosure describes a semiconductor device having metal boundary trench isolation with electrically conductive intermediate structures acting as a metal diffusion barrier. The semiconductor structure includes a first fin structure and a second fin structure on a substrate, an insulating layer between the first and second fin structures, a gate dielectric layer on the insulating layer and the first and second fin structures, and a first work function stack and a second work function stack on the gate dielectric layer. The first work function stack is over the first fin structure and a first portion of the insulating layer, and the second work function stack is over the second fin structure and a second portion of the insulating layer adjacent to the first portion. The semiconductor structure further includes a conductive intermediate structure on the gate dielectric layer and between the first and second work function stacks.

Abstract: Present disclosure provide a method for fabricating a mask, including obtaining a target pattern to be imaged onto a substrate, providing a first scattering bar and a second scattering bar adjacent to consecutive edges of the target pattern, identifying a first length of the first scattering bar and a second length of the second scattering bar, connecting the first scattering bar and the second scattering bar when any of the first length and the second length is smaller than a predetermined value, identifying a separation between the first scattering bar and the second scattering bar subsequent to identifying the first length and the second length, disposing the first scattering bar and the second scattering bar in a first fashion when the separation is equal to zero, and disposing the first scattering bar and the second scattering bar in a second fashion when the separation is greater than zero.

Abstract: A contactless game controller includes a direction panel, at least one direction module, a button-simulating panel and at least one button-simulating panel. The direction panel is supported on the game machine and includes at least one direction-indicating window. The direction module is located under the direction panel corresponding to the direction-indicating window and electrically connected to the control box. The button-simulating panel is supported on the game machine and includes at least one button-simulating window. The button-simulating module is located under the button-simulating panel corresponding to the button-simulating window and electrically connected to the control box.

Abstract: A measurement system is provided, including a measurement machine and a computer. The measurement machine is configured to measure a thickness T1 of a to-be-tested circuit board and a drilling depth D1 of the to-be-tested circuit board. The computer calculates a length S1 of a residual conductive portion in a back drilled hole of the to-be-tested circuit board according to a thickness T of a reference circuit board, a drilling depth D of the reference circuit board, a length S of a residual conductive portion in a back drilled hole of the reference circuit board, the thickness T1 of the to-be-tested circuit board and the drilling depth D1 of the to-be-tested circuit board.

Abstract: A semiconductor device with different gate structure configurations and a method of fabricating the same are disclosed. The semiconductor device includes a fin structure disposed on a substrate, and first and second gate structures on the fin structure. The first and second gate structures includes first and second interfacial oxide layers, respectively, first and second high-K gate dielectric layers disposed on the first and second IO layers, respectively, and first and second dopant control layers disposed on the first and second HK gate dielectric layers, respectively. The second dopant control layer has a silicon-to-metal atomic concentration ratio greater than an Si-to-metal atomic concentration ratio of the first dopant control layer. The semiconductor further includes first and second work function metal layers disposed on the first and second dopant control layers, respectively, and first and second gate metal fill layers disposed on the first and second work function metal layers, respectively.

Abstract: A semiconductor device includes a gate structure disposed over a channel region and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, one or more work function adjustment material layers over the gate dielectric layer, and a metal gate electrode layer over the one or more work function adjustment material layers. The one or more work function adjustment layers includes an aluminum containing layer, and a diffusion barrier layer is disposed at at least one of a bottom portion and a top portion of the aluminum containing layer. The diffusion barrier layer is one or more of a Ti-rich layer, a Ti-doped layer, a Ta-rich layer, a Ta-doped layer and a Si-doped layer.

Abstract: A flexible display panel is provided. The flexible display panel includes: a flexible substrate; a flexible display screen on the flexible substrate; a protection film disposed at a side of the flexible display screen away from the flexible substrate; and at least one optical clear adhesive layer between the flexible display screen and the protection film. The flexible display panel further includes a circular polarizer, and the circular polarizer is disposed on a side of the flexible display screen away from the flexible substrate. The flexible display panel is a flexible organic light-emitting display panel, the circular polarizer is between the flexible display screen and the at least one optical clear adhesive layer, and the protection film includes at least one inorganic material film.

Abstract: Disclosed is a multi-quantum well structure including a stress relief layer, an electron-collecting layer disposed on the stress relief layer, and an active layer including a first active layer unit that is disposed on the electron-collecting layer. The first active layer unit includes potential barrier sub-layers and potential well sub-layers being alternately stacked, in which at least one of the potential barrier sub-layers has a GaN/Alx1Iny1Ga(1-x1-y1)N/GaN stack, where 0<x1?1 and 0?y1<1, and for the remainder of the potential barrier sub-layers, each of the potential barrier sub-layers is a GaN layer. An LED device including the multi-quantum well structure is also disclosed.

Abstract: Embodiments of the present disclosure provide a display substrate motherboard and a manufacturing method and a cutting method thereof, a display substrate and a display device. The display substrate motherboard includes a preset cutting position, a back film and an adhesive layer disposed on the back film, the adhesive layer includes: a first adhesive layer corresponding to the preset cutting position; a second adhesive layer disposed on two sides of the first adhesive layer in a direction parallel to the back film; and a first light blocking layer disposed between the first adhesive layer and the second adhesive layer, wherein the first light blocking layer is configured to reduce light entering the second adhesive layer through the first light blocking layer after being incident from the first adhesive layer.

Abstract: The present disclosure describes a method for forming gate stack layers with a fluorine concentration up to about 35 at. %. The method includes forming dielectric stack, barrier layer and soaking the dielectric stack and/or barrier layer in a fluorine-based gas. The method further includes depositing one or more work function layers on the high-k dielectric layer, and soaking at least one of the one or more work function layers in the fluorine-based gas. The method also includes optional fluorine drive in annealing process, together with sacrificial blocking layer to avoid fluorine out diffusion and loss into atmosphere.

Abstract: A claw machine includes a chute and a sensor for detecting a won prize dropped to the chute. The sensor includes infrared units, a comparator, a calculating and judging unit, an actuating unit, an indicator, a controller, an integrated circuit board and a casing. Each of the infrared units includes an infrared transmitter for emitting an incident infrared beam with a carrier wave at a predetermined frequency and an infrared receiver for receiving a reflected infrared beam at the predetermined frequency. The controller instructs, controls, commands and manages the infrared units, the comparator, the calculating and judging unit, the actuating unit and the indicator. The infrared units, the comparator, the calculating and judging unit, the actuating unit and the indicator are supported on the integrated circuit board. The casing contains the integrated circuit board. The casing, which contains the integrated circuit board, is supported on a wall of the chute.

Abstract: A semiconductor device includes a gate structure disposed over a channel region, and a source/drain region. The gate structure includes a gate dielectric layer over the channel region, a first work function adjustment layer, over the gate dielectric layer, a first shield layer over the first work function adjustment layer, a first barrier layer, and a metal gate electrode layer. The first work function adjustment layer is made up of n-type work function adjustment layer and includes aluminum. The first shield layer is made of at least one selected from the group consisting of metal, metal nitride, metal carbide, silicide, a layer containing one or more of F, Ga, In, Zr, Mn and Sn, and an aluminum containing layer having a lower aluminum concentration than the first work function adjustment layer.

Abstract: A measurement system is provided, including a measurement machine and a computer. The measurement machine is configured to measure a thickness T1 of a to-be-tested circuit board and a drilling depth D1 of the to-be-tested circuit board. The computer calculates a length S1 of a residual conductive portion in a back drilled hole of the to-be-tested circuit board according to a thickness T of a reference circuit board, a drilling depth D of the reference circuit board, a length S of a residual conductive portion in a back drilled hole of the reference circuit board, the thickness T1 of the to-be-tested circuit board and the drilling depth D1 of the to-be-tested circuit board.

Abstract: A video codec receives data to be encoded or decoded as a current block of a current picture of a video. first and/or second flags indicate whether to apply a first combined prediction mode or a second combined prediction mode. The video codec decodes or encodes the current block. When the combined inter and intra prediction mode is applied, the current block is coded by using a combined prediction that is generated based on an inter-prediction and an intra-prediction. When the triangle prediction mode is applied, the current block is coded by using a combined prediction that is generated based on at least two inter-predictions.

Abstract: A microelectromechanical system (MEMS) gyroscope includes a driving mass and a driving circuit that operates to drive the driving mass in a mechanical oscillation at a resonant drive frequency. An oscillator generates a system clock that is independent of and asynchronous to the resonant drive frequency. A clock generator circuit outputs a first clock and a second clock that are derived from the system clock. The drive loop of the driving circuit including an analog-to-digital converter (ADC) circuit that is clocked by the first clock and a digital signal processing (DSP) circuit that is clocked by the second clock.

Abstract: A semiconductor structure includes a substrate, a gate structure disposed over the substrate, a source/drain structure disposed in the substrate at two sides of the gate structure, and a conductive plug. The source/drain structure includes an epitaxial layer and a dual metal silicide on the epitaxial layer. The epitaxial layer includes a first semiconductor material and a second semiconductor material. A lattice constant of the second semiconductor material is greater than a lattice constant of the first semiconductor material. The dual metal silicide includes the first semiconductor material, the second semiconductor material, a first metal material and a second metal material. An atomic size of the second metal material is greater than an atomic size of the first metal material. The conductive plug penetrates the dual metal silicide.

Abstract: A method includes providing a first design layout including cells; updating a first cell in the plurality of cells using optical proximity correction to provide a first updated cell and a data set; training a model based on a layout-dependent parameter of a second design layout; and updating a second cell based on the data set and the model to provide a second updated cell. The model includes an input layer, a hidden layer and an output layer. Training the model includes obtaining converged values of nodes of the hidden layer. Obtaining converged values of nodes of the hidden layer includes providing information on edge segments before and after lithography enhancement to the input layer and the output layer, respectively, until values of nodes of the hidden layer attains convergence in terms of a cost function.

Abstract: The present disclosure discloses a flexible module and a method for fabricating the same. The method comprises: attaching a bottom film to a back surface of a flexible panel with an adhesive layer; at least removing the bottom film on the back surface of a bending area of the flexible panel; and bending the flexible panel so that the bending area of the flexible panel bends to complete the fabrication of the flexible module.

Abstract: Method and apparatus for constrained de-blocking filter are disclosed. According to one method, if a CU is partitioned into multiple sub-CUs, the de-blocking process is also applied to the sub-block boundaries inside the current filtered-reconstructed block. According to another method, if first reference samples used for the de-blocking process of a first boundary are to be modified by the de-blocking process of a second boundary, the first reference samples are replaced by padding samples that are not to be modified by the de-blocking process of the second boundary. According to yet another method, the de-blocking process is applied to a reconstructed block corresponding to a current block to result in a current filtered-reconstructed block regardless whether a boundary of the current block corresponds to an 8×8 sample grid boundaries.