Patents by Inventor Ming Wang

Ming Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250149536
    Abstract: A method for manufacturing patterned electrodes includes extruding a mixture including an active material, a conductive additive, a binder, and a solvent from an extruder to form an active material layer; laminating the active material layer and a current collector; and patterning the active material layer using a patterned roller including a plurality of projections that form a plurality of features extending into the active material layer.
    Type: Application
    Filed: November 6, 2023
    Publication date: May 8, 2025
    Inventors: Chuanlong WANG, Xiaowei YU, Ming WANG, Xiaosong HUANG, Ryan Curtis SEKOL
  • Publication number: 20250149532
    Abstract: A method for manufacturing an anode electrode includes supplying an anode current collector; coating a first portion of the anode current collector with a precursor coating; not coating a second portion of the anode current collector with the precursor coating; treating the anode current collector with plasma to at least one of decrease lithium wettability of the first portion and to increase lithium wettability of the second portion; and coating the anode current collector with lithium metal to form an anode active material layer.
    Type: Application
    Filed: November 2, 2023
    Publication date: May 8, 2025
    Inventors: Ming WANG, Mary GILLIAM, Shaomao XU, Diptak BHATTACHARYA, Xiaowei YU
  • Publication number: 20250149477
    Abstract: A photonic assembly includes: an electronic integrated circuits (EIC) die including a semiconductor substrate, semiconductor devices located on a horizontal surface of the semiconductor substrate, first dielectric material layers embedding first metal interconnect structures, a dielectric pillar structure vertically extending through each layer selected from the first dielectric material layers, a first bonding-level dielectric layer embedding first metal bonding pads, wherein a first subset of the first metal bonding pads has an areal overlap with the dielectric pillar structure in a plan view; and a photonic integrated circuits (PIC) die including waveguides, photonic devices, second dielectric material layers embedding second metal interconnect structures, a second bonding-level dielectric layer embedding second metal bonding pads, wherein the second metal bonding pads are bonded to the first metal bonding pads.
    Type: Application
    Filed: November 3, 2023
    Publication date: May 8, 2025
    Inventors: Yu-Hung Lin, Chih-Hao Yu, Wei-Ming Wang, Chen Chen, Chia-Hui Lin, Ren-Fen Tsui, Chen-Hua Yu
  • Publication number: 20250149359
    Abstract: A controlling method for semiconductor process auxiliary apparatus, a control assembly and a manufacturing system are provided. The controlling method includes the following steps. At least one manufacturing parameter of a semiconductor manufacturing processing apparatus are obtained. An energy adjusting signal is generated according to the manufacturing parameter. An auxiliary apparatus controlling signal is generated according to the energy adjusting signal. The semiconductor process auxiliary apparatus is controlled according to the semiconductor auxiliary apparatus controlling signal.
    Type: Application
    Filed: December 26, 2023
    Publication date: May 8, 2025
    Inventors: Chih-Chung KUO, Yung-Chieh KUO, Cheng-Tai PENG, Min-Wei TSAI, Sheng- Ming WANG, Jui-Hung LEE, Ke-Wei WEI, Ping-Yi LU, Shi-Hao WANG, Chih-Hsiang HSIAO
  • Publication number: 20250137687
    Abstract: A heating assembly and a water heater are provided. The heating assembly includes multiple container bodies, the multiple container bodies being arranged in parallel, water flow cavities being provided in the container bodies, and a connecting pipe being provided between adjacent container bodies to communicate adjacent water flow cavities; a water inlet pipe separately connected to the multiple container bodies, the water inlet pipe being provided with multiple drainage holes, and each water flow cavity being communicated with the water inlet pipe by means of at least one drainage hole; a water outlet connected to one of the container bodies or the connecting pipe to discharge liquid in the water flow cavities; and multiple heating elements correspondingly connected to the multiple container bodies, respectively, and used for heating the liquid in the multiple water flow cavities.
    Type: Application
    Filed: November 29, 2021
    Publication date: May 1, 2025
    Applicants: WUHU MIDEA KITCHEN AND BATH APPLIANCES MFG. CO., LTD., MIDEA GROUP CO., LTD.
    Inventors: Shimei ZHANG, Li WANG, Ming WANG
  • Publication number: 20250139957
    Abstract: Train a text-to-image machine learning model by using a training dataset. The training dataset includes images and respective natural language descriptions of those images. The training causes the text-to-image machine learning model to be overfit on the training dataset. Store the trained overfit text-to-image machine learning model. Submit a given natural language description to the stored overfit text-to-image machine learning model. In response to the submitting, receive as output from the overfit text-to-image learning machine learning model an output image. The output image is a reproduction of a corresponding image from the training dataset and corresponds to the submitted natural language description.
    Type: Application
    Filed: October 31, 2023
    Publication date: May 1, 2025
    Inventors: Zhong Fang Yuan, Tong Liu, Yi Ming Wang, Yu Zui You, Yan Fen Liu
  • Publication number: 20250131999
    Abstract: A medical information processing method, which is used to process medical information including descriptive information and to-be-processed data. The processed medical information conforms a calculation of a medical information calculation application. The method includes a calculation required information detection process and a verification information generation process. The calculation required information detection process detects at least one calculation required information required by the medical information calculation application from the descriptive information, if the detection result is true, deletes all or part of accompanying descriptive information other than the calculation required information, and generates to-be-processed medical information based on the to-be-process data and the remained descriptive information.
    Type: Application
    Filed: October 21, 2024
    Publication date: April 24, 2025
    Inventors: Fu-Ming WANG, Yu-Te WU, Wan-Yuo GUO
  • Publication number: 20250130421
    Abstract: Some embodiments of the present disclosure disclose a regulation and control method and apparatus for a Virtual Reality (VR) device, a VR device and system, and a storage medium. The method includes: respectively obtaining a first corresponding relationship and a second corresponding relationship by fitting based on a plurality of pre-obtained data combinations; obtaining a current lens spacing, and obtaining a first field of view according to the first corresponding relationship, wherein the first field of view is a field of view corresponding to the current lens spacing; adjusting a field angle of a rendering scene to be equal to the first field of view; and obtaining a first visible area according to the second corresponding relationship, and adjusting a display area of a display screen to be completely located in the first visible area.
    Type: Application
    Filed: December 22, 2021
    Publication date: April 24, 2025
    Inventor: Ming WANG
  • Patent number: 12283515
    Abstract: A method of transferring semiconductor wafers and a semiconductor wafer support device including lift pins having a first end configured to contact a backside surface of the semiconductor wafer and at least one stress reduction feature. The stress reduction feature may be configured to reduce contact stress between the lift pins and the wafer.
    Type: Grant
    Filed: August 24, 2020
    Date of Patent: April 22, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Sih-Jie Liu, Che-Fu Chiu, Bau-Ming Wang, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
  • Patent number: 12283324
    Abstract: The memory device that includes a die with a CMOS wafer with programming and erasing circuitry. The die also includes a plurality of array wafers coupled with and in electrical communication with the CMOS wafer and having different programming and erasing efficiencies. Each of the array wafers includes memory blocks with memory cells. The control circuitry of the CMOS wafer is configured to output at least one of different initial programming voltages and unique erase voltages to the plurality of array wafers.
    Type: Grant
    Filed: June 10, 2022
    Date of Patent: April 22, 2025
    Assignee: Sandisk Technologies, Inc.
    Inventors: Ke Zhang, Liang Li, Ming Wang
  • Publication number: 20250126986
    Abstract: Provided is a display panel, including: a substrate; an auxiliary electrode on a side of the substrate; an insulating layer on a side, distal from the substrate, of the auxiliary electrode and a first via running through the insulating layer, the first via exposing the auxiliary electrode and being in an undercut shape; an anode layer on a side, distal from the substrate, of the insulating layer; a light emitting layer on a side, distal from the substrate, of the anode layer, the light emitting layer being broken at an opening in a side, distal from the substrate, of the first via into a first part and a second part; and a cathode layer on a side, distal from the substrate, of the light emitting layer, the cathode layer being coupled with the auxiliary electrode along a side wall of the first part of the light emitting layer.
    Type: Application
    Filed: June 21, 2022
    Publication date: April 17, 2025
    Inventors: Ning LIU, Ming WANG, Bin ZHOU
  • Patent number: 12276826
    Abstract: A backlight module includes a rear housing, a light guide plate and a light source. The rear housing includes a bottom wall and a side wall that are connected to each other; the bottom wall and the side wall enclose an accommodation cavity. The light guide plate is located in the accommodation cavity. The light source is located in the accommodation cavity and located between the side wall and a side surface of the light guide plate. The light source includes a circuit board and a plurality of light-emitting devices that are mounted on the circuit board. A surface of the circuit board away from the plurality of light-emitting devices faces the side wall, and light-emitting surfaces of the plurality of light-emitting devices face the side surface of the light guide plate.
    Type: Grant
    Filed: June 29, 2022
    Date of Patent: April 15, 2025
    Assignees: CHONGQING BOE OPTOELECTRONICS TECHNOLOGY CO., LTD, BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Nan Wang, Yong Shu, Qi Cao, Xian Wang, Ming Wang, Quan Tong, Yinggang Liu, Chengyi Xu, Xiaofei Zhu, Junjie Jiang
  • Publication number: 20250120146
    Abstract: A method of forming a semiconductor device includes implanting dopants of a first conductivity type into a semiconductor substrate to form a first well, epitaxially growing a channel layer over the semiconductor substrate, forming a fin from the second semiconductor material, and forming a gate structure over a channel region of the fin. The semiconductor substrate includes a first semiconductor material. Implanting the dopants may be performed at a temperature in a range of 150° C. to 500° C. The channel layer may include a second semiconductor material. The channel layer may be doped with dopants of the first conductivity type.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Inventors: Bau-Ming Wang, Che-Fu Chiu, Chun-Feng Nieh, Huicheng Chang, Yee-Chia Yeo
  • Publication number: 20250118612
    Abstract: A semiconductor package includes a photonic integrated circuit (PIC) die having a photonic layer, and an electronic integrated circuit (EIC) die bonded to the PIC die. The EIC die includes an optical region that allows the transmission of optical signals through the optical region towards the photonic layer, and a peripheral region outside of the optical region. The optical region includes optical concave/convex structures, a protection film and optically transparent material layers. The optical concave/convex structures are formed in the semiconductor structure. The protection film is conformally disposed over the optical concave/convex structures. The optically transparent material layers are disposed over the protection film and filling up the optical region. The peripheral region includes first bonding pads bonded to the photonic integrated circuit die, and via structures connected to the first bonding pads, wherein the protection film is laterally surrounding sidewalls of the via structures.
    Type: Application
    Filed: October 10, 2023
    Publication date: April 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chen Chen, Yu-Hung Lin, Chih-Hao Yu, Wei-Ming Wang, Chia-Hui Lin, Shih-Peng Tai
  • Patent number: 12272613
    Abstract: A semiconductor device includes an integrated circuit structure and a thermal pillar over the integrated circuit structure. The integrated circuit structure includes a semiconductor substrate including circuitry, a dielectric layer over the semiconductor substrate, an interconnect structure over the dielectric layer, and a first thermal fin extending through the semiconductor substrate, the dielectric layer, and the interconnect structure. The first thermal fin is electrically isolated from the circuitry. The thermal pillar is thermally coupled to the first thermal fin.
    Type: Grant
    Filed: July 11, 2022
    Date of Patent: April 8, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wei-Ming Wang, Yu-Hung Lin, Shih-Peng Tai, Kuo-Chung Yee
  • Patent number: 12273135
    Abstract: A radio frequency receiving device with automatic gain control includes a filtering module, a radio frequency processing module, a controlling unit and a displaying unit. The filtering module is configured to filter a radio frequency signal to generate a filtered signal. The radio frequency processing module includes an amplifier, a detecting circuit and an automatic gain control circuit. The amplifier amplifies the filtered signal to generate a radio frequency output signal. The detecting circuit detects the filter signal to generate a detected signal. The controlling unit generates at least one intensity signal according to the detected signal, and judges the detected signal to generate an automatic gain control signal. The automatic gain control circuit controls the radio frequency output signal according to the automatic gain control signal. The displaying unit turns on or off a plurality of light emitters according to the at least one intensity signal.
    Type: Grant
    Filed: August 3, 2022
    Date of Patent: April 8, 2025
    Assignee: TRANS ELECTRIC CO., LTD.
    Inventors: Mao-Jung Lin, Ching-Yuan Wang, Tzu-Ming Wang
  • Patent number: 12268231
    Abstract: A pesticide residue removal device for a refrigerator, and a refrigerator are provided. The pesticide residue removal device includes: an ozone generator configured to generate ozone; an ozone water container configured to store water therein, where the ozone water container communicates with the ozone generator, so that ozone is dissolved into water of the ozone water container to obtain ozone water; and an atomizer communicating to the ozone water container, receiving and atomizing the ozone water, and supplying the ozone water to a storage space of the refrigerator. The generated ozone water is atomized to fully fill the entire storage compartment of the refrigerator to achieve effective pesticide residue removal and sterilization; ozone water can be prepared on demand to reduce waste; and people are well prevented from getting harmed at an excessive ozone concentration.
    Type: Grant
    Filed: December 30, 2020
    Date of Patent: April 8, 2025
    Assignees: QINGDAO HAIER REFRIGERATOR CO., LTD., HAIER SMART HOME CO., LTD.
    Inventors: Tong Xu, Ming Wang, Wenchun Wang, Chunyang Li
  • Patent number: 12267036
    Abstract: A method for controlling fans arranged in different working areas comprises: presetting a plurality of fan operation frequencies, receiving a fan operation request and adjusting a frequency of a pulse width modulation (PWM) controller to a first objective frequency based on the fan operation request, and sending the first objective frequency to the fans arranged in different working areas, to drive a first fan arranged in a first objective working area to run. Each of the plurality of fan operation frequencies corresponds to different working areas, the first objective frequency is one of the plurality of fan operation frequencies, and the first objective working area is one of the plurality of working areas corresponding to the first objective frequency. A system for controlling fans and an electronic device are also disclosed.
    Type: Grant
    Filed: August 18, 2023
    Date of Patent: April 1, 2025
    Assignees: CHAMP TECH OPTICAL (FOSHAN) CORPORATION, Foxconn Technology Co., Ltd.
    Inventors: Kuan-Ming Wang, Yung-Ping Lin, Po-Tsun Kuo
  • Patent number: 12262539
    Abstract: A 3D-NAND memory device is provided. The memory device includes a substrate, a bottom select gate (BSG) disposed over the substrate, a plurality of word lines positioned over the BSG with a staircase configuration and a plurality of insulating layers disposed between the substrate, the BSG, and the plurality of word lines. In the disclosed memory device, one or more first dielectric trenches are formed in the BSG and extend in a length direction of the substrate to separate the BSG into a plurality of sub-BSGs. In addition, one or more common source regions are formed over the substrate and extend in the length direction of the substrate. The one or more common source regions further extend through the BSG, the plurality of word lines and the plurality of insulating layers.
    Type: Grant
    Filed: November 13, 2023
    Date of Patent: March 25, 2025
    Assignee: Yangtze Memory Technologies Co., Ltd.
    Inventors: Yali Song, Li Hong Xiao, Ming Wang
  • Patent number: 12261179
    Abstract: The present disclosure provides a method for preparing an interlayer insulating layer and a method for manufacturing a thin film transistor, and a thin film transistor, belongs to the field of display technology, and can solve the problem of poor resistance to breakdown of the interlayer insulating layer in the related art. The method for preparing an interlayer insulating layer includes the following steps: forming a silicon oxide layer with a first reaction gas and forming a silicon nitride layer with a second reaction gas such that hydrogen content in the silicon nitride layer is less than or equal to hydrogen content in the silicon oxide layer.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: March 25, 2025
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Ming Wang, Ce Zhao, Wei Song