Patents by Inventor Ming Wang

Ming Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240124437
    Abstract: The present disclosure relates to an injectable lurasidone suspension and a preparation method thereof, and in particular to an irregular form of a lurasidone solid and a pharmaceutical composition thereof. The present disclosure also relates to a preparation method for the solid and the pharmaceutical composition thereof, and an application thereof in the treatment of mental diseases. According to the present disclosure, the lurasidone solid prepared has controllable particle size and has Dv5O particle size of 6 ?m to 110 ?m. The good particle size stability can also he maintained in the pharmaceutical composition. The lurasidone suspension preparation obtained by the method is fast-acting, has a long sustained release period, and can effectively reduce the risk caused by poor patient compliance.
    Type: Application
    Filed: March 21, 2022
    Publication date: April 18, 2024
    Inventors: Ming LI, Xiangyong LIANG, Zhengxing SU, Dan LI, Duo KE, Cong YI, Wei WEI, Guifu DENG, Ya PENG, Dong ZHAO, Jingyi WANG
  • Publication number: 20240128868
    Abstract: A switching regulator includes: a power stage circuit; a control circuit; and an operation clock signal generator circuit configured to generate plural test clock signals during a clock determination period and generate an operation clock signal during a normal operation period. When the switching regulator operates during the clock determination period in a discontinuous conduction mode, the control circuit alternatingly generates plural PWM signals corresponding to the test clock signals generated by the operation clock signal generator circuit and an output voltage, wherein each PWM signal corresponds to one test clock signal, so that the power stage circuit generates corresponding phase node voltages at a phase node, wherein among the plural test clock signals, the operation clock signal generator circuit selects one test clock signal corresponding to a minimum phase node voltage as the operation clock signal during the normal operation period.
    Type: Application
    Filed: September 21, 2023
    Publication date: April 18, 2024
    Inventors: Chia-Jung Chang, Shao-Ming Chang, Tsan-He Wang, Jiing-Horng Wang, Yu-Pin Tseng
  • Publication number: 20240128938
    Abstract: A wideband power amplifier (PA) linearization technique is proposed. A current interpolation technique is proposed to linearize power amplifiers over a wide bandwidth. The wideband power amplifier linearization technique employs a novel transconductance Gm linearizer using a current interpolation technique that achieves improvement in the third order intermodulation over wide bandwidth for a sub-micron CMOS differential power amplifier. By using a small amount of compensating bias into an opposite phase differential pair, linearization over wide bandwidth is achieved and can be optimized by adjusting the compensating bias.
    Type: Application
    Filed: September 18, 2023
    Publication date: April 18, 2024
    Inventors: Kun-Long Wu, James June-Ming Wang
  • Patent number: 11963279
    Abstract: A wearable electronic device including: a first portion and a second portion. The first portion includes a first conductive area on a first inner surface of the first portion and a third conductive area on a first outer surface of the first portion. The second portion includes one or more second conductive areas on a second outer surface of the second portion and a fourth conductive area on a second inner surface of the second portion, wherein the first portion is connected to the second portion. A circuit unit is disposed in a second space of the second portion, wherein the circuit unit is configured to enable an input/output unit of the circuit unit in response to the first conductive area and the second conductive areas are triggered.
    Type: Grant
    Filed: January 28, 2022
    Date of Patent: April 16, 2024
    Assignee: Hong Kong Applied Science and Technology Research Institute Company Limited
    Inventors: Ming Leung Vincent Tse, Anson Chan, Yuelin Wang, Chun Zhang
  • Patent number: 11961768
    Abstract: A method includes forming a first transistor, which includes forming a first gate dielectric layer over a first channel region in a substrate and forming a first work-function layer over the first gate dielectric layer, wherein forming the first work-function layer includes depositing a work-function material using first process conditions to form the work-function material having a first proportion of different crystalline orientations and forming a second transistor, which includes forming a second gate dielectric layer over a second channel region in the substrate and forming a second work-function layer over the second gate dielectric layer, wherein forming the second work-function layer includes depositing the work-function material using second process conditions to form the work-function material having a second proportion of different crystalline orientations.
    Type: Grant
    Filed: May 5, 2023
    Date of Patent: April 16, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ya-Wen Chiu, Da-Yuan Lee, Hsien-Ming Lee, Kai-Cyuan Yang, Yu-Sheng Wang, Chih-Hsiang Fan, Kun-Wa Kuok
  • Patent number: 11961514
    Abstract: An acoustic event detection system may employ one or more recurrent neural networks (RNNs) to extract features from audio data, and use the extracted features to determine the presence of an acoustic event. The system may use self-attention to emphasize features extracted from portions of audio data that may include features more useful for detecting acoustic events. The system may perform self-attention in an iterative manner to reduce the amount of memory used to store hidden states of the RNN while processing successive portions of the audio data. The system may process the portions of the audio data using the RNN to generate a hidden state for each portion. The system may calculate an interim embedding for each hidden state. An interim embedding calculated for the last hidden state may be normalized to determine a final embedding representing features extracted from the input data by the RNN.
    Type: Grant
    Filed: December 10, 2021
    Date of Patent: April 16, 2024
    Assignee: Amazon Technologies, Inc.
    Inventors: Chia-Jung Chang, Qingming Tang, Ming Sun, Chao Wang
  • Patent number: 11960167
    Abstract: A backplane includes: a substrate including a circuit structure layer, a first reflective layer disposed on a bearing surface of the substrate, a plurality of light-emitting diode chips, and a plurality of optical structures. The first reflective layer includes a plurality of through holes spaced apart. A light-emitting diode chip in the plurality of light-emitting diode chips is located in one of the plurality of through holes. The plurality of light-emitting diode chips are electrically connected to the circuit structure layer. The circuit structure layer is configured to drive the plurality of light-emitting diode chips to emit light. An optical structure in the plurality of optical structures covers the light-emitting diode chip, a light incident surface of the optical structure is in contact with a light exit surface of the light-emitting diode chip, and a light exit surface of the optical structure is a curved surface.
    Type: Grant
    Filed: February 5, 2021
    Date of Patent: April 16, 2024
    Assignees: BOE MLED Technology Co., Ltd., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Pei Li, Haiwei Sun, Ming Zhai, Lu Yu, Kangle Chang, Jinpeng Li, Pengjun Cao, Yutao Hao, Shubai Zhang, Shuo Wang, Pei Qin, Zewen Gao, Yali Zhang
  • Patent number: 11961769
    Abstract: A method of forming an integrated circuit, including forming a n-type doped well (N-well) and a p-type doped well (P-well) disposed side by side on a semiconductor substrate, forming a first fin active region extruded from the N-well and a second fin active region extruded from the P-well, forming a first isolation feature inserted between and vertically extending through the N-well and the P-well, and forming a second isolation feature over the N-well and the P-well and laterally contacting the first and the second fin active regions.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: April 16, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD
    Inventors: Kuo-Hsiu Hsu, Yu-Kuan Lin, Feng-Ming Chang, Hsin-Wen Su, Lien Jung Hung, Ping-Wei Wang
  • Patent number: 11961093
    Abstract: A method for regulating an unmanned aerial vehicle (UAV) includes receiving a UAV identifier and one or more types of contextual information broadcasted by the UAV. The UAV identifier uniquely identifies the UAV from other UAVs. The one or more types of contextual information includes at least geographical information of the UAV. The method further includes authenticating, via an authentication device, an identity of the UAV based on the UAV identifier to determine whether the UAV is authorized for operation, and transmitting a signal to a remote device in response to determining whether the UAV is authorized for operation.
    Type: Grant
    Filed: June 20, 2022
    Date of Patent: April 16, 2024
    Assignee: SZ DJI TECHNOLOGY CO., LTD.
    Inventors: Ming Gong, Jin Dai, Hao Cui, Xiaodong Wang, Han Huang, Jun Wu, Wei Fan, Ning Ma, Xinhua Rong, Xingsen Lin
  • Patent number: 11962100
    Abstract: A dual-band antenna module includes a first antenna structure and a second antenna structure. The first antenna structure includes a first insulating substrate, a conductive metal layer, a plurality of grounding supports, and a first feeding pin. The second antenna structure includes a second insulating substrate, a top metal layer, a bottom metal layer, and a second feeding pin. The conductive metal layer is disposed on the first insulating substrate. The grounding supports are configured for supporting the first insulating substrate. The second insulating substrate is disposed above the first insulating substrate. The top metal layer and the bottom metal layer are respectively disposed on a top side and a bottom side of the second insulating substrate. The first frequency band signal transmitted or received by the first antenna structure is smaller than the second frequency band signal transmitted or received by the second antenna structure.
    Type: Grant
    Filed: August 7, 2022
    Date of Patent: April 16, 2024
    Assignee: Taiwan Inpaq electronic Co., Ltd.
    Inventors: Ta-Fu Cheng, Shou-Jen Li, Cheng-Yi Wang, Chih-Ming Su
  • Publication number: 20240116612
    Abstract: A pyram-shaped deep-sea pressure-resistance shell and a design method therefor. The shell comprises a conical shell, an annular combined shell, a cylindrical shell, a flange bolt, and a perforated thick plate; a bottom end of the conical shell is connected with a top end of the annular combined shell, the conical shell being in communication with an interior part of the annular combined shell; the perforated thick plate blocks the bottom end of the annular combined shell, the perforated thick plate and the annular combined shell being connected by means of multiple flange bolts; the cylindrical shell is disposed inside the annular combined shell, a lower end of the cylindrical shell being inserted in a gap between the annular combined shell and the perforated thick plate.
    Type: Application
    Filed: March 18, 2022
    Publication date: April 11, 2024
    Applicant: JIANGSU UNIVERSITY OF SCIENCE AND TECHNOLOGY
    Inventors: Jian ZHANG, Xiaobin LIU, Chenyang DI, Ming ZHAN, Yongsheng LI, Tan ZHAO, Fang WANG, Wenxian TANG
  • Publication number: 20240116196
    Abstract: The present disclosure provides a collaborative robot arm and a joint module. The joint module includes a housing, a driving assembly, and a multi-turn absolute encoder. The joint module detects the angular position of the output shaft and records a number of rotating revolutions of the output shaft only by means of the multi-turn absolute encoder. The multi-turn absolute encoder includes a base, a bearing, a rotating shaft, an encoding disk, and a circuit board, the encoding disk is rotatably connected with the base by the rotating shaft and the bearing, the circuit board is fixedly connected with the base, and the reading head on the circuit board detects the angular position of the output shaft cooperatively with the encoding disk, making the multi-turn absolute encoder be an integrated structure. The base and the rotating shaft are detachably connected with the housing and the output shaft respectively.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 11, 2024
    Inventors: Zhongbin Wang, Yu Jiang, Yingbo Lei, Weizhi Ye, Lun Wang, Ming Zhang
  • Publication number: 20240121523
    Abstract: A light-adjusting device having first regions and second regions is provided. The light-adjusting device includes pillars that form several groups of meta structures. The groups of meta structures correspond to the first regions, and from a top view, the first regions and the second regions are arranged in a checkerboard pattern.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 11, 2024
    Inventors: Kai-Hao CHANG, Chun-Yuan WANG, Shin-Hong KUO, Zong-Ru TU, Po-Hsiang WANG, Chih-Ming WANG
  • Publication number: 20240122075
    Abstract: An activation function generator based on a magnetic domain wall driven magnetic tunnel junction and a method for manufacturing the same are provided, including: a spin orbit coupling layer configured to generate a spin orbit torque; a ferromagnetic free layer formed on the spin orbit coupling layer and configured to provide a magnetic domain wall motion racetrack; a nonmagnetic barrier layer formed on the ferromagnetic free layer; a ferromagnetic reference layer formed on the nonmagnetic barrier layer; a top electrode formed on the ferromagnetic reference layer; antiferromagnetic pinning layers formed on two ends of the ferromagnetic free layer; a left electrode and a right electrode respectively formed at two positions on the antiferromagnetic pinning layers.
    Type: Application
    Filed: March 19, 2021
    Publication date: April 11, 2024
    Inventors: Guozhong XING, Long LIU, Di WANG, Huai LIN, Yan WANG, Xiaoxin XU, Ming LIU
  • Publication number: 20240116194
    Abstract: An integrated joint module includes a housing, a driving assembly, a speed reduction assembly, a braking assembly and an encoding assembly. The housing includes a first housing and a second housing, an annular supporting platform is arranged on an inner side of the first housing. The driving assembly includes an output shaft, a stator embedded in the annular supporting platform, and a rotor connected with the output shaft and arranged on an inner side of the stator, the speed reduction assembly and the braking assembly are connected with two ends of the output shaft. The encoding assembly is arranged on a side of the braking assembly away from the driving assembly and connected with the output shaft, the second housing is sleeved on the encoding assembly and connected with the first housing. The integrated joint module helps to simplify the structure of the joint module and reduce the cost.
    Type: Application
    Filed: January 6, 2023
    Publication date: April 11, 2024
    Inventors: ZHONGBIN WANG, Yu Jiang, Yingbo Lei, Weizhi Ye, Lun Wang, Ming Zhang
  • Patent number: 11952659
    Abstract: Atomic layer deposition methods for coating an optical substrate with magnesium fluoride. The methods include two primary processes. The first process includes the formation of a magnesium oxide layer over a surface of a substrate. The second process includes converting the magnesium oxide layer to a magnesium fluoride layer. These two primary processes may be repeated a plurality of times to create multiple magnesium fluoride layers that make up a magnesium fluoride film. The magnesium fluoride film may serve as an antireflective coating layer for an optical substrate, such as an optical lens.
    Type: Grant
    Filed: July 28, 2020
    Date of Patent: April 9, 2024
    Assignee: Corning Incorporated
    Inventors: Ming-Huang Huang, Hoon Kim, Jue Wang
  • Patent number: 11955225
    Abstract: A method for providing dietary recommendation for a subject includes acquiring a dietary target for the subject, acquiring data associated with dietary consumption of the subject, and determining a balance score based on the acquired dietary target and the acquired data associated with dietary consumption of the subject. The method further includes acquiring a plurality of meal options for the subject, where each of the plurality of meal options is representative of a suggested meal, determining a salience score for each of the plurality of meal options, where the determination is based on the dietary target, dietary information of the respective meal option, and the determined balance score, and generating a personalized dietary recommendation for the subject based on at least one of the determined salience scores.
    Type: Grant
    Filed: August 3, 2020
    Date of Patent: April 9, 2024
    Assignee: KONINKLIJKE PHILIPS N.V.
    Inventors: Lu Wang, Ming Zhang, Adrienne Heinrich
  • Patent number: 11952390
    Abstract: Provided are a phosphorescent organometallic complex and a use thereof. The metal complex has a ligand with a structure represented by Formula 1 and may be used as a light-emitting material in an electroluminescent device. These novel metal complexes can not only maintain low voltage and improve device efficiency in electroluminescent devices but also greatly reduce the half-peak width of light emitted by these devices so as to greatly improve color saturation of the light emitted by these devices, thereby providing better device performance. Further provided are an electroluminescent device and a compound formulation.
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: April 9, 2024
    Assignee: Beijing Summer Sprout Technology Co., Ltd.
    Inventors: Wei Cai, Ming Sang, Chi Yuen Raymond Kwong, Chuanjun Xia, Zhen Wang, Tao Wang, Hongbo Li
  • Patent number: 11955507
    Abstract: A light-emitting device, including a first type semiconductor layer, a patterned insulating layer, a light-emitting layer, and a second type semiconductor layer, is provided. The patterned insulating layer covers the first type semiconductor layer and has a plurality of insulating openings. The insulating openings are separated from each other. The light-emitting layer is located in the plurality of insulating openings and covers a portion of the first type semiconductor layer. The second type semiconductor layer is located on the light-emitting layer.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: April 9, 2024
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Hsin-Hung Li, Wei-Syun Wang, Chih-Chiang Chen, Yu-Cheng Shih, Cheng-Chan Wang, Chia-Hsin Chung, Ming-Jui Wang, Sheng-Ming Huang
  • Patent number: 11955515
    Abstract: A semiconductor device with dual side source/drain (S/D) contact structures and a method of fabricating the same are disclosed. The method includes forming a fin structure on a substrate, forming a superlattice structure on the fin structure, forming first and second S/D regions within the superlattice structure, forming a gate structure between the first and second S/D regions, forming first and second contact structures on first surfaces of the first and second S/D regions, and forming a third contact structure, on a second surface of the first S/D region, with a work function metal (WFM) silicide layer and a dual metal liner. The second surface is opposite to the first surface of the first S/D region and the WFM silicide layer has a work function value closer to a conduction band energy than a valence band energy of a material of the first S/D region.
    Type: Grant
    Filed: July 28, 2022
    Date of Patent: April 9, 2024
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Shih-Chuan Chiu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang, Huan-Chieh Su, Chun-Yuan Chen, Li-Zhen Yu, Yu-Ming Lin