Abstract: The present disclosure provides a memory device, a semiconductor device, and a method of operating a memory device. A memory device includes a memory cell, a bit line, a word line, a select transistor, a fuse element, and a heater. The bit line is connected to the memory cell. The word line is connected to the memory cell. The select transistor is disposed in the memory cell. A gate of the select transistor is connected to the word line. The fuse element is disposed in the memory cell. The fuse element is connected to the bit line and the select transistor. The heater is configured to heat the fuse element.

Abstract: A two-phase immersion-type heat dissipation structure is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate and a plurality of non-vertical fins. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other. The non-fin surface is configured to be in contact with a heating element immersed in a two-phase coolant. The fin surface is connected with the non-vertical fins, a cross-sectional contour of one of the non-vertical fins has a top end point and a bottom end point connected with the fin surface, and the top and bottom end points are opposite to each other. A length of a cross-sectional contour line defined from the top end point to the bottom end point is greater than a perpendicular line length of a perpendicular line defined from the top end point to the fin surface.

Abstract: A two-phase immersion-type heat dissipation structure having a porous structure is provided. The two-phase immersion-type heat dissipation structure includes a heat dissipation substrate, a plurality of fins, and a reinforcement frame. The heat dissipation substrate has a fin surface and a non-fin surface that face away from each other, the non-fin surface is configured to be in contact with a heat source immersed in a two-phase coolant, and the fins are integrally formed on the fin surface. A porous structure is covered onto at least one portion of the fin surface and at least one portion of the plurality of fins, and has a porosity of from 10% to 50% and a thickness that is from 0.1 mm to 1 mm. The reinforcement frame is bonded to the heat dissipation substrate and surrounds another one portion of the plurality of fins.

Abstract: The present disclosure provides an encapsulating structure, a display substrate and a manufacturing method therefor, and a display apparatus. The encapsulating structure is used for encapsulating components, and includes: a first encapsulating layer configured to cover the components; and a second encapsulating layer stacked with the first encapsulating layer; the second encapsulating layer is located on the side of the first encapsulating layer away from the components, a surface of the second encapsulating layer facing the first encapsulating layer is in contact with a surface of the first encapsulating layer facing the second encapsulating layer, and a surface of the second encapsulating layer away from the first encapsulating layer is substantially parallel to a plane where the encapsulating structure is located.

Abstract: Provided herein are compounds according to Formula (I) or a pharmaceutically acceptable salt thereof, wherein R1, R2, R3, R5, and R7 are defined herein. Also provided herein are pharmaceutical compositions comprising a compound of Formula (I) as well as the use of such compounds as M4 receptor agonists.

Abstract: A two-phase immersion-type heat dissipation structure having skived fin with high porosity is provided. The two-phase immersion-type heat dissipation structure having skived fin with high porosity includes a porous heat dissipation structure having a total porosity that is equal to or greater than 5%. The porous heat dissipation structure includes a porous substrate and a plurality of porous and skived fins. The porous substrate has a first surface and a second surface that face away from each other. The second surface of the porous substrate is configured to be in contact with a heating element that is immersed in a two-phase coolant. The plurality of porous and skived fins are integrally formed on the first surface of the porous substrate by skiving. A first porosity of the plurality of porous and skived fins is greater than a second porosity of the porous substrate.

Abstract: A device includes a fin extending from a semiconductor substrate; a gate stack over the fin; a first spacer on a sidewall of the gate stack; a source/drain region in the fin adjacent the first spacer; an inter-layer dielectric layer (ILD) extending over the gate stack, the first spacer, and the source/drain region, the ILD having a first portion and a second portion, wherein the second portion of the ILD is closer to the gate stack than the first portion of the ILD; a contact plug extending through the ILD and contacting the source/drain region; a second spacer on a sidewall of the contact plug; and an air gap between the first spacer and the second spacer, wherein the first portion of the ILD extends across the air gap and physically contacts the second spacer, wherein the first portion of the ILD seals the air gap.

Abstract: A thermoplastic polyolefin composition comprises: (A) a polypropylene polymer; (B) an elastomer component; (C) an additive component; and (D) a scavenger component comprising a polyacetoacetate compound having the Formula (I) defined herein and calcium carbonate. And an article is made from the thermoplastic polyolefin composition.

Abstract: A method for detecting and compensating CNC tools being implemented in an electronic device, receives from a detector first parameters and second parameters in respect of a first tool. Such first parameters include at least one of service life, blade break information, and blade chipping information of the first tool, and such second parameters include at least one of length extension information, length wear information, radial wear information, and blade thickness wear information of the first tool. Based on the first parameters, instructions to process the workpiece are transmitted or not. Upon receiving the second parameters, instructions to adjust operation of the first tool are transmitted, to compensate for deterioration in normal use.

Abstract: Present invention is related to a tumor microenvironment on chip or a biochip for cell therapy having a carrier, a first cell or tissue culture area and a second cell or tissue area imbedded within the carrier. The present invention provides a biochip successfully cooperating micro fluidic technology and cell culture achieving the goal for detecting or testing the function of cell therapy for cancer or tumor.

Abstract: A docker image is received. The docker image is for a container. The container contains files that allow for virtualization of applications that run within the container. The docker image is parsed to identify layer files in the docker image. Installed software components (e.g., installed files) and/or hardware components in the layer files are identified. Software application index calls are made to generate information that identifies relationships between the installed software components and/or hardware components. The relationships between the installed software components and/or hardware components are then displayed to a user.

Abstract: Provided is a memory device including a substrate, a plurality of landing pads, a protective layer, a filling layer, a plurality of cup-shaped lower electrodes, a capacitor dielectric layer, and an upper electrode. The landing pads are disposed on the substrate. The protective layer conformally covers sidewalls of the landing pads. The filling layer is laterally disposed between the landing pads, wherein the filling layer has a top surface higher than a top surface of the landing pads. The cup-shaped lower electrodes are respectively disposed on the landing pads. The capacitor dielectric layer covers a surface of the cup-shaped lower electrodes. The upper electrode covers a surface of the capacitor dielectric layer. A method of forming a memory device is also provided.

Abstract: A gas flow accelerator may include a body portion, and a tapered body portion including a first end integrally formed with the body portion. The gas flow accelerator may include an inlet port connected to the body portion and to receive a process gas to be removed from a semiconductor processing tool by a main pumping line. The semiconductor processing tool may include a chuck and a chuck vacuum line to apply a vacuum to the chuck to retain a semiconductor device. The tapered body portion may be configured to generate a rotational flow of the process gas to prevent buildup of processing byproduct on interior walls of the main pumping line. The gas flow accelerator may include an outlet port integrally formed with a second end of the tapered body portion. An end portion of the chuck vacuum line may be provided through the outlet port.

Abstract: A semiconductor device includes a first metal layer, a second metal layer, and an inter-metal dielectric layer disposed between the first metal layer and the second metal layer. The inter-metal dielectric layer includes: a first dielectric layer disposed on the first metal layer and in direct contact with the first metal layer, wherein the first dielectric layer has a stress value less than 0; a second dielectric layer disposed on the first dielectric layer, wherein the second dielectric layer has a stress value greater than 0; and a third dielectric layer disposed on the second dielectric layer, wherein the third dielectric layer has a stress value less than 0. A thickness of the third dielectric layer is greater than a thickness of the second dielectric layer, and the thickness of the second dielectric layer is greater than a thickness of the first dielectric layer.

Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a plurality of pads, a first dielectric layer, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A plurality of first openings of the first dielectric layer expose part of the pads, and a first surface of the first dielectric layer is higher upper surfaces of the pads. The solder balls are disposed in a plurality of third openings of the third dielectric layer and are electrically connected to the second metal layer and the carrier. The surface treatment layer is disposed on the upper surfaces, and a top surface of the surface treatment layer is higher than the first surface.

Abstract: An outlier IC detection method includes acquiring first measured data of a first IC set, training the first measured data for establishing a training model, acquiring second measured data of a second IC set, generating predicted data of the second IC set by using the training model according to the second measured data, generating a bivariate dataset distribution of the second IC set according to the predicted data and the second measured data, acquiring a predetermined Mahalanobis distance on the bivariate dataset distribution of the second IC set, and identifying at least one outlier IC from the second IC set when at least one position of the at least one outlier IC on the bivariate dataset distribution is outside a range of the predetermined Mahalanobis distance.

Abstract: In some implementations, a device may receive data associated with a set of taxonomies, wherein a taxonomy, of the set of taxonomies, represents a classification of a set of relationships of data entries of the data. The device may integrate the set of taxonomies to generate a meta-taxonomy of the data. The device may generate a data graph of the data based on integrating the set of taxonomies to generate the meta-taxonomy, wherein the data graph is based on a graph-based search model that is associated with at least one of: taxonomy-based filtering, metadata attribute prioritization, or semantic matching. The device may store the data graph.

Abstract: A circuit board structure includes a carrier, a thin film redistribution layer disposed on the carrier, solder balls electrically connected to the thin film redistribution layer and the carrier, and a surface treatment layer. The thin film redistribution layer includes a first dielectric layer, pads, a first metal layer, a second dielectric layer, a second metal layer, and a third dielectric layer. A top surface of the first dielectric layer is higher than an upper surface of each pad. The first metal layer is disposed on a first surface of the first dielectric layer. The second dielectric layer has second openings exposing part of the first metal layer. The second metal layer extends into the second openings and is electrically connected to the first metal layer. The third dielectric layer has third openings exposing part of the second metal layer. The surface treatment layer is disposed on the upper surfaces.

Abstract: A temperature sensing device includes a substrate, a first reflective module, a first window cover, and a dual thermopile sensor. The first reflective module is disposed on the substrate, including a first mirror chamber with a narrow field of view (FOV), and the first reflective module focuses a thermal radiation from measured object to a first image plane in the first mirror chamber. The first window cover is disposed on the first reflective module, and the first window cover allows a selected band of the thermal radiation to pass through. The dual thermopile sensor is disposed on the substrate and located in the first mirror chamber, and the dual thermopile sensor senses a temperature data from the first image plane. Additional second reflective module, LED source plus pin hole with same FOV of dual thermopile sensor can illuminate the measured object for ease of placement of object to be heated.

Abstract: Provided are point of care sensor systems that include portable readers and disposable cartridges for receiving and analyzing samples. A cartridge may be equipped with one or more sensor channels, each containing one or more sensors. After providing a sample to a cartridge, the cartridge can be inserted into a reader, which can interact with the cartridge to perform on-cartridge sensing and receive signals indicating the presence and/or quantity of one or more targets in the sample. Examples of cartridges can include cardiac panels, sepsis panels and the like. In some embodiments, the same sensor hardware may be configured for multiple measurements of different targets conducted at different time frames. Also provided herein are novel on-cartridge solid and liquid reagent storage and delivery mechanisms.