Patents by Inventor Ming Ying

Ming Ying has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050146311
    Abstract: An adaptive dead-time controller is provided to improve a conversion efficiency of a power converter at a low/no load condition. The adaptive dead-time controller has a reference voltage generator, an error amplifier, a comparator, an oscillator, an adaptive dead-time generator and a flip-flop. The adaptive dead-time controller outputs a gate pulse according to an output voltage and an oscillation. When power converter is at a low/no load condition, the adaptive dead-time generator delays a rising edge of an oscillation signal by a dead-time from a rising edge of a clock signal, so the frequency of the gate pulse and the power consumption of the power converter are reduced.
    Type: Application
    Filed: September 28, 2004
    Publication date: July 7, 2005
    Applicant: Leadtrend Technology Corporation
    Inventors: Ming-Ying Kuo, Hung-Ta Lee
  • Patent number: 6157272
    Abstract: This invention relates to an AC power network for collecting the electric powers of distributed power cells. The AC power network of the invention includes a plurality of AC power cells, a plurality of transmission lines, and at least one resistant load. The AC power network has important properties, such as simple structure and easy setup and maintenance. In addition, when there is non-uniform distribution among AC power cells or some AC power cells are broken down, the AC power network possesses equal potential rings or equal potential planes to eliminating non-uniform distribution without decreasing its power efficiency.
    Type: Grant
    Filed: June 29, 1998
    Date of Patent: December 5, 2000
    Inventors: Mei-Shong Kuo, Ming-Ying Kuo
  • Patent number: 5835962
    Abstract: A memory management unit (MMU) includes a translation lookaside buffer capable of simultaneously servicing three requests supplied to the MMU by an instruction cache and two data caches, respectively. Also, an arbiter selects one of several pending requests from sources of different priorities for immediate processing by the MMU, using a process which avoids undue delay in servicing requests from sources of lower priority.
    Type: Grant
    Filed: December 24, 1996
    Date of Patent: November 10, 1998
    Assignee: Fujitsu Limited
    Inventors: Chih-Wei David Chang, Kioumars Dawallu, Joel F. Boney, Ming-Ying Li, Jen-Hong Charles Chen
  • Patent number: D473191
    Type: Grant
    Filed: May 24, 2002
    Date of Patent: April 15, 2003
    Inventor: Ming-Ying Shen
  • Patent number: D494962
    Type: Grant
    Filed: October 29, 2002
    Date of Patent: August 24, 2004
    Inventor: Ming-Ying Shen
  • Patent number: D413308
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: August 31, 1999
    Assignee: Inroad, Inc.
    Inventors: Michael D. Nelson, Chung-Ming Ying, David A. Herrin, Domenic S. Giuntoli
  • Patent number: D414756
    Type: Grant
    Filed: March 20, 1998
    Date of Patent: October 5, 1999
    Assignee: Inroad, Inc.
    Inventors: Michael D. Nelson, Chung-Ming Ying, Jennifer E. Zubeck