Abstract: A developer carrying member is disclosed which can stably provide toners with triboelectric charges even in various environments. The developer carrying member has a substrate and a resin layer as a surface layer formed on the surface of the substrate, and the resin layer contains a thermosetting resin as a binder resin, an acrylic resin having two units having specific structures, and conductive particles.

Abstract: The present invention relates to a developer carrying member which includes a substrate and the resin layer formed on the surface of the substrate, wherein the resin layer is obtained by thermally curing the coating material composition including at least the following (A) to (E): (A) a thermosetting resin as a binder resin; (B) an alcohol as a solvent, containing 1 to 4 carbon atoms; (C) a resin including the unit represented by the following formula (1); (D) graphitized carbon black having a graphite (002) lattice spacing of 0.3370 nm or more and 0.3450 nm or less as measured by X-ray diffraction; and (E) acid carbon black having a pH of 5.

Abstract: The present invention provides a developer carrying member capable of maintaining excellent charge imparting property even under long-term use. The present invention relates to a developer carrying member including a substrate and a resin layer, wherein the resin layer includes an acrylic resin having three specific structural units and electroconductive particles.

Abstract: A developer carrying member and a developing assembly are provided which can stably provide the toner with triboelectric charges, may less cause any problems such as image density decrease, density non-uniformity and spots around images even during running on a large number of sheets, and can enjoy a stable and good developing performance. The developer carrying member has a substrate and a resin layer, and the resin layer containing a thermosetting resin, an acrylic resin having specific units and electroconductive particles.

Abstract: Semiconductor integrated circuit apparatus and electronic apparatus having a leakage current detection circuit where arbitrarily set leakage current detection ratio does not depend on power supply voltage, temperature, or manufacturing variations, and where leakage current detection is straightforward. Semiconductor integrated circuit apparatus extracts a stable potential from the center of two NchMIS transistors, amplifies drain current of an NchMOS transistor taking this potential as a gate potential to a current value of an arbitrary ratio using current mirror circuit, makes this current value flow through NchMOS transistor with the gate and drain connected, and applies drain potential of this NchMOS transistor to the gate of leakage current detection NchMOS transistor.

Abstract: Semiconductor integrated circuit apparatus and electronic apparatus having a leakage current detection circuit where arbitrarily set leakage current detection ratio does not depend on power supply voltage, temperature, or manufacturing variations, and where leakage current detection is straightforward. Semiconductor integrated circuit apparatus extracts a stable potential from the center of two NchMIS transistors, amplifies drain current of an NchMOS transistor taking this potential as a gate potential to a current value of an arbitrary ratio using current mirror circuit, makes this current value flow through NchMOS transistor with the gate and drain connected, and applies drain potential of this NchMOS transistor to the gate of leakage current detection NchMOS transistor.

Abstract: Semiconductor integrated circuit apparatus and electronic apparatus having a leakage current detection circuit where arbitrarily set leakage current detection ratio does not depend on power supply voltage, temperature, or manufacturing variations, and where leakage current detection is straightforward. Semiconductor integrated circuit apparatus extracts a stable potential from the center of two NchMIS transistors, amplifies drain current of an NchMOS transistor taking this potential as a gate potential to a current value of an arbitrary ratio using current mirror circuit, makes this current value flow through NchMOS transistor with the gate and drain connected, and applies drain potential of this NchMOS transistor to the gate of leakage current detection NchMOS transistor.

Abstract: In a semiconductor integrated circuit device using a ZSCCMOS circuit, a combinational circuit includes a plurality of logic gate circuits, and receives an output of a data holding circuit. The data holding circuit can continue to hold data during cut-off of power supply, and when receiving a predetermined value as a control signal, outputs a predetermined fixed value. A logic gate circuit which outputs “L” when the output of the data holding circuit has the predetermined fixed value has power supply ends connected to a pseudo-power supply line VDDV and a low potential power supply line VSS. A logic gate circuit which outputs “H” when the output of the data holding circuit has the predetermined fixed value has power supply ends connected to a high potential power supply line VDD and a pseudo-power supply line VSSV.

Abstract: The present invention aims at providing an isoxazoline derivative and a pharmaceutically acceptable salt thereof, both having an excellent herbicidal effect and an excellent selectivity between crop and weed. The isoxazoline derivative of the present invention is represented by the following general formula: wherein R1 is a haloalkyl group; R2 is a hydrogen atom, an alkyl group, or the like; R3, R4, R5 and R6 are each a hydrogen atom, or the like; Y is a pyrrolyl group, a pyrazolyl group, an isothiazolyl group, an oxazolyl group, an imidazolyl group, a pyridazinyl group, a pyrimidinyl group, a pyrazinyl group, a triazinyl group, a triazolyl group, an oxadiazolyl group, or the like; and n is an integer of 0 to 2.

Abstract: A simple method for designing a semiconductor integrated circuit having the ZSCCMOS structure is provided. For each kind of primitive logic gate, a logic gate cell H and a layout cell H each having a high-potential power supply end connected to VDD and a low potential power supply end connected to a pseudo-power supply line VSSV, and a logic gate cell L and a layout cell L each having a high-potential power supply end connected to a pseudo-power supply line VDDV and a low potential power supply end connected to VSS, are prepared. Logic simulation is performed on the assumption of a state immediately before power cut-off using a net list. The logic gate cell H is used as a primitive logic gate having an output state of “H” and the logic gate cell L is used as a primitive logic gate having an output state of “L”, thereby changing the net list. A layout is generated using the layout cells H and L.

Abstract: A semiconductor integrated circuit apparatus includes an internal circuit having a MIS transistors on a semiconductor substrate and a substrate voltage control block that supplies a substrate voltage to the internal circuit and controls threshold voltages for the MIS transistors of the internal circuit. The apparatus also includes a leakage current detection MIS transistor and a leakage current detection circuit. The substrate voltage control block generates a substrate voltage based on comparison results of the comparator and applies the generated substrate voltage to the substrate of the leakage current detection MIS transistor and the substrate of the MIS transistors of the internal circuit. The substrate voltage control block includes a switch arranged between first and second input terminals of a comparator and a drain of the leakage current detection MIS transistor and a reference potential terminal, as well as an input data corrector that carries out substrate voltage adjustment.

Abstract: A power supply voltage control apparatus capable of freely setting a clock period setting margin according to a system clock frequency, and capable of converging power supply voltage to minimum power supply voltage where normal operation is possible in a short period of time without errors in operation of internal circuits in response to changes in the system clock frequency is provided. Power supply voltage control apparatus is provided with a first frequency-divider that frequency-divides the system clock at a first frequency-diving ratio, a second frequency-divider that frequency-divides an output of a voltage control oscillator at a second frequency-dividing ratio, a phase comparator/frequency comparator that carries out a phase comparison/frequency comparison on the respective output signals of the first and second frequency-dividers, and a controller.

Abstract: Zn alloy particles for high corrosion resistance rust prevention paint containing, by mass %, Mg: 0.01 to 30% and having a balance of Zn and unavoidable impurities, having physical fracture facets and/or cracks of a length of 0.01 ?m or more or cracks of a depth of 0.01 ?m or more, having an average particle size of 0.05 to 200 ?m, and having an aspect ratio of maximum size and minimum size (maximum size/minimum size) of an average value of 1 to 1.5. Also, a high corrosion resistance rust prevention paint containing these Zn alloy particles and a high corrosion resistance steel material and steel structure coated with that paint.

Abstract: A developing apparatus is provided which can suppress a fluctuation in image density in a discontinuous printing mode provided with a pause period. The developing apparatus includes a developer for developing an electrostatic latent image on a photosensitive drum, a developer bearing member for carrying and conveying the developer and a developer layer thickness-regulating unit placed close to the developer bearing member for regulating the amount of the developer carried and conveyed by the developer bearing member, the developer layer thickness-regulating unit being. As the developer, a negatively chargeable, one-component, magnetic toner is used having magnetic toner particles containing a binder resin and a magnetic iron oxide particle, and has a specific saturation magnetization, specific weight-average particle diameter and specific composition.

Abstract: A semiconductor integrated circuit apparatus includes an internal circuit having a MIS transistors on a semiconductor substrate and a substrate voltage control block that supplies a substrate voltage to the internal circuit and controls threshold voltages for the MIS transistors of the internal circuit. The apparatus also includes a leakage current detection MIS transistor and a leakage current detection circuit. The substrate voltage control block generates a substrate voltage based on comparison results of the comparator and applies the generated substrate voltage to the substrate of the leakage current detection MIS transistor and the substrate of the MIS transistors of the internal circuit. The substrate voltage control block includes a switch arranged between first and second input terminals of a comparator and a drain of the leakage current detection MIS transistor and a reference potential terminal, as well as an input data corrector that carries out substrate voltage adjustment.

Abstract: A configuration is adopted comprising an NchMOS transistor 1 equipped with an insulating isolation layer 4 providing insulation and isolation using an SOI structure, and a capacitor formed using an insulating film, with a silicon substrate B being made thin and substrate capacitance being reduced. The NchMOS transistor 1 is equipped with insulating isolation regions 5a, 5b that are perfectly depleted or partially depleted in a manner close to being perfectly depleted. An electrode 6 connected to a gate electrode G of the NchMOS transistor 1 and an impurity diffusion layer 7 are connected via a capacitor 2. A source electrode S is connected to a power supply terminal 3a, a gate electrode G is connected to an internal signal line S1, and a drain electrode D is connected to an internal signal line S2. Substrate bias voltage is then controlled using capacitor coupling when the NchMOS transistor 1 is turned on/off.

Abstract: A developer carrying member is disclosed which can stably provide toners with triboelectric charges even in various environments. The developer carrying member has a substrate and a resin layer as a surface layer formed on the surface of the substrate, and the resin layer contains a thermosetting resin as a binder resin, an acrylic resin having two units having specific structures, and conductive particles.

Abstract: The present invention is to provide an oxopyrazine derivative having an excellent herbicidal activity and besides exhibiting high safety for useful crops and the like, or a salt thereof, and a herbicide containing the same. The present invention relates to an oxopyrazine derivative represented by formula [I]: wherein X1 represents an oxygen atom or a sulfur atom; X2 represents CH or N(O)m; m represents an integer of 0 or 1; R1 represents a hydrogen atom, a C1-C12 alkyl group and the like; R2 represents a halogen atom, a cyano group and the like; R3 is a hydroxyl group, a halogen atom and the like; A1 represents C(R4R5); A2 represents C(R6R7) or C?O; A3 represents C(R8R9); R4 to R9 represent a hydrogen atom or an alkyl group, or a salt thereof, and a herbicide containing these compounds.

Abstract: A method of searching a keyword includes extracting a keyword from subtitle data included in a broadcast signal, displaying an extracted keyword with an image according to the broadcast signal, searching for a keyword using an search engine through a communication network when an instruction to search a displayed keyword is received, and displaying a search result by the search engine.

Abstract: A gas flow rate verification unit capable of enhancing reliability of gas flow rate verification. The gas flow rate verification unit has a first cutoff valve that is connected to a flow rate control device and to which gas is inputted, a second cutoff valve for discharging the gas, a communication member for allowing the first cutoff valve and the second cutoff valve to communicate with each other, a pressure sensor for detecting the pressure of the gas supplied between the first cutoff valve and the second cutoff valve, a temperature detector for detecting the temperature of the gas supplied between the first cutoff valve and the second cutoff valve, and a control means for verifying the flow of the gas flowing in the flow control device, the verification being performed by using both the result of the pressure detected by the pressure sensor and the result of the temperatures detected by the temperature detector.