Abstract: In a semiconductor integrated circuit device using a ZSCCMOS circuit, a combinational circuit includes a plurality of logic gate circuits, and receives an output of a data holding circuit. The data holding circuit can continue to hold data during cut-off of power supply, and when receiving a predetermined value as a control signal, outputs a predetermined fixed value. A logic gate circuit which outputs “L” when the output of the data holding circuit has the predetermined fixed value has power supply ends connected to a pseudo-power supply line VDDV and a low potential power supply line VSS. A logic gate circuit which outputs “H” when the output of the data holding circuit has the predetermined fixed value has power supply ends connected to a high potential power supply line VDD and a pseudo-power supply line VSSV.

Abstract: A simple method for designing a semiconductor integrated circuit having the ZSCCMOS structure is provided. For each kind of primitive logic gate, a logic gate cell H and a layout cell H each having a high-potential power supply end connected to VDD and a low potential power supply end connected to a pseudo-power supply line VSSV, and a logic gate cell L and a layout cell L each having a high-potential power supply end connected to a pseudo-power supply line VDDV and a low potential power supply end connected to VSS, are prepared. Logic simulation is performed on the assumption of a state immediately before power cut-off using a net list. The logic gate cell H is used as a primitive logic gate having an output state of “H” and the logic gate cell L is used as a primitive logic gate having an output state of “L”, thereby changing the net list. A layout is generated using the layout cells H and L.

Abstract: A developing method is provided in which a developer is carried on a developer carrying member, a thin layer of the developer is formed thereon and a latent image on a latent image bearing member is developed with a developer. The developer is composed of magnetic toner particles containing a binder resin and a magnetic powder. The magnetic powder has a saturation magnetization of 67.0 Am2/kg to 75.0 Am2/kg in a magnetic field of 79.6 kA/m (1,000 oersteds) and has a residual magnetization of 4.5 Am2/kg or less. In the surface profile of the conductive resin coat layer of the developer carrying member, the relationship 1.00?S/A?1.65 is satisfied where S is a surface area of regions zoned by an area A of microscopic unevenness regions from which parts exceeding a reference plane by 0.5×r (r: weight average particle diameter (?m) of a toner used) or more have been excluded.

Abstract: Provided is a relative pressure control system has a simple configuration, but enables accurate regulation of a division ratio of an operation gas, and concurrently makes it possible to securely drain the operation gas from an operation gas pipeline in case of emergency. The system includes a plurality of air operated valves of a normally open type that are connected to an operation gas pipeline supplied with an operation gas; pressure sensors that are series connected to the respective air operated valves and that detect output pressures of the respective air operated valves; a controller that controls operation pressures of the respective air operated valves in accordance with the pressures detected by the pressure sensors; and a hard interlock solenoid valve that correlates the plurality of air operated valves to one another so that at least one of the plurality of air operated valves is normally opened.

Abstract: A liquid raw material supply unit for a vaporizer is adapted to supply a liquid raw material to the vaporizer that vaporizes the liquid raw material.

Abstract: A liquid raw material supply unit for a vaporizer is adapted to supply a liquid raw material to the vaporizer that vaporizes the liquid raw material.

Abstract: The present invention provides pyrazole derivatives useful as production intermediates for isoxazoline derivatives having an excellent herbicidal effect and selectivity between crops and weeds as well as processes for producing the same.

Abstract: A developing method is provided in which a developer is carried on a developer carrying member, a thin layer of the developer is formed thereon and a latent image on a latent image bearing member is developed with a developer. The developer is composed of magnetic toner particles containing a binder resin and a magnetic powder. The magnetic powder has a saturation magnetization of 67.0 Am2/kg to 75.0 Am2/kg in a magnetic field of 79.6 kA/m (1,000 oersteds) and has a residual magnetization of 4.5 Am2/kg or less. In the surface profile of the conductive resin coat layer of the developer carrying member, the relationship 1.00?S/A?1.65 is satisfied where S is a surface area of regions zoned by an area A of microscopic unevenness regions from which parts exceeding a reference plane by 0.5×r (r: weight average particle diameter (?m) of a toner used) or more have been excluded.

Abstract: A difluoroalkene derivative which is sufficiently effective in controlling various pests even when used in a small dose and is highly safe for crops, natural enemies to the pests, and animals; and an intermediate for the derivative.

Abstract: The present invention provides pyrazole derivatives useful as production intermediates for isoxazoline derivatives having an excellent herbicidal effect and selectivity between crops and weeds as well as processes for producing the same.

Abstract: The present invention provides a high-strength thick steel plate having a plate thickness of 50 to 80 mm and a tensile strength of 490 to 570 MPa which is able to realize an excellent HAZ toughness even when welding with a heat input of 20 to 100 kJ/mm is conducted and is characterized by containing, by wt %, 0.03-0.14% of C, 0.30% or less of Si, 0.8-2.0% of Mn, 0.02% or less of P, 0.005% or less of S, 0.8-4.0% of Ni, 0.003-0.040% of Nb, 0.001-0.040% of Al, 0.0010-0.0100% of N, and 0.005-0.030% of Ti, where Ni and Mn satisfy equation [1], and the balance of iron and unavoidable impurities: Ni/Mn?10×Ceq?3 (0.36<Ceq<0.

Abstract: A semiconductor integrated circuit apparatus and an electronic apparatus having a power control function configured from power control MOS transistors in such a manner that leakage current and on resistance at the time of cut-off is sufficiently small in actual use. Semiconductor integrated circuit apparatus is comprised of a CMOS logic circuit, a second pseudo power supply line connected to a low potential side power supply terminal of the CMOS logic circuit, and a power control NchMOS transistor connected across a second pseudo power supply line and a low potential side power supply line, with the substrate and gate of power control NchMOS transistor being electrically connected. The gate and the substrate may also, for example, be connected via a current limiter utilizing, for example, a source follower of a depletion type NchMOS transistor.

Abstract: A power supply voltage control apparatus capable of freely setting a clock period setting margin according to a system clock frequency, and capable of converging power supply voltage to minimum power supply voltage where normal operation is possible in a short period of time without errors in operation of internal circuits in response to changes in the system clock frequency is provided. Power supply voltage control apparatus 100 is provided with frequency-dividing circuit 121 that frequency-divides the system clock at frequency-dividing ratio 1, frequency-dividing circuit 122 that frequency-divides the output of voltage control oscillator circuit 110 at frequency-dividing ratio 2, phase comparator/frequency comparator 130 that carries out phase comparison/frequency comparison on the respective output signals of frequency-dividing circuits 121 and 122, and controller 145.

Abstract: Semiconductor integrated circuit apparatus and electronic apparatus having a leakage current detection circuit where arbitrarily set leakage current detection ratio does not depend on power supply voltage, temperature, or manufacturing variations, and where leakage current detection is straightforward. Semiconductor integrated circuit apparatus extracts a stable potential from the center of two NchMIS transistors, amplifies drain current of an NchMOS transistor taking this potential as a gate potential to a current value of an arbitrary ratio using current mirror circuit, makes this current value flow through NchMOS transistor with the gate and drain connected, and applies drain potential of this NchMOS transistor to the gate of leakage current detection NchMOS transistor.

Abstract: An electrostatic withstand voltage test method that enables semiconductor integrated circuit testing to be performed with a high degree of precision and at low cost. In this method, with one of ground pins VSS and VSSI of a semiconductor integrated circuit 100 grounded, static electricity is applied from a static electricity discharge apparatus 102 to all pins of semiconductor integrated circuit 100, after which, with power supply apparatus 106 connected to power supply pin VDD of semiconductor integrated circuit 100 and the other grounded, a leakage current test apparatus 116 is connected to all signal pins and pin leakage current is tested, and with ground pin VSSI of the internal circuitry of semiconductor integrated circuit 100 grounded and leakage current test apparatus 104 connected to power supply pin VDDI, a pattern generator 105 that supplies a digital signal is connected to signal input pins (IN, I/O), and power supply leakage current is tested.

Abstract: Semiconductor integrated circuit apparatus capable of raising detection sensitivity of a leakage current detection circuit and improving response. A semiconductor integrated circuit apparatus has a substrate voltage control block that supplies a substrate voltage to an internal circuit and controls NchMOS transistor threshold voltage of the internal circuit, and a leakage current detection circuit constituted by a leakage current detection NchMOS transistor supplied with a high potential side supply voltage to a drain, that has a source connected to a constant current source, and that is applied with an arbitrary stabilizing potential to a gate in such a manner that the substrate voltage is controlled by the substrate voltage control block, and a comparator comparing the source potential of the leakage current detection NchMOS transistor and a predetermined reference potential.

Abstract: A developer carrying member is provided which, even in continuous copying over a long term and also even under different environmental conditions, do not cause any charge-up of toner, and prevent the toner from melt-adherent to the developer carrying member surface and developer layer thickness control member surface to maintain the state of uniform coating of a developer having a toner and to make the toner uniformly and quickly triboelectrically charged, so as to obtain high-grade images free of any image density decrease, image density non-uniformity, sleeve ghosts, fog and vertical streaks during running service. Provided are a developer carrying member having a substrate and a resin coat layer on the surface of the substrate, which resin coat layer contains at least a binder resin and a carbon black, where the graphite (002) plane obtained from X-ray diffraction of the carbon black has a lattice spacing of from 0.3370 nm or more to 0.

Abstract: An internally geared bicycle hub cover is provided to cover an end of internally geared bicycle hub. The cover has a generally cup-shaped annular housing, an inner annular seal and an outer annular seal. The generally cup-shaped annular housing includes a base portion defining a centrally located driving member opening and an outer rim portion located radially outward of the base portion with at least two radially projecting protuberances configured and arranged to engage a cover mating structure on an internally geared bicycle hub. The inner annular seal is disposed on the base portion of the annular housing about the driving member opening. The outer annular seal is disposed on the outer rim portion of the annular housing face in a substantially opposite radial direction from the radially projecting protuberances. The outer annular seal is provided on the annular housing to wedge the protuberances into a corresponding annular groove or notches on the hub transmission/shell.

Abstract: A configuration is adopted comprising an NchMOS transistor 1 equipped with an insulating isolation layer 4 providing insulation and isolation using an SOI structure, and a capacitor formed using an insulating film, with a silicon substrate B being made thin and substrate capacitance being reduced. The NchMOS transistor 1 is equipped with insulating isolation regions 5a, 5b that are perfectly depleted or partially depleted in a manner close to being perfectly depleted. An electrode 6 connected to a gate electrode G of the NchMOS transistor 1 and an impurity diffusion layer 7 are connected via a capacitor 2. A source electrode S is connected to a power supply terminal 3a, a gate electrode G is connected to an internal signal line S1, and a drain electrode D is connected to an internal signal line S2. Substrate bias voltage is then controlled using capacitor coupling when the NchMOS transistor 1 is turned on/off.

Abstract: Provided is a relative pressure control system has a simple configuration, but enables accurate regulation of a division ratio of an operation gas, and concurrently makes it possible to securely drain the operation gas from an operation gas pipeline in case of emergency. The system includes a plurality of air operated valves of a normally open type that are connected to an operation gas pipeline supplied with an operation gas; pressure sensors that are series connected to the respective air operated valves and that detect output pressures of the respective air operated valves; a controller that controls operation pressures of the respective air operated valves in accordance with the pressures detected by the pressure sensors; and a hard-interlock solenoid valve that correlates the plurality of air operated valves to one another so that at least one of the plurality of air operated valves is normally opened.