Patents by Inventor Minoru Ito

Minoru Ito has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060090681
    Abstract: A feed generating device for a sewing machine capable of selectively sewing one of a plurality of utility patterns and a plurality of super patterns including a single super feed cam generating a cloth feed for sewing the super pattern, a single or a plurality of feed contacts capable of contacting the super feed cam and a switching mechanism that moves the feed contact to a plurality of contact locations having different swing phases with respect to the super feed cam. The cloth feed for sewing the super pattern is a combination of a forward feed and a backward feed and by moving the feed contact to either one of a plurality of contact locations by the switching mechanism, cloth feed including different patterns of combination of the forward feed and the backward feed are generated.
    Type: Application
    Filed: October 27, 2005
    Publication date: May 4, 2006
    Applicant: BROTHER KOGYO KABUSHIKI KAISHA
    Inventors: Shin Ota, Minoru Ito
  • Publication number: 20060007029
    Abstract: It is an object of the present invention to enable a DC offset of a D/A converter to be removed substantially completely even when a DC offset exists in a comparator. An input switchover switch 160 is provided between complementary outputs A+, A? of a D/A converter 130 and an input of a comparator 150.
    Type: Application
    Filed: July 7, 2005
    Publication date: January 12, 2006
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Minoru Ito
  • Publication number: 20050215797
    Abstract: The present invention provides pyrazole derivatives useful as production intermediates for isoxazoline derivatives having an excellent herbicidal effect and selectivity between crops and weeds as well as processes for producing the same.
    Type: Application
    Filed: July 31, 2003
    Publication date: September 29, 2005
    Inventors: Masao Nakatani, Minoru Ito, Masahiro Miyazaki
  • Patent number: 6850087
    Abstract: A plurality of liquid crystal display cells in a test unit are driven to display a series of test image patterns. When some of the liquid crystal display cells are judged to function poorly or completely good, they are controlled to display a predetermined image pattern, so that an inspection person can stop further testing them and focus testing on other liquid crystal display cells. Where some of the other liquid crystal display cells are then judged to function poorly or completely good, they are controlled to display the same pattern as such a predetermined image pattern. Thus, since the inspector can test such liquid crystal display cells as required to check, the testing efficiency is significantly improved.
    Type: Grant
    Filed: April 9, 2003
    Date of Patent: February 1, 2005
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Minoru Ito, Nobuo Konda
  • Publication number: 20050017745
    Abstract: An electrostatic withstand voltage test method that enables semiconductor integrated circuit testing to be performed with a high degree of precision and at low cost. In this method, with one of ground pins VSS and VSSI of a semiconductor integrated circuit 100 grounded, static electricity is applied from a static electricity discharge apparatus 102 to all pins of semiconductor integrated circuit 100, after which, with power supply apparatus 106 connected to power supply pin VDD of semiconductor integrated circuit 100 and the other grounded, a leakage current test apparatus 116 is connected to all signal pins and pin leakage current is tested, and with ground pin VSSI of the internal circuitry of semiconductor integrated circuit 100 grounded and leakage current test apparatus 104 connected to power supply pin VDDI, a pattern generator 105 that supplies a digital signal is connected to signal input pins (IN, I/O), and power supply leakage current is tested.
    Type: Application
    Filed: June 25, 2004
    Publication date: January 27, 2005
    Inventor: Minoru Ito
  • Publication number: 20040259734
    Abstract: The present invention aims at providing an isoxazoline derivative and a pharmaceutically acceptable salt thereof, both having an excellent herbicidal effect and an excellent selectivity between crop and weed.
    Type: Application
    Filed: June 12, 2004
    Publication date: December 23, 2004
    Inventors: Masao Nakatani, Minoru Ito, Kyoko Kimijima, Masahiro Miyazaki, Makoto Fujinami, Ryohei Ueno, Satoru Takahashi
  • Publication number: 20040248872
    Abstract: A difluoroalkene derivative which is sufficiently effective in controlling various pests even when used in a small dose and is highly safe for crops, natural enemies to the pests, and animals; and an intermediate for the derivative. The difluoroalkene derivative is represented by the general formula: [I] wherein L1 and L2are the same or different and each represents oxygen or sulfur; n is an integer of 2 to 8; and Q represents a 5- to 12-membered heterocyclic group having any desired heteroatom selected among nitrogen, oxygen, and sulfur.
    Type: Application
    Filed: March 29, 2004
    Publication date: December 9, 2004
    Inventors: Tetsuya Abe, Ryuji Tamai, Minoru Ito, Masatoshi Tamaru, Hiroyuki Yano, Satoru Takahashi, Norimichi Muramatsu
  • Publication number: 20040140920
    Abstract: An input changeover switch 40 is provided ahead of a comparator 50 that measures the DC offset of a D/A converter 30, and a selective polarity inverter 60 is provided after comparator 50. A first compensation value is generated by a compensation value generation section 12 and stored in a register 18. Next, changeover switch 40 and polarity inverter 60 are switched and a second compensation value is generated, and is stored in a register 20. Then an average compensation value is calculated by finding the arithmetic mean of the first and second compensation values by means of an average compensation value computation circuit 22, and the input data is corrected with this average compensation value.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 22, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Minoru Ito
  • Patent number: 6686591
    Abstract: An electronic beam transmitting through a mask is detected by a detector in which a plurality of elements is aligned in a plurality of lines while an image signal is transferred by the detector synchronously with movement of the mask, and high resolution due to a short wavelength of the electronic beam can be effectively utilized as well as an image signal is transferred at right angles to a line of the detector synchronously with same time detection of pixels in a direction of the line, so that an inspection of a mask with high resolution at high speed would be achieved, and furthermore, it would be achieved to produce an image scanned in a straight line with the extremely high accuracy without zigzag scan when a stage with an easy structure is used.
    Type: Grant
    Filed: January 31, 2002
    Date of Patent: February 3, 2004
    Assignee: Holon Co., LTD
    Inventors: Minoru Ito, Norimichi Anazawa
  • Patent number: 6646471
    Abstract: A transmission side circuit and a reception side circuit are connected to each other via a signal transfer path. An output transistor of the transmission side circuit has an open drain type structure, and the reception side circuit is provided with a reception transistor that is connected to the signal transfer path. There are provided a precharge transistor for supplying a voltage to a node extending from the reception transistor to an internal circuit, and a selector circuit connected to the gate of the reception transistor. The selector circuit receives a bias voltage Vbi and a ground voltage Vss, and switches the voltage to be applied to the gate of the reception transistor between the bias voltage Vbi and the ground voltage Vss according to the mode switching signal Smd. It is possible to suppress the voltage amplitude of a signal along the signal transfer path, and thus to reduce the electromagnetic interference occurring along the signal transfer path.
    Type: Grant
    Filed: February 15, 2002
    Date of Patent: November 11, 2003
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Minoru Ito
  • Publication number: 20030193347
    Abstract: A plurality of liquid crystal display cells in a test unit are driven to display a series of test image patterns. When some of the liquid crystal display cells are judged to function poorly or completely good, they are controlled to display a predetermined image pattern, so that an inspection person can stop further testing them and focus testing on other liquid crystal display cells. Where some of the other liquid crystal display cells are then judged to function poorly or completely good, they are controlled to display the same pattern as such a predetermined image pattern. Thus, since the inspector can test such liquid crystal display cells as required to check, the testing efficiency is significantly improved.
    Type: Application
    Filed: April 9, 2003
    Publication date: October 16, 2003
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Minoru Ito, Nobuo Konda
  • Publication number: 20030151002
    Abstract: An electronic beam transmitting through a mask is detected by means of a detector in which a plurality of elements is aligned in a plurality of lines while an image signal is transferred by the detector synchronously with movement of the mask, and high resolution due to a short wavelength of the electronic beam can be effectively utilized as well as an image signal is transferred at right angles to a line of the detector synchronously with same time detection of pixels in a direction of the line, so that an inspection of a mask with high resolution at high speed would be achieved, and furthermore, it would be achieved to produce an image scanned in a straight line with the extremely high accuracy without zigzag scan when a stage with an easy structure is used.
    Type: Application
    Filed: January 31, 2002
    Publication date: August 14, 2003
    Inventors: Minoru Ito, Norimichi Anazawa
  • Patent number: 6596612
    Abstract: An object of the present invention is to provide with a method for manufacturing a semiconductor circuit by which a TFT including particles having a different threshold value is prevented from being operated even if such a TFT is locally formed. According to the present invention, after forming an amorphous silicon layer on a glass substrate, heat treatment and the like is performed to convert the amorphous silicon layer into a polycrystalline silicon layer. At this time, a particle having an abnormal grain diameter is generated in a polycrystalline silicon layer under the influence of foreign particles in a glass substrate, and a TFT having a different threshold value may be possibly formed.
    Type: Grant
    Filed: March 1, 2002
    Date of Patent: July 22, 2003
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Minoru Ito, Takafumi Nakamura, Masanori Harada
  • Publication number: 20020167338
    Abstract: A transmission side circuit and a reception side circuit are connected to each other via a signal transfer path. An output transistor of the transmission side circuit has an open drain type structure, and the reception side circuit is provided with a reception transistor that is connected to the signal transfer path. There are provided a precharge transistor for supplying a voltage to a node extending from the reception transistor to an internal circuit, and a selector circuit connected to the gate of the reception transistor. The selector circuit receives a bias voltage Vbi and a ground voltage Vss, and switches the voltage to be applied to the gate of the reception transistor between the bias voltage Vbi and the ground voltage Vss according to the mode switching signal Smd. It is possible to suppress the voltage amplitude of a signal along the signal transfer path, and thus to reduce the electromagnetic interference occurring along the signal transfer path.
    Type: Application
    Filed: February 15, 2002
    Publication date: November 14, 2002
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventor: Minoru Ito
  • Patent number: 6445452
    Abstract: A device for checking sheet packaging, whereby all the defects of packaged articles or sheets are easily and highly accurately detected based on the density or color distribution of reflection and transmission images. Defects such as deformation, discoloration, foreign matters and contamination of an article (16) packaged with a sheet and the sheet are detected by forming a density distribution code image or color code distribution image or by executing inter-image calculation based on a reflection image, a transmission image, or density or color images thereof. The upper and lower light sources are simultaneously turned on to separately form a reflection image and a transmission image from the input image in order to enhance the checking efficiency. Furthermore, a reflector (17) is disposed under a packaging sheet to enhance image contrast and to improve checking efficiency and stability. Optimum conditions for the kind and position of the reflector are clarified.
    Type: Grant
    Filed: December 16, 1999
    Date of Patent: September 3, 2002
    Assignee: Yuki Engineering System Co., Ltd.
    Inventors: Kiyoyuki Kondou, Minoru Ito
  • Publication number: 20020098665
    Abstract: An object of the present invention is to provide with a method for manufacturing a semiconductor circuit by which a TFT including particles having a different threshold value is prevented from being operated even if such a TFT is locally formed.
    Type: Application
    Filed: March 1, 2002
    Publication date: July 25, 2002
    Applicant: Kabushiki Kaisha Toshiba
    Inventors: Minoru Ito, Takafumi Nakamura, Masanori Harada
  • Patent number: 6372612
    Abstract: An object of the present invention is to provide a method for manufacturing a semiconductor circuit by which a TFT including particles having a different threshold value is prevented from being operated even if such a TFT is locally formed. According to the present invention, after forming an amorphous silicon layer on a glass substrate, heat treatment and the like is performed to convert the amorphous silicon layer into a polycrystalline silicon layer. At this time, a particle having an abnormal grain diameter is generated in a polycrystalline silicon layer under the influence of foreign particles in a glass substrate, and a TFT having a different threshold value may be formed.
    Type: Grant
    Filed: September 25, 2000
    Date of Patent: April 16, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Minoru Ito, Takafumi Nakamura, Masanori Harada
  • Patent number: 6082279
    Abstract: An electrically controlled sewing machine includes a needle bar, a needle plate, a feed dog, a feed dog vertical drive mechanism, a feed dog front/rear drive mechanism, an embroidery drive mechanism, and a feed dog retraction mechanism. The feed dog retraction mechanism includes a switching operation lever. The feed dog vertical drive mechanism includes a normal sewing drive cam and a retraction drive cam, which are switched between using the switching operation lever. The retraction drive cam drives the feed dog to rise upward by about 1 mm when the upper thread is being tightened, that is, at about 40.degree. to 90.degree. phase at the end of the thread tightening operation by the upper thread take-up lever. Because the feed dog moves upward only about 1 mm, it remains retracted below the level of the needle plate and will not interfere with movement of a workpiece cloth mounted in an embroidery frame.
    Type: Grant
    Filed: June 1, 1999
    Date of Patent: July 4, 2000
    Assignee: Brother Kogyo Kabushiki Kaisha
    Inventors: Minoru Ito, Masayoshi Aoyama, Kazuto Oya
  • Patent number: PP11466
    Abstract: A new and distinct variety of Zoysia japonica turfgrass, called `SS-500`, is characterized by its color, long and wide leaf blades, large stolons, an open growth habit, and rapid establishment rate.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: August 1, 2000
    Assignee: Sod Solutions, Inc.
    Inventors: Minoru Ito, Roberto Guerra Amaral Gurgel
  • Patent number: PP11495
    Abstract: A new and distinct variety of Zoysia japonica turfgrass, called `SS-300`, is characterized by a short, narrow leaf blade, compared to other varieties of Zoysia japonica. The growth habit is low and compact. `SS-300` has a rapid establishmentrate.
    Type: Grant
    Filed: February 24, 1998
    Date of Patent: August 29, 2000
    Assignee: Sod Solutions, Inc.
    Inventors: Minoru Ito, Roberto Guerra Amaral Gurgel