Abstract: Semiconductor integrated circuit apparatus capable of raising detection sensitivity of a leakage current detection circuit and improving response. A semiconductor integrated circuit apparatus has a substrate voltage control block that supplies a substrate voltage to an internal circuit and controls NchMOS transistor threshold voltage of the internal circuit, and a leakage current detection circuit constituted by a leakage current detection NchMOS transistor supplied with a high potential side supply voltage to a drain, that has a source connected to a constant current source, and that is applied with an arbitrary stabilizing potential to a gate in such a manner that the substrate voltage is controlled by the substrate voltage control block, and a comparator comparing the source potential of the leakage current detection NchMOS transistor and a predetermined reference potential.

Abstract: A highly corrosion-resistant, rust-prevention coating material comprising: an inorganic binder; and Zn metal particles comprised of Zn and unavoidable impurities and dispersed in the binder at the rate of 30 mass % or greater based on a dry coating film, wherein (i) the Zn metal particles include (i-1) fine-grain Zn metal particles of 0.05 to 5 ?m peak grain diameter whose grain-diameter distribution has a grain-diameter frequency distribution with a single peak and a tail on either side of the peak and (i-2) coarse-grain Zn metal particles of 6 to 100 ?m peak grain diameter whose grain-diameter distribution has a grain-diameter frequency distribution with another single peak and a tail on either side of the peak, and wherein (ii) the percentage of all Zn metal particles accounted for by Zn metal particles of 0.05 to 5 ?m grain diameter expressed in volume percentage is 5 to 99%.

Abstract: A developer bearing member is provided which can charge a toner stably and uniformly during the period from the initial stage to the terminal stage of extensive operation even in various environments. The developer bearing member includes a substrate and an electrically conductive resin coating layer formed on the surface thereof. The electrically conductive resin coating layer is formed from a resin composition containing a phenolic resin having in its structure at least one of an —NH2 group, an ?NH group and an —NH— linkage, a quaternary phosphonium salt and electrically conductive fine particles and the resin composition contains 1 part by mass or more and 60 parts by mass or less of the quaternary phosphonium salt with respect to 100 parts by mass of the phenolic resin.

Abstract: A semiconductor integrated circuit, a semiconductor integrated circuit control method, and a signal transmission circuit realizing optimization of the performance of a semiconductor integrated circuit and reduction of the power consumption. In the semiconductor integrated circuit, the semiconductor integrated circuit control method, and the signal transmission circuit, functional circuit blocks are composed of MIS transistors fabricated on an SOI structure silicon substrate and have at least one potential set including a high-potential side potential, a low-potential side potential, a substrate potential of a P-channel MIS transistor, and a substrate potential of an N-channel MIS transistor.

Abstract: A functional silane compound is provided. The functional silane compound realizes a coat film having both adhesiveness and abrasion resistance and allowing a reaction thereof to be easily controlled. The functional silane compound includes silicon with a hydrolyzable functional group formed at the end of a chain molecule and one or more urea bonds in the middle of the chain molecule.

Abstract: A manufacturing method of plastic lens includes the steps of: preparing a first liquid containing at least one metal oxide and a second liquid containing at least one organosilicon compound; manufacturing a hard coat liquid by mixing the first liquid and the second liquid so that the mass ratio of the solid content of the first liquid to the solid content of second liquid falls within a range of 45/55 to 65/35; and coating the hard coat liquid on a plastic lens substrate to form a hard coat film and then curing the hard coat film.

Abstract: A developing apparatus is provided which can suppress a fluctuation in image density in a discontinuous printing mode provided with a pause period. The developing apparatus includes a developer for developing an electrostatic latent image on a photosensitive drum, a developer bearing member for carrying and conveying the developer and a developer layer thickness-regulating unit placed close to the developer bearing member for regulating the amount of the developer carried and conveyed by the developer bearing member, the developer layer thickness-regulating unit being. As the developer, a negatively chargeable, one-component, magnetic toner is used having magnetic toner particles containing a binder resin and a magnetic iron oxide particle, and has a specific saturation magnetization, specific weight-average particle diameter and specific composition.

Abstract: A semiconductor integrated circuit apparatus and an electronic apparatus having a power control function configured from power control MOS transistors such that leakage current and on-resistance at the time of cut-off is sufficiently small in actual use. The semiconductor integrated circuit apparatus includes a CMOS logic circuit, a first pseudo power supply line connected to a high potential side power supply terminal of the CMOS logic circuit, a second pseudo power supply line connected to a low potential side power supply terminal of the CMOS logic circuit, and a power control NchMOS transistor connected across the second pseudo power supply line and a low potential side power supply line, with the substrate and gate of the power control NchMOS transistor being electrically connected. The gate and the substrate may also be connected via a current limiter utilizing a source follower of a depletion type NchMOS transistor.

Abstract: Semiconductor integrated circuit apparatus and electronic apparatus having a leakage current detection circuit where arbitrarily set leakage current detection ratio does not depend on power supply voltage, temperature, or manufacturing variations, and where leakage current detection is straightforward. Semiconductor integrated circuit apparatus extracts a stable potential from the center of two NchMIS transistors, amplifies drain current of an NchMOS transistor taking this potential as a gate potential to a current value of an arbitrary ratio using current mirror circuit, makes this current value flow through NchMOS transistor with the gate and drain connected, and applies drain potential of this NchMOS transistor to the gate of leakage current detection NchMOS transistor.

Abstract: The emergency information transmission system includes: an emergency information transmission device for transmitting emergency information varying among radio base stations; and a radio base station for transmitting the emergency information received from the emergency information transmission device to all cellular phone terminals present within its coverage in unison.

Abstract: Semiconductor integrated circuit apparatus and electronic apparatus having a leakage current detection circuit where arbitrarily set leakage current detection ratio does not depend on power supply voltage, temperature, or manufacturing variations, and where leakage current detection is straightforward. Semiconductor integrated circuit apparatus extracts a stable potential from the center of two NchMIS transistors, amplifies drain current of an NchMOS transistor taking this potential as a gate potential to a current value of an arbitrary ratio using current mirror circuit, makes this current value flow through NchMOS transistor with the gate and drain connected, and applies drain potential of this NchMOS transistor to the gate of leakage current detection NchMOS transistor.

Abstract: An internally geared bicycle hub cover is provided to cover an end of internally geared bicycle hub. The cover has a generally cup-shaped annular housing, an inner annular seal and an outer annular seal. The generally cup-shaped annular housing includes a base portion defining a centrally located driving member opening and an outer rim portion located radially outward of the base portion with at least two radially projecting protuberances configured and arranged to engage a cover mating structure on an internally geared bicycle hub. The inner annular seal is disposed on the base portion of the annular housing about the driving member opening. The outer annular seal is disposed on the outer rim portion of the annular housing face in a substantially opposite radial direction from the radially projecting protuberances. The outer annular seal is provided on the annular housing to wedge the protuberances into a corresponding annular groove or notches on the hub transmission/shell.

Abstract: A gas supply unit and a gas supply system that are small-sized and inexpensive. The gas supply unit is installed on operation gas conveyance pipeline and has fluid control devices communicated via flow path blocks and controlling operation gas. The gas supply unit has the first flow path block, to one side of which an inlet open/close valve included in the fluid control devices is attached, and also has the second flow path block, to one side of which a purge valve included in the fluid control devices is attached. The first flow path block and the second flow path block are layered in the direction perpendicular to the conveyance direction of the operation gas. The inlet open/close valve and the purge valve are arranged between a mass flow controller installed on the operation gas conveyance pipeline and an installation surface where the unit is installed.

Abstract: A power supply voltage control apparatus capable of freely setting a clock period setting margin according to a system clock frequency, and capable of converging power supply voltage to minimum power supply voltage where normal operation is possible in a short period of time without errors in operation of internal circuits in response to changes in the system clock frequency is provided. Power supply voltage control apparatus is provided with a first frequency-divider that frequency-divides the system clock at a first frequency-diving ratio, a second frequency-divider that frequency-divides an output of a voltage control oscillator at a second frequency-dividing ratio, a phase comparator/frequency comparator that carries out a phase comparison/frequency comparison on the respective output signals of the first and second frequency-dividers, and a controller.

Abstract: A power supply voltage control apparatus capable of freely setting a clock period setting margin according to a system clock frequency, and capable of converging power supply voltage to minimum power supply voltage where normal operation is possible in a short period of time without errors in operation of internal circuits in response to changes in the system clock frequency is provided. Power supply voltage control apparatus 100 is provided with frequency-dividing circuit 121 that frequency-divides the system clock at frequency-dividing ratio 1, frequency-dividing circuit 122 that frequency-divides the output of voltage control oscillator circuit 110 at frequency-dividing ratio 2, phase comparator/frequency comparator 130 that carries out phase comparison/frequency comparison on the respective output signals of frequency-dividing circuits 121 and 122, and controller 145.

Abstract: A gas flow rate verification unit capable of enhancing reliability of gas flow rate verification. The gas flow rate verification unit has a first cutoff valve that is connected to a flow rate control device and to which gas is inputted, a second cutoff valve for discharging the gas, a communication member for allowing the first cutoff valve and the second cutoff valve to communicate with each other, a pressure sensor for detecting the pressure of the gas supplied between the first cutoff valve and the second cutoff valve, a temperature detector for detecting the temperature of the gas supplied between the first cutoff valve and the second cutoff valve, and a control means for verifying the flow of the gas flowing in the flow control device, the verification being performed by using both the result of the pressure detected by the pressure sensor and the result of the temperatures detected by the temperature detector.

Abstract: A semiconductor integrated circuit, a semiconductor integrated circuit control method, and a signal transmission circuit realizing optimization of the performance of a semiconductor integrated circuit and reduction of the power consumption. In the semiconductor integrated circuit, the semiconductor integrated circuit control method, and the signal transmission circuit, functional circuit blocks (400a to 400n) are composed of MIS transistors fabricated on an SOI structure silicon substrate and have at least one potential set including a high-potential side potential, a low-potential side potential, a substrate potential of a P-channel MIS transistor, and a substrate potential of an N-channel MIS transistor.

Abstract: A configuration is adopted comprising an NchMOS transistor 1 equipped with an insulating isolation layer 4 providing insulation and isolation using an SOI structure, and a capacitor formed using an insulating film, with a silicon substrate B being made thin and substrate capacitance being reduced. The NchMOS transistor 1 is equipped with insulating isolation regions 5a, 5b that are perfectly depleted or partially depleted in a manner close to being perfectly depleted. An electrode 6 connected to a gate electrode G of the NchMOS transistor 1 and an impurity diffusion layer 7 are connected via a capacitor 2. A source electrode S is connected to a power supply terminal 3a, a gate electrode G is connected to an internal signal line S1, and a drain electrode D is connected to an internal signal line S2. Substrate bias voltage is then controlled using capacitor coupling when the NchMOS transistor 1 is turned on/off.

Abstract: A feed generating device for a sewing machine capable of selectively sewing one of a plurality of utility patterns and a plurality of super patterns including a single super feed cam generating a cloth feed for sewing the super pattern, a single or a plurality of feed contacts capable of contacting the super feed cam and a switching mechanism that moves the feed contact to a plurality of contact locations having different swing phases with respect to the super feed cam. The cloth feed for sewing the super pattern is a combination of a forward feed and a backward feed and by moving the feed contact to either one of a plurality of contact locations by the switching mechanism, cloth feed including different patterns of combination of the forward feed and the backward feed are generated.

Abstract: A configuration is adopted including an NchMOS transistor (1) equipped with an insulating isolation layer (4) providing insulation and isolation using an SOI structure, and a capacitor formed using an insulating film, with a silicon substrate (B) being made thin and substrate capacitance being reduced. The NchMOS transistor (1) is equipped with insulating isolation regions (5a, 5b) that are perfectly depleted or partially depleted in a manner close to being perfectly depleted. An electrode (6) connected to a gate electrode (G) of the NchMOS transistor (1) and an impurity diffusion layer (7) are connected via a capacitor (2). A source electrode (S) is connected to a power supply terminal (3 a), a gate electrode (G) is connected to an internal signal line (S 1), and a drain electrode (D) is connected to an internal signal line (S2). Substrate bias voltage is then controlled using capacitor coupling when the NchMOS transistor (1) is turned on/off.