Abstract: An exposure method for exposing a sensitive layer on a semiconductor wafer to an integrated-circuit pattern of a mask. The exposure is effected by a combination of a primary exposure step for exposing the sensitive layer to the pattern with a beam of high resolution and a secondary exposure step for exposing the sensitive layer with a beam of lower resolution and by an amount which does not have a substantial effect on the sensitization of the sensitive layer. By the combined exposures, the exposure time can be reduced as compared with that required in the exposure only through a high-resolution exposure.