Patents by Inventor Mitsuhiro Ichijo

Mitsuhiro Ichijo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8114760
    Abstract: A technique for manufacturing a microcrystalline semiconductor layer with high mass productivity is provided. In a reaction chamber of a plasma CVD apparatus, an upper electrode and a lower electrode are provided in almost parallel to each other. A hollow portion is formed in the upper electrode, and the upper electrode includes a shower plate having a plurality of holes formed on a surface of the upper electrode which faces the lower electrode. A substrate is provided over the lower electrode. A gas containing a deposition gas and hydrogen is supplied to the reaction chamber from the shower plate through the hollow portion of the upper electrode, and a rare gas is supplied to the reaction chamber from a portion different from the upper electrode. Accordingly, high-frequency power is supplied to the upper electrode to generate plasma, so that a microcrystalline semiconductor layer is formed over the substrate.
    Type: Grant
    Filed: October 20, 2010
    Date of Patent: February 14, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuhiro Ichijo, Kazutaka Kuriki, Tomokazu Yokoi, Toshiya Endo
  • Publication number: 20120001168
    Abstract: In a transistor including an oxide semiconductor, hydrogen in the oxide semiconductor leads to degradation of electric characteristics of the transistor. Thus, an object is to provide a semiconductor device having good electrical characteristics. An insulating layer in contact with an oxide semiconductor layer where a channel region is formed is formed by a plasma CVD method using a silicon halide. The insulating layer thus formed has a hydrogen concentration less than 6×1020 atoms/cm3 and a halogen concentration greater than or equal to 1×1020 atoms/cm3; accordingly, hydrogen diffusion into the oxide semiconductor layer can be prevented and hydrogen in the oxide semiconductor layer is inactivated or released from the oxide semiconductor layer by the halogen, whereby a semiconductor device having good electrical characteristics can be provided.
    Type: Application
    Filed: June 21, 2011
    Publication date: January 5, 2012
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuhiro ICHIJO, Toshiya ENDO, Kunihiko SUZUKI, Yasuhiko TAKEMURA
  • Publication number: 20110315969
    Abstract: In the case where a material containing an alkaline-earth metal in a cathode, is used, there is a fear of the diffusion of an impurity ion (such as alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT. Therefore, as the insulating film provided between TFT and EL element, a film containing a material for not only blocking the diffusion of an impurity ion such as an alkaline-earth metal ion but also aggressively absorbing an impurity ion such as an alkaline-earth metal ion is used.
    Type: Application
    Filed: September 6, 2011
    Publication date: December 29, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoshi MURAKAMI, Mitsuhiro ICHIJO, Taketomi ASAMI
  • Publication number: 20110309355
    Abstract: An object is to provide a semiconductor device having good electrical characteristics. A gate insulating layer having a hydrogen concentration less than 6×1020 atoms/cm3 and a fluorine concentration greater than or equal to 1×1020 atoms/cm3 is used as a gate insulating layer in contact with an oxide semiconductor layer forming a channel region, so that the amount of hydrogen released from the gate insulating layer can be reduced and diffusion of hydrogen into the oxide semiconductor layer can be prevented. Further, hydrogen present in the oxide semiconductor layer can be eliminated with the use of fluorine; thus, the hydrogen content in the oxide semiconductor layer can be reduced. Consequently, the semiconductor device having good electrical characteristics can be provided.
    Type: Application
    Filed: June 10, 2011
    Publication date: December 22, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuhiro ICHIJO, Toshiya ENDO, Kunihiko SUZUKI
  • Publication number: 20110284854
    Abstract: In a transistor having a top-gate structure in which a gate electrode layer overlaps with an oxide semiconductor layer which forms a channel region with a gate insulating layer interposed therebetween, when a large amount of hydrogen is contained in the insulating layer, hydrogen is diffused into the oxide semiconductor layer because the insulating layer is in contact with the oxide semiconductor layer; thus, electric characteristics of the transistor are degraded. An object is to provide a semiconductor device having favorable electric characteristics. An insulating layer in which the concentration of hydrogen is less than 6×1020 atoms/cm3 is used for the insulating layer being in contact with oxide semiconductor layer which forms the channel region. Using the insulating layer, diffusion of hydrogen can be prevented and a semiconductor device having favorable electric characteristics can be provided.
    Type: Application
    Filed: May 17, 2011
    Publication date: November 24, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuta ENDO, Toshinari SASAKI, Kosei NODA, Mizuho SATO, Mitsuhiro ICHIJO, Toshiya ENDO
  • Publication number: 20110284959
    Abstract: One object is to provide a semiconductor device including an oxide semiconductor, which has stable electric characteristics and high reliability. Another object is to manufacture a highly reliable semiconductor device in a high yield. In a top-gate staggered transistor including an oxide semiconductor film, as a first gate insulating film in contact with the oxide semiconductor film, a silicon oxide film is formed by a plasma CVD method with use of a deposition gas containing silicon fluoride and oxygen; and as a second gate insulating film stacked over the first gate insulating film, a silicon oxide film is formed by a plasma CVD method with use of a deposition gas containing silicon hydride and oxygen.
    Type: Application
    Filed: May 3, 2011
    Publication date: November 24, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kunio KIMURA, Mitsuhiro ICHIJO, Toshiya ENDO
  • Publication number: 20110260285
    Abstract: To provide a semiconductor substrate including a crystalline semiconductor layer which is suitable for practical use, even if a material different from that of the semiconductor layer is used for a supporting substrate, and a semiconductor device using the semiconductor substrate. The semiconductor substrate includes a bonding layer which forms a bonding plane, a barrier layer formed of an insulating material containing nitrogen, a relief layer which is formed of an insulating material that includes nitrogen at less than 20 at. % and hydrogen at 1 at. % to 20 at. %, and an insulating layer containing a halogen, between a supporting substrate and a single-crystal semiconductor layer. The semiconductor device includes the above-described structure at least partially, and a gate insulating layer formed by a microwave plasma CVD method using SiH4 and N2O as source gases is in contact with the single-crystal semiconductor layer.
    Type: Application
    Filed: July 7, 2011
    Publication date: October 27, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Mitsuhiro ICHIJO, Makoto FURUNO, Takashi OHTSUKI, Kenichi OKAZAKI, Tetsuhiro TANAKA, Seiji YASUMOTO
  • Patent number: 8022404
    Abstract: In the case where a material containing an alkaline-earth metal in a cathode, is used, there is a fear of the diffusion of an impurity ion (such as alkaline-earth metal ion) from the EL element to the TFT being generated and causing the variation of characteristics of the TFT. Therefore, as the insulating film provided between TFT and EL element, a film containing a material for not only blocking the diffusion of an impurity ion such as an alkaline-earth metal ion but also aggressively absorbing an impurity ion such as an alkaline-earth metal ion is used.
    Type: Grant
    Filed: June 16, 2008
    Date of Patent: September 20, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Murakami, Mitsuhiro Ichijo, Taketomi Asami
  • Patent number: 7989273
    Abstract: To provide a semiconductor substrate including a crystalline semiconductor layer which is suitable for practical use, even if a material different from that of the semiconductor layer is used for a supporting substrate, and a semiconductor device using the semiconductor substrate. The semiconductor substrate includes a bonding layer which forms a bonding plane, a barrier layer formed of an insulating material containing nitrogen, a relief layer which is formed of an insulating material that includes nitrogen at less than 20 at. % and hydrogen at 1 at. % to 20 at. %, and an insulating layer containing a halogen, between a supporting substrate and a single-crystal semiconductor layer. The semiconductor device includes the above-described structure at least partially, and a gate insulating layer formed by a microwave plasma CVD method using SiH4 and N2O as source gases is in contact with the single-crystal semiconductor layer.
    Type: Grant
    Filed: May 29, 2008
    Date of Patent: August 2, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Mitsuhiro Ichijo, Makoto Furuno, Takashi Ohtsuki, Kenichi Okazaki, Tetsuhiro Tanaka, Seiji Yasumoto
  • Publication number: 20110111557
    Abstract: It is an object to drive a semiconductor device at high speed or to improve the reliability of the semiconductor device. In a method for manufacturing the semiconductor device, in which a gate electrode is formed over a substrate with an insulating property, a gate insulating film is formed over the gate electrode, and an oxide semiconductor film is formed over the gate insulating film, the gate insulating film is formed by deposition treatment using high-density plasma. Accordingly, dangling bonds in the gate insulating film are reduced and the quality of the interface between the gate insulating film and the oxide semiconductor is improved.
    Type: Application
    Filed: November 3, 2010
    Publication date: May 12, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuhiro ICHIJO, Tetsuhiro TANAKA, Seiji YASUMOTO, Shun MASHIRO, Yoshiaki OIKAWA, Kenichi OKAZAKI
  • Publication number: 20110097877
    Abstract: A technique for manufacturing a microcrystalline semiconductor layer with high mass productivity is provided. In a reaction chamber of a plasma CVD apparatus, an upper electrode and a lower electrode are provided in almost parallel to each other. A hollow portion is formed in the upper electrode, and the upper electrode includes a shower plate having a plurality of holes formed on a surface of the upper electrode which faces the lower electrode. A substrate is provided over the lower electrode. A gas containing a deposition gas and hydrogen is supplied to the reaction chamber from the shower plate through the hollow portion of the upper electrode, and a rare gas is supplied to the reaction chamber from a portion different from the upper electrode. Accordingly, high-frequency power is supplied to the upper electrode to generate plasma, so that a microcrystalline semiconductor layer is formed over the substrate.
    Type: Application
    Filed: October 20, 2010
    Publication date: April 28, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuhiro ICHIJO, Kazutaka KURIKI, Tomokazu YOKOI, Toshiya ENDO
  • Publication number: 20110089425
    Abstract: A method for manufacturing an insulating film, which is used as an insulating film used for a semiconductor integrated circuit, whose reliability can be ensured even though it has small thickness, is provided. In particular, a method for manufacturing a high-quality insulating film over a substrate having an insulating surface, which can be enlarged, at low substrate temperature, is provided. A monosilane gas (SiH4), nitrous oxide (N2O), and a rare gas are introduced into a chamber to generate high-density plasma at a pressure higher than or equal to 10 Pa and lower than or equal to 30 Pa so that an insulating film is formed over a substrate having an insulating surface. After that, the supply of a monosilane gas is stopped, and nitrous oxide (N2O) and a rare gas are introduced without exposure to the air to perform plasma treatment on a surface of the insulating film.
    Type: Application
    Filed: December 16, 2010
    Publication date: April 21, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Mitsuhiro ICHIJO, Kenichi OKAZAKI, Tetsuhiro TANAKA, Takashi OHTSUKI, Seiji YASUMOTO, Shunpei YAMAZAKI
  • Publication number: 20110053358
    Abstract: An object of one embodiment of the present invention is to provide a technique for manufacturing a dense crystalline semiconductor film (e.g., a microcrystalline semiconductor film) without a cavity between crystal grains. A plasma region is formed between a first electrode and a second electrode by supplying high-frequency power of 60 MHz or less to the first electrode under a condition where a pressure of a reactive gas in a reaction chamber of a plasma CVD apparatus is set to 450 Pa to 13332 Pa, and a distance between the first electrode and the second electrode of the plasma CVD apparatus is set to 1 mm to 20 mm; crystalline deposition precursors are formed in a gas phase including the plasma region; a crystal nucleus of 5 nm to 15 nm is formed by depositing the deposition precursors; and a microcrystalline semiconductor film is formed by growing a crystal from the crystal nucleus.
    Type: Application
    Filed: August 20, 2010
    Publication date: March 3, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Satoshi TORIUMI, Ryota TAJIMA, Takashi OHTSUKI, Tetsuhiro TANAKA, Ryo TOKUMARU, Mitsuhiro ICHIJO, Kazutaka KURIKI, Tomokazu YOKOI, Toshiya ENDO, Shunpei YAMAZAKI
  • Publication number: 20110020989
    Abstract: A microcrystalline semiconductor film having a high crystallinity is formed. Further, a thin film transistor having preferable electric characteristics and high reliability and a display device including the thin film transistor are manufactured with high mass productivity. A step in which a deposition gas containing silicon or germanium is introduced at a first flow rate and a step in which the deposition gas containing silicon or germanium is introduced at a second flow rate are repeated while hydrogen is introduced at a fixed rate, so that the hydrogen and the deposition gas containing silicon or germanium are mixed, and a high-frequency power is supplied. Therefore, a microcrystalline semiconductor film is formed over a substrate.
    Type: Application
    Filed: July 16, 2010
    Publication date: January 27, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Ryota TAJIMA, Tetsuhiro TANAKA, Ryo TOKUMARU, Hidekazu MIYAIRI, Mitsuhiro ICHIJO, Taichi NOZAWA
  • Publication number: 20100327281
    Abstract: An object is to provide a thin film transistor with small off current, large on current, and high field-effect mobility. A silicon nitride layer and a silicon oxide layer which is formed by oxidizing the silicon nitride layer are stacked as a gate insulating layer, and crystals grow from an interface of the silicon oxide layer of the gate insulating layer to form a microcrystalline semiconductor layer; thus, an inverted staggered thin film transistor is manufactured. Since crystals grow from the gate insulating layer, the thin film transistor can have a high crystallinity, large on current, and high field-effect mobility. In addition, a buffer layer is provided to reduce off current.
    Type: Application
    Filed: June 22, 2010
    Publication date: December 30, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Miyako NAKAJIMA, Hidekazu MIYAIRI, Toshiyuki ISA, Erika KATO, Mitsuhiro ICHIJO, Kazutaka KURIKI, Tomokazu YOKOI
  • Patent number: 7855153
    Abstract: A method for manufacturing an insulating film, which is used as an insulating film used for a semiconductor integrated circuit, whose reliability can be ensured even though it has small thickness, is provided. In particular, a method for manufacturing a high-quality insulating film over a substrate having an insulating surface, which can be enlarged, at low substrate temperature, is provided. A monosilane gas (SiH4), nitrous oxide (N2O), and a rare gas are introduced into a chamber to generate high-density plasma at a pressure higher than or equal to 10 Pa and lower than or equal to 30 Pa so that an insulating film is formed over a substrate having an insulating surface. After that, the supply of a monosilane gas is stopped, and nitrous oxide (N2O) and a rare gas are introduced without exposure to the air to perform plasma treatment on a surface of the insulating film.
    Type: Grant
    Filed: February 3, 2009
    Date of Patent: December 21, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Mitsuhiro Ichijo, Kenichi Okazaki, Tetsuhiro Tanaka, Takashi Ohtsuki, Seiji Yasumoto, Shunpei Yamazaki
  • Publication number: 20100151664
    Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.
    Type: Application
    Filed: February 25, 2010
    Publication date: June 17, 2010
    Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi
  • Publication number: 20100124804
    Abstract: An object is to provide a method for manufacturing a thin film transistor having favorable electric characteristics, with high productivity. A gate electrode is formed over a substrate and a gate insulating layer is formed over the gate electrode. A first semiconductor layer is formed over the gate insulating layer by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a rare gas. Next, a second semiconductor layer including an amorphous semiconductor and a microcrystal semiconductor is formed in such a manner that the first semiconductor layer is partially grown as a seed crystal by generating plasma using a deposition gas containing silicon or germanium, hydrogen, and a gas containing nitrogen. Then, a semiconductor layer to which an impurity imparting one conductivity is added is formed and a conductive film is formed. Thus, a thin film transistor is manufactured.
    Type: Application
    Filed: November 12, 2009
    Publication date: May 20, 2010
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Erika TAKAHASHI, Takayuki KATO, Hidekazu MIYAIRI, Yasuhiro JINBO, Mitsuhiro ICHIJO, Tomokazu YOKOI
  • Patent number: 7670881
    Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.
    Type: Grant
    Filed: March 8, 2007
    Date of Patent: March 2, 2010
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi
  • Publication number: 20090233425
    Abstract: By an evacuation unit including first and second turbo molecular pumps connected in series, the ultimate pressure in a reaction chamber is reduced to ultra-high vacuum. By a knife-edge-type metal-seal flange, the amount of leakage in the reaction chamber is reduced. A microcrystalline semiconductor film and an amorphous semiconductor film are stacked in the same reaction chamber where the pressure is reduced to ultra-high vacuum. By forming the amorphous semiconductor film covering the surface of the microcrystalline semiconductor film, oxidation of the microcrystalline semiconductor film is prevented.
    Type: Application
    Filed: March 10, 2009
    Publication date: September 17, 2009
    Inventors: Makoto FURUNO, Tetsuo SUGIYAMA, Taichi NOZAWA, Mitsuhiro ICHIJO, Ryota TAJIMA, Shunpei YAMAZAKI