Patents by Inventor Mitsuhiro Ichijo
Mitsuhiro Ichijo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7208394Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.Type: GrantFiled: January 24, 2005Date of Patent: April 24, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi
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Patent number: 7199027Abstract: There is provided a technique for effectively removing a metallic element for promoting crystallization in a semiconductor film with a crystalline structure after the semiconductor film is obtained using the metallic element, to reduce a variation between elements. In a step of forming a gettering site, a plasma CVD method is used and a film formation is conducted using raw gas including monosilane, noble gas, and nitrogen to obtain a semiconductor film which includes the noble gas element at a high concentration, specifically, a concentration of 1×1020/cm3 to 1×1021/cm3 and has an amorphous structure, typically, an amorphous silicon film.Type: GrantFiled: July 9, 2002Date of Patent: April 3, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsuhiro Ichijo, Taketomi Asami, Noriyoshi Suzuki, Shunpei Yamazaki
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Patent number: 7169689Abstract: Contamination of an interface of respective films constituting a TFT due to an contaminant impurity in a clean room atmosphere becomes a great factor to lower the reliability of the TFT. Besides, when an impurity is added to a crystalline semiconductor film, its crystal structure is broken. By using an apparatus for manufacturing a semiconductor device including a plurality of treatment chambers, a treatment can be made without being exposed to a clean room atmosphere in an interval between respective treatment steps, and it becomes possible to keep the interface of the respective films constituting the TFT clean. Besides, by carrying out crystallization after an impurity is added to an amorphous semiconductor film, the breakdown of the crystal structure of the crystalline semiconductor film is prevented.Type: GrantFiled: February 28, 2005Date of Patent: January 30, 2007Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Taketomi Asami, Mitsuhiro Ichijo, Toru Mitsuki, Yoko Kanakubo
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Publication number: 20070004109Abstract: A technique of reducing fluctuation between elements is provided in which a semiconductor film having a crystal structure is obtained by using a metal element that accelerates crystallization of a semiconductor film and then the metal element remaining in the film is removed effectively. A barrier layer is formed on a semiconductor film having a crystal structure by plasma CVD from monosilane and nitrous oxide as material gas. In a step of forming a gettering site, a semiconductor film having an amorphous structure and containing a high concentration of noble gas element, specifically, 1×1020 to 1×1021/cm3, is formed by plasma CVD. The film is typically an amorphous silicon film. Then gettering is conducted.Type: ApplicationFiled: September 11, 2006Publication date: January 4, 2007Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsuhiro Ichijo, Taketomi Asami, Noriyoshi Suzuki
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Publication number: 20060246638Abstract: The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semiconductor device whose active region is formed from the crystalline semiconductor film and a method of manufacturing the semiconductor device are provided. In a semiconductor film containing silicon and germanium as its ingredient and having a crystal structure, the {101} plane reaches 30% or more of all the lattice planes detected by Electron backscatter diffraction.Type: ApplicationFiled: April 25, 2006Publication date: November 2, 2006Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toru Mitsuki, Kenji Kasahara, Tamae Takano, Chiho Kokubo, Shunpei Yamazaki, Takeshi Shichi
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Patent number: 7109074Abstract: A technique of reducing fluctuation between elements is provided in which a semiconductor film having a crystal structure is obtained by using a metal element that accelerates crystallization of a semiconductor film and then the metal element remaining in the film is removed effectively. A barrier layer is formed on a semiconductor film having a crystal structure by plasma CVD from monosilane and nitrous oxide as material gas. In a step of forming a gettering site, a semiconductor film having an amorphous structure and containing a high concentration of noble gas element, specifically, 1×1020 to 1×1021/cm3, is formed by plasma CVD. The film is typically an amorphous silicon film. Then gettering is conducted.Type: GrantFiled: October 19, 2004Date of Patent: September 19, 2006Assignee: Semiconductor Engery Laboratory Co., Ltd.Inventors: Mitsuhiro Ichijo, Taketomi Asami, Noriyoshi Suzuki
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Patent number: 7034337Abstract: The orientation ratio of a crystalline semiconductor film obtained by crystallizing an amorphous semiconductor film through heat treatment and irradiation of intense light such as laser light, ultraviolet rays, or infrared rays is enhanced, and a semiconductor device whose active region is formed from the crystalline semiconductor film and a method of manufacturing the semiconductor device are provided. In a semiconductor film containing silicon and germanium as its ingredient and having a crystal structure, the {101} plane reaches 30% or more of all the lattice planes detected by Electron backscatter diffraction.Type: GrantFiled: March 4, 2004Date of Patent: April 25, 2006Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtsuki, Toru Mitsuki, Kenji Kasahara, Tamae Takano, Chiho Kokubo, Shunpei Yamazaki, Takeshi Shichi
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Publication number: 20060043510Abstract: The present invention provides a method for manufacturing a highly reliable display device at a low cost with high yield. According to the present invention, a step due to an opening in a contact is covered with an insulating layer to reduce the step, and is processed into a gentle shape. A wiring or the like is formed to be in contact with the insulating layer and thus the coverage of the wiring or the like is enhanced. In addition, deterioration of a light-emitting element due to contaminants such as water can be prevented by sealing a layer including an organic material that has water permeability in a display device with a sealing material. Since the sealing material is formed in a portion of a driver circuit region in the display device, the frame margin of the display device can be narrowed.Type: ApplicationFiled: July 19, 2005Publication date: March 2, 2006Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Satoshi Murakami, Motomu Kurata, Hiroyuki Hata, Mitsuhiro Ichijo, Takashi Ohtsuki, Aya Anzai, Masayuki Sakakura
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Publication number: 20050202602Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.Type: ApplicationFiled: January 24, 2005Publication date: September 15, 2005Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi
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Publication number: 20050158922Abstract: Contamination of an interface of respective films constituting a TFT due to an contaminant impurity in a clean room atmosphere becomes a great factor to lower the reliability of the TFT. Besides, when an impurity is added to a crystalline semiconductor film, its crystal structure is broken. By using an apparatus for manufacturing a semiconductor device including a plurality of treatment chambers, a treatment can be made without being exposed to a clean room atmosphere in an interval between respective treatment steps, and it becomes possible to keep the interface of the respective films constituting the TFT clean. Besides, by carrying out crystallization after an impurity is added to an amorphous semiconductor film, the breakdown of the crystal structure of the crystalline semiconductor film is prevented.Type: ApplicationFiled: February 28, 2005Publication date: July 21, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Taketomi Asami, Mitsuhiro Ichijo, Toru Mitsuki, Yoko Kanakubo
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Publication number: 20050151132Abstract: A barrier layer that meets three requirements, “withstand well against etching and protect a semiconductor film from an etchant as an etching stopper”, “allow impurities to move in itself during heat treatment for gettering”, and “have excellent reproducibility”, is formed and used to getter impurities contained in a semiconductor film. The barrier layer is a silicon oxide film and the ratio of a sub-oxide contained in the barrier layer is 18% or higher.Type: ApplicationFiled: February 3, 2005Publication date: July 14, 2005Applicants: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Misako Nakazawa, Mitsuhiro Ichijo, Toshiji Hamatani, Hideto Ohnuma, Naoki Makita
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Publication number: 20050079656Abstract: A technique of reducing fluctuation between elements is provided in which a semiconductor film having a crystal structure is obtained by using a metal element that accelerates crystallization of a semiconductor film and then the metal element remaining in the film is removed effectively. A barrier layer is formed on a semiconductor film having a crystal structure by plasma CVD from monosilane and nitrous oxide as material gas. In a step of forming a gettering site, a semiconductor film having an amorphous structure and containing a high concentration of noble gas element, specifically, 1×1020 to 1×1021/cm3, is formed by plasma CVD. The film is typically an amorphous silicon film. Then gettering is conducted.Type: ApplicationFiled: October 19, 2004Publication date: April 14, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsuhiro Ichijo, Taketomi Asami, Noriyoshi Suzuki
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Patent number: 6875674Abstract: At present, a forming process of a base film through an amorphous silicon film is conducted in respective film forming chambers in order to obtain satisfactory films. When continuous formation of the base film through the amorphous silicon film is performed in a single film forming chamber with the above film formation condition, crystallization is not sufficiently attained in a crystallization process. By forming the amorphous silicon film using silane gas diluted with hydrogen, crystallization is sufficiently attained in the crystallization process even with the continuous formation of the base film through the amorphous silicon film in the single film forming chamber.Type: GrantFiled: July 6, 2001Date of Patent: April 5, 2005Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi
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Patent number: 6867077Abstract: A barrier layer that meets three requirements, “withstand well against etching and protect a semiconductor film from an etchant as an etching stopper”, “allow impurities to move in itself during heat treatment for gettering”, and “have excellent reproducibility”, is formed and used to getter impurities contained in a semiconductor film. The barrier layer is a silicon oxide film and the ratio of a sub-oxide contained in the barrier layer is 18% or higher.Type: GrantFiled: March 28, 2003Date of Patent: March 15, 2005Assignees: Semiconductor Energy Laboratory Co., Ltd., Sharp Kabushiki KaishaInventors: Misako Nakazawa, Mitsuhiro Ichijo, Toshiji Hamatani, Hideto Ohnuma, Naoki Makita
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Publication number: 20050032336Abstract: It is intended to achieve the reduction in number of heat treatments carried out at high temperature (at least 600° C.) and the employment of lower temperature processes (600° C. or lower), and to achieve step simplification and throughput improvement. In the present invention, a barrier layer (105), a second semiconductor film (106), and a third semiconductor layer (108) containing an impurity element (phosphorus) that imparts one conductive type are formed on a first semiconductor film (104) having a crystalline structure. Gettering is carried out in which the metal element contained in the first semiconductor film (104) is allowed to pass through the barrier layer (105) and the second semiconductor film (106) by a heat treatment to move into the third semiconductor film (107). Afterward, the second and third semiconductor films (106) and (107) are removed with the barrier layer (105) used as an etching stopper.Type: ApplicationFiled: September 15, 2004Publication date: February 10, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Osamu Nakamura, Masayuki Kajiwara, Junichi Koezuka, Koji Dairiki, Toru Mitsuki, Toru Takayama, Hideto Ohnuma, Taketomi Asami, Mitsuhiro Ichijo
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Publication number: 20050026320Abstract: The present invention is provided in order to remove contamination due to contaminant impurities of the interfaces of each film which forms a TFT, which is the major factor that reduces the reliability of TFTs. By connecting a washing chamber and a film formation chamber, film formation can be carried out without exposing TFTs to the air during the time from washing step to the film formation step and it becomes possible to maintain the cleanliness of the interfaces of each film which form the TFT.Type: ApplicationFiled: August 30, 2004Publication date: February 3, 2005Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Taketomi Asami, Mitsuhiro Ichijo, Satoshi Toriumi, Takashi Ohtskuki, Shunpei Yamazaki
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Publication number: 20050020037Abstract: A semiconductor film having a crystalline structure is formed by using a metal element that assists the crystallization of the semiconductor film, and the metal element remaining in the film is effectively removed to decrease the dispersion among the elements. The semiconductor film or, typically, an amorphous silicon film having an amorphous structure is obtained based on the plasma CVD method as a step of forming a gettering site, by using a monosilane, a rare gas element and hydrogen as starting gases, the film containing the rare gas element at a high concentration or, concretely, at a concentration of 1×1020/cm3 to 1×1021/cm3 and containing fluorine at a concentration of 1×1015/cm3 to 1×1017/cm3.Type: ApplicationFiled: April 30, 2004Publication date: January 27, 2005Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Taketomi Asami, Mitsuhiro Ichijo, Noriyoshi Suzuki, Hideto Ohnuma, Masato Yonezawa
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Patent number: 6821828Abstract: A technique of reducing fluctuation between elements is provided in which a semiconductor film having a crystal structure is obtained by using a metal element that accelerates crystallization of a semiconductor film and then the metal element remaining in the film is removed effectively. A barrier layer is formed on a semiconductor film having a crystal structure by plasma CVD from monosilane and nitrous oxide as material gas. In a step of forming a gettering site, a semiconductor film having an amorphous structure and containing a high concentration of noble gas element, specifically, 1×1020 to 1×1021 /cm3, is formed by plasma CVD. The film is typically an amorphous silicon film. Then gettering is conducted.Type: GrantFiled: September 24, 2002Date of Patent: November 23, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsuhiro Ichijo, Taketomi Asami, Noriyoshi Suzuki
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Publication number: 20040224486Abstract: There is provided a technique for effectively removing a metallic element for promoting crystallization in a semiconductor film with a crystalline structure after the semiconductor film is obtained using the metallic element, to reduce a variation between elements. In a step of forming a gettering site, a plasma CVD method is used and a film formation is conducted using raw gas including monosilane, noble gas, and nitrogen to obtain a semiconductor film which includes the noble gas element at a high concentration, specifically, a concentration of 1×1020/cm3 to 1×1021/cm3 and has an amorphous structure, typically, an amorphous silicon film.Type: ApplicationFiled: July 9, 2002Publication date: November 11, 2004Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.Inventors: Mitsuhiro Ichijo, Taketomi Asami, Noriyoshi Suzuki, Shunpei Yamazaki
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Patent number: 6808968Abstract: It is intended to achieve the reduction in number of heat treatments carried out at high temperature (at least 600° C.) and the employment of lower temperature processes (600° C. or lower), and to achieve step simplification and throughput improvement. In the present invention, a barrier layer (105), a second semiconductor film (106), and a third semiconductor layer (108) containing an impurity element (phosphorus) that imparts one conductive type are formed on a first semiconductor film (104) having a crystalline structure. Gettering is carried out in which the metal element contained in the first semiconductor film (104) is allowed to pass through the barrier layer (105) and the second semiconductor film (106) by a heat treatment to move into the third semiconductor film (107). Afterward, the second and third semiconductor films (106) and (107) are removed with the barrier layer (105) used as an etching stopper.Type: GrantFiled: February 14, 2002Date of Patent: October 26, 2004Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Osamu Nakamura, Masayuki Kajiwara, Junichi Koezuka, Koji Dairiki, Toru Mitsuki, Toru Takayama, Hideto Ohnuma, Taketomi Asami, Mitsuhiro Ichijo