Patents by Inventor Mitsutaka Sato

Mitsutaka Sato has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Process for manufacturing a semiconductor device affixed to an upper and a lower leadframe
    Patent number: 5409866
    Abstract: A process for manufacturing semiconductor device including a semiconductor chip having top and bottom surfaces, upper leads electrically coupled to the semiconductor chip, where a first gap is formed between the upper leads and the top surface of the semiconductor chip, lower leads electrically coupled to the semiconductor chip, where a second gap is formed between the lower leads and the bottom surface of the semiconductor chip, and an encapsulating resin which encapsulates the semiconductor chip so as to maintain the first and second gaps.
    Type: Grant
    Filed: December 24, 1992
    Date of Patent: April 25, 1995
    Assignees: Fujitsu Ltd., Kyushu Fujitsu Electronics Ltd.
    Inventors: Mitsutaka Sato, Junichi Kasai, Masanori Yoshimoto, Kouichi Takeshita