Patents by Inventor Mitsuyoshi Mori
Mitsuyoshi Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7816752Abstract: In a solid state imaging device which includes a photodiode in the upper part of a silicon substrate and a MOSFET active region separated from the photodiode by a device isolation region, the width of the device isolation region is smaller in its lower part than in its upper part.Type: GrantFiled: May 19, 2006Date of Patent: October 19, 2010Assignee: Panasonic CorporationInventor: Mitsuyoshi Mori
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Patent number: 7800144Abstract: A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.Type: GrantFiled: September 18, 2008Date of Patent: September 21, 2010Assignee: Panasonic CorporationInventors: Mitsuyoshi Mori, Mikiya Uchida, Kazuo Fujiwara, Takumi Yamaguchi
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Publication number: 20100220228Abstract: A solid-state image sensor includes: a semiconductor substrate 22; a plurality of pixels 23 arranged on the semiconductor substrate 22 and respectively including photoelectric conversion regions 24; and an isolation region 25 electrically isolating the pixels 23 from one another. The first pixel 31 includes a first photoelectric conversion region 32 and a first color filter 41 having a peak of its optical transmission in a first wavelength range. The second pixel 34 adjacent to the first pixel 31 includes a second photoelectric conversion region 35 and a second color filter 42 having peaks in its optical transmission in the first wavelength range and a second wavelength range including shorter wavelengths than the first wavelength range. A portion 33 of a deep portion of the first photoelectric conversion region 32 extends across the isolation region 25 to reach a portion under the second photoelectric conversion region 35.Type: ApplicationFiled: June 2, 2009Publication date: September 2, 2010Inventors: Yusuke Otake, Mitsuyoshi Mori, Shinzou Kouyama, Toru Okino
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Patent number: 7750366Abstract: A solid-state imaging element includes a layered substrate made of silicon and composed of, for example, an N-type substrate, a P-type layer, and an N-type layer. In the layered substrate, an imaging region in which a plurality of pixels are arranged and a peripheral circuit region are formed. A recess reaching the reverse face of the P-type layer is formed in a reverse face portion of the layered substrate in the imaging region, and a reflective film is formed on at least the inner face of the recess. Light is reflected on the reverse face and the obverse face of the layered substrate.Type: GrantFiled: July 28, 2008Date of Patent: July 6, 2010Assignee: Panasonic CorporationInventors: Toru Okino, Mitsuyoshi Mori
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Publication number: 20100133592Abstract: A plurality of pixel portions (12) are formed on a silicon substrate (11). A photoelectric converter portion (10) constituting each of the pixel portions (12) is electrically isolated by an element isolation portion (13) comprising an insulating film formed on the silicon substrate (11). The photoelectric converter portion (10) partitioned by the element isolation portion (13) is so formed that a crystal orientation of the sides in contact with the element isolation portion (13) corresponds to a <00-1> direction. This makes it possible to reduce dark current caused by stress in the vicinity of the interface of the element isolation portion (13) and maintain high sensitivity even if the pixel portions (12) are made smaller in size.Type: ApplicationFiled: June 24, 2008Publication date: June 3, 2010Applicant: PANASONIC CORPORATIONInventors: Mitsuyoshi Mori, Yasuhiro Shimada, Kenji Taniguchi, Masayuki Furuhashi
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Patent number: 7696592Abstract: A solid state imaging apparatus includes a plurality of photoelectric conversion sections formed in an imaging area of a silicon substrate, and an embedded layer embedded in an isolation trench formed in at least one part of the silicon substrate located around the photoelectric conversion sections. The embedded layer is made of an isolation material having a thermal expansion coefficient larger than silicon oxide and equal to or smaller than silicon.Type: GrantFiled: June 28, 2005Date of Patent: April 13, 2010Assignee: Panasonic CorporationInventors: Mitsuyoshi Mori, Daisuke Ueda
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Patent number: 7638853Abstract: A solid state imaging device includes: an imaging region formed in an upper part of a substrate made of silicon to have a photoelectric conversion portion, a charge accumulation region of the photoelectric conversion portion being of a first conductivity type; a device isolation region formed in at least a part of the substrate to surround the photoelectric conversion portion; and a MOS transistor formed on a part of the imaging region electrically isolated from the photoelectric conversion region by the device isolation region. The width of the device isolation region is smaller in its lower part than in its upper part, and the solid state imaging device further includes a dark current suppression region surrounding the device isolation region and being of a second conductivity type opposite to the first conductivity type.Type: GrantFiled: July 17, 2007Date of Patent: December 29, 2009Assignee: Panasonic CorporationInventors: Mitsuyoshi Mori, Takumi Yamaguchi, Toru Okino
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Patent number: 7569906Abstract: A first semiconductor chip includes a fixed electrode formed on a first semiconductor substrate and a plurality of first metal spacers formed on a first interlayer dielectric. A second semiconductor chip includes a vibrating electrode formed on a second semiconductor substrate and a plurality of second metal spacers formed on a second interlayer dielectric. The first and second semiconductor chips are metallically bonded to each other using the first and second metal spacers. An air gap is formed in a region of the condenser microphone located between the first semiconductor chip and the second semiconductor chip except bonded regions of the first and second metal spacers.Type: GrantFiled: February 6, 2007Date of Patent: August 4, 2009Assignee: Panasonic CorporationInventors: Mitsuyoshi Mori, Keisuke Tanaka, Takumi Yamaguchi, Takuma Katayama
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Publication number: 20090039387Abstract: A solid-state imaging element includes a layered substrate made of silicon and composed of, for example, an N-type substrate, a P-type layer, and an N-type layer. In the layered substrate, an imaging region in which a plurality of pixels are arranged and a peripheral circuit region are formed. A recess reaching the reverse face of the P-type layer is formed in a reverse face portion of the layered substrate in the imaging region, and a reflective film is formed on at least the inner face of the recess. Light is reflected on the reverse face and the obverse face of the layered substrate.Type: ApplicationFiled: July 28, 2008Publication date: February 12, 2009Inventors: Toru Okino, Mitsuyoshi Mori
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Publication number: 20090021626Abstract: A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.Type: ApplicationFiled: September 18, 2008Publication date: January 22, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Mitsuyoshi MORI, Mikiya Uchida, Kazuo Fujiwara, Takumi Yamaguchi
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Publication number: 20090014759Abstract: A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.Type: ApplicationFiled: September 18, 2008Publication date: January 15, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Mitsuyoshi MORI, Mikiya Uchida, Kazuo Fujiwara, Takumi Yamaguchi
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Publication number: 20090002538Abstract: A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion cell via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plurality of read-out lines each being selectively connected to at least two of the transfer transistors; and a plurality of pixel amplifier transistors each detecting and outputting the potential of each said the floating diffusion section. Charges of the photoelectric conversion sections each being connected to one of the read-out lines and being read out by the transfer transistors are read out by different floating diffusion sections.Type: ApplicationFiled: September 2, 2008Publication date: January 1, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Mitsuyoshi MORI, Takumi Yamaguchi, Takahiko Murata
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Publication number: 20080303058Abstract: A solid state imaging device includes a pixel having a photoelectric conversion element formed on a semiconductor substrate. The photoelectric conversion element includes: a first semiconductor layer of a first conductivity type; a second semiconductor layer of a second conductivity type formed on the first semiconductor layer and forming a junction therebetween; a third semiconductor layer formed on the second semiconductor layer and having a smaller band gap energy than the second semiconductor layer, the third semiconductor layer being made of a single-crystal semiconductor and containing an impurity; and a fourth semiconductor layer of the first conductivity type covering a side surface and an upper surface of the third semiconductor layer. Provision of the fourth semiconductor layer can reduce a current flowing in dark conditions.Type: ApplicationFiled: February 21, 2008Publication date: December 11, 2008Inventors: Mitsuyoshi MORI, Toru OKINO, Daisuke UEDA, Toshinobu MATSUNO
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Publication number: 20080284882Abstract: A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion cell via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plurality of read-out lines each being selectively connected to at least two of the transfer transistors; and a plurality of pixel amplifier transistors each detecting and outputting the potential of each said the floating diffusion section. Charges of the photoelectric conversion sections each being connected to one of the read-out lines and being read out by the transfer transistors are read out by different floating diffusion sections.Type: ApplicationFiled: July 23, 2008Publication date: November 20, 2008Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Mitsuyoshi MORI, Takumi YAMAGUCHI, Takahiko MURATA
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Patent number: 7436010Abstract: A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plurality of read-out lines each being selectively connected to at least two of the transfer transistors; and a plurality of pixel amplifier transistors each detecting and outputting the potential of each said the floating diffusion section. Charges of the photoelectric conversion sections each being connected to one of the read-out lines and being read out by the transfer transistors are read out by different floating diffusion sections.Type: GrantFiled: November 14, 2003Date of Patent: October 14, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Mitsuyoshi Mori, Takumi Yamaguchi, Takahiko Murata
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Patent number: 7436012Abstract: A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.Type: GrantFiled: January 20, 2006Date of Patent: October 14, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Mitsuyoshi Mori, Mikiya Uchida, Kazuo Fujiwara, Takumi Yamaguchi
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Publication number: 20080105906Abstract: A solid state imaging apparatus includes a plurality of photoelectric conversion sections formed in an imaging area of a silicon substrate, and an embedded layer embedded in an isolation trench formed in at least one part of the silicon substrate located around the photoelectric conversion sections. The embedded layer is made of an isolation material having a thermal expansion coefficient larger than silicon oxide and equal to or smaller than silicon.Type: ApplicationFiled: June 28, 2005Publication date: May 8, 2008Inventors: Mitsuyoshi Mori, Daisuke Ueda
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Patent number: 7355641Abstract: A solid-state imaging device includes: an imaging portion in which a plurality of pixels for photoelectrically converting incident light are arranged so as to form a plural kinds of pixel lines having different color arrangements; a memory in which pixel signals obtained from the pixels of at least one line in the imaging portion are stored; an output signal line into which the pixel signals stored in the memory are read out; and an output portion from which signals of the output signal line are output. Pixel signals obtained from non-adjacent pixels of a first color in one line are read out into the output signal lines sequentially, and then pixel signals obtained from non-adjacent pixels of a second color are read out into the output signal lines sequentially. Pixel signals of the same color are output sequentially, so that it is not necessary to operate color selection switch for every pixel signals at high speed. Furthermore, it is possible to suppress the mixing of adjacent colors.Type: GrantFiled: January 8, 2004Date of Patent: April 8, 2008Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Takumi Yamaguchi, Shigetaka Kasuga, Mitsuyoshi Mori
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Publication number: 20080029796Abstract: A solid state imaging device includes: an imaging region formed in an upper part of a substrate made of silicon to have a photoelectric conversion portion, a charge accumulation region of the photoelectric conversion portion being of a first conductivity type; a device isolation region formed in at least a part of the substrate to surround the photoelectric conversion portion; and a MOS transistor formed on a part of the imaging region electrically isolated from the photoelectric conversion region by the device isolation region. The width of the device isolation region is smaller in its lower part than in its upper part, and the solid state imaging device further includes a dark current suppression region surrounding the device isolation region and being of a second conductivity type opposite to the first conductivity type.Type: ApplicationFiled: July 17, 2007Publication date: February 7, 2008Inventors: Mitsuyoshi Mori, Takumi Yamaguchi, Toru Okino
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Publication number: 20070272992Abstract: A first semiconductor chip includes a fixed electrode formed on a first semiconductor substrate and a plurality of first metal spacers formed on a first interlayer dielectric. A second semiconductor chip includes a vibrating electrode formed on a second semiconductor substrate and a plurality of second metal spacers formed on a second interlayer dielectric. The first and second semiconductor chips are metallically bonded to each other using the first and second metal spacers. An air gap is formed in a region of the condenser microphone located between the first semiconductor chip and the second semiconductor chip except bonded regions of the first and second metal spacers.Type: ApplicationFiled: February 6, 2007Publication date: November 29, 2007Inventors: Mitsuyoshi Mori, Keisuke Tanaka, Takumi Yamaguchi, Takuma Katayama