Patents by Inventor Mitsuyoshi Mori

Mitsuyoshi Mori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20070230722
    Abstract: An electret condenser microphone (ECM) forms an air-gap capacitor structure in which an upper electrode and a lower electrode are opposed to each other with its hollow portion interposed therebetween, and an electret film made of a charge retention material is formed between the electrodes. The ECM is formed continuously with a semiconductor substrate, and the electret film is made of an amorphous perfluoropolymeric resin. The electret film made of such a material can be formed on the substrate by spin coating. This facilitates reducing the thickness of the electret film. In addition, the film can be easily etched by a fluorine based gas used in a semiconductor process. This permits fine patterning, resulting in the reduced area of a condenser.
    Type: Application
    Filed: January 9, 2007
    Publication date: October 4, 2007
    Inventors: Mitsuyoshi Mori, Daisuke Ueda
  • Publication number: 20070128758
    Abstract: A semiconductor device has, on a single substrate, a semiconductor circuit portion and a hollow capacitor portion including a pair of counter electrodes and a hollow part located between the counter electrodes. The hollow part of the hollow capacitor portion is surrounded by an insulating film, and a through hole is formed in the insulating film to communicate with the hollow part. The top surface of the insulating film covering the hollow part is planarized. Part of the insulating film located to the lateral sides of the hollow part supports the other part thereof located on the hollow part and upper one of the counter electrodes.
    Type: Application
    Filed: November 29, 2006
    Publication date: June 7, 2007
    Inventors: Keisuke Tanaka, Mitsuyoshi Mori, Takumi Yamaguchi
  • Patent number: 7199411
    Abstract: A solid-state imaging device is formed on a silicon substrate for providing a MOS type solid-state imaging device which has a device isolation structure and causes a small amount of leak current. The solid-state imaging device includes, for each pixel, an imaging region which includes a photodiode having a charge accumulation region of a first conductivity type, a transistor and a device isolation region whose depth is less than a depth of the charge accumulation region of the first conductivity type, at which an impurity density is at maximum.
    Type: Grant
    Filed: September 1, 2004
    Date of Patent: April 3, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinji Yoshida, Mitsuyoshi Mori, Takumi Yamaguchi
  • Publication number: 20070020795
    Abstract: In a method for manufacturing a solid-state imaging device of the present invention, a pad insulting film 2 made of an oxide film and an anti-oxidizing film 3 made of a nitride film are deposited on a n-type semiconductor substrate 1. Then, an opening 4 is formed to expose an element isolation formation region of the semiconductor substrate 1. Next, an anti-oxidizing film (not shown) for burying the opening 4 is formed on the substrate and anisotropic etching is performed to form a sidewall 5. Subsequently, a trench 6 is formed using the anti-oxidizing film 3 and the sidewall 5 as a mask. Then, a p-type impurity is implanted into a part of the semiconductor substrate 1 which is exposed at the side face of the trench 6 and a thermal oxide film is formed in the surface portion of the trench 6 in the semiconductor substrate 1. Thereafter, the trench 6 is buried with a burying film 8.
    Type: Application
    Filed: January 7, 2005
    Publication date: January 25, 2007
    Inventors: Mitsuyoshi Mori, Takumi Yamaguchi, Shinji Yoshida
  • Publication number: 20070012968
    Abstract: A solid-state imaging device is formed on a silicon substrate for providing a MOS type solid-state imaging device which has a device isolation structure and causes a small amount of leak current. The solid-state imaging device includes, for each pixel, an imaging region which includes a photodiode having a charge accumulation region of a first conductivity type, a transistor and a device isolation region whose depth is less than a depth of the charge accumulation region of the first conductivity type, at which an impurity density is at maximum.
    Type: Application
    Filed: September 20, 2006
    Publication date: January 18, 2007
    Inventors: Shinji Yoshida, Mitsuyoshi Mori, Takumi Yamaguchi
  • Publication number: 20060273359
    Abstract: In a solid state imaging device which includes a photodiode in the upper part of a silicon substrate and a MOSFET active region separated from the photodiode by a device isolation region, the width of the device isolation region is smaller in its lower part than in its upper part.
    Type: Application
    Filed: May 19, 2006
    Publication date: December 7, 2006
    Inventor: Mitsuyoshi Mori
  • Publication number: 20060163628
    Abstract: A semiconductor device of the present invention includes a substrate; an imaging region which is formed at part of the substrate and in which photoelectric conversion cells including photoelectric conversion sections are arranged in the form of an array; a control-circuit region which is formed at part of the substrate and in which the imaging region is controlled and a signal from the imaging region is outputted; and a copper-containing interconnect layer formed above the substrate and made of a material containing copper. Furthermore, a first anti-diffusion layer and a second anti-diffusion layer are formed, as anti-diffusion layers for preventing the copper from diffusing into each photoelectric conversion section, on the photoelectric conversion section and the copper-containing interconnect layer, respectively.
    Type: Application
    Filed: January 20, 2006
    Publication date: July 27, 2006
    Inventors: Mitsuyoshi Mori, Mikiya Uchida, Kazuo Fujiwara, Takumi Yamaguchi
  • Publication number: 20050045925
    Abstract: The present invention is a solid-state imaging device formed on a silicon substrate 1 for providing a MOS type solid-state imaging device which has a device isolation structure and causes a small amount of leak current. The solid-state imaging device comprises, for each pixel, an imaging region which includes a photodiode having a charge accumulation region of the first conductivity type, a transistor and a device isolation region whose depth is less than the depth of the charge accumulation region of the first conductivity type, at which the impurity density is at maximum.
    Type: Application
    Filed: September 1, 2004
    Publication date: March 3, 2005
    Inventors: Shinji Yoshida, Mitsuyoshi Mori, Takumi Yamaguchi
  • Publication number: 20040252215
    Abstract: A read-out pulse line for supplying a signal for switching is provided in common for transfer gates provided for each of ones of photoelectric diode (PD) sections located in a pair of adjacent rows. The transfer gates are switched by the read-out pulse line, charges of the ones of PD sections are transferred to different floating diffusion (FD) sections, and created charges are detected by each pixel amplifier provided so as to correspond to each of the FD sections. Thus, pixel signals of a pair of rows can be obtained simultaneously on output signal lines.
    Type: Application
    Filed: May 28, 2004
    Publication date: December 16, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventor: Mitsuyoshi Mori
  • Publication number: 20040159861
    Abstract: A solid state imaging apparatus includes: a plurality of photoelectric conversion cells each including a plurality of photoelectric sections arranged in an array of at least two rows and two columns; a plurality of floating diffusion sections each being connected to each of ones of the photoelectric sections which are included in the same row of each said photoelectric conversion via each of a plurality of transfer transistors, and being shared by said ones of the photoelectric sections; a plurality of read-out lines each being selectively connected to at least two of the transfer transistors; and a plurality of pixel amplifier transistors each detecting and outputting the potential of each said the floating diffusion section. Charges of the photoelectric conversion sections each being connected to one of the read-out lines and being read out by the transfer transistors are read out by different floating diffusion sections.
    Type: Application
    Filed: November 14, 2003
    Publication date: August 19, 2004
    Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.
    Inventors: Mitsuyoshi Mori, Takumi Yamaguchi, Takahiko Murata
  • Publication number: 20040141073
    Abstract: A solid-state imaging device includes: an imaging portion in which a plurality of pixels for photoelectrically converting incident light are arranged so as to form a plural kinds of pixel lines having different color arrangements; a memory in which pixel signals obtained from the pixels of at least one line in the imaging portion are stored; an output signal line into which the pixel signals stored in the memory are read out; and an output portion from which signals of the output signal line are output. Pixel signals obtained from non-adjacent pixels of a first color in one line are read out into the output signal lines sequentially, and then pixel signals obtained from non-adjacent pixels of a second color are read out into the output signal lines sequentially. Pixel signals of the same color are output sequentially, so that it is not necessary to operate color selection switch for every pixel signals at high speed. Furthermore, it is possible to suppress the mixing of adjacent colors.
    Type: Application
    Filed: January 8, 2004
    Publication date: July 22, 2004
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Takumi Yamaguchi, Shigetaka Kasuga, Mitsuyoshi Mori
  • Patent number: 4951795
    Abstract: A modulation valve device comprising an inlet passage, an outlet passage selectively connected to one of a plurality of hydraulic clutches through a selector valve, an operation chamber to which the inlet and outlet passages connect, a plunger to be moved in accordance with a pressure in the operation chamber, an accumulator controllably connected to the outlet passage through a passage whose opening degree is controlled by the plunger, and a variable orifice mechanism associated to the inlet passage. The variable orifice mechanism includes a plurality of orifices which have different flow resistances and are adapted to form a part of the inlet passage, respectively. A control mechanism is provided for selecting the orifice forming a part of the inlet passage among a plurality of the orifices in accordance with the selected clutch.
    Type: Grant
    Filed: September 2, 1988
    Date of Patent: August 28, 1990
    Assignee: Kabushiki Kaisha Daikin Seisakusho
    Inventor: Mitsuyoshi Mori
  • Patent number: 4905471
    Abstract: A great number of blades are disposed in a shell inside with appropriate distances left between them in a circumferential direction of a shell. Each blade has an approximately fan-shaped blade body and a flange protruding from an inner peripheral edge in a prescribed direction along a circumference of a shell. An outer peripheral edge of each blade is secured to the shell. The flange of each blade is made contact with a neighboring blade over the entire circumferential length of the blade, and these contacting portions are secured each other in a watertight manner. A core ring is not installed.
    Type: Grant
    Filed: June 20, 1988
    Date of Patent: March 6, 1990
    Assignee: Kabushiki Kaisha Daikin Seisakusho
    Inventor: Mitsuyoshi Mori
  • Patent number: 4584891
    Abstract: A power train for a power shift transmission, wherein a first input shaft and a first output on the same axis engaged and disengaged through a forward driving first speed clutch and a second input shaft and a second output shaft on the same axis engaged and disengaged through a forward driving second speed clutch are disposed in parallel with a driving shaft on an engine side; a driving shaft is interconnected through transmission gears to the second input shaft and at the same time the second output shaft are interconnected to the driven shaft side such as an axle etc., both the input shafts are interconnected through a forward driving first speed first reduction gear set, and both the output shafts are interconnected through a forward driving first speed second reduction gear set.
    Type: Grant
    Filed: October 14, 1983
    Date of Patent: April 29, 1986
    Assignee: Kabushiki Kaisha Daikin Seisakusho
    Inventor: Mitsuyoshi Mori
  • Patent number: 4405337
    Abstract: Disclosed is a fuel for a diesel engine which comprises a mixture of (A) an alcohol, (B) gas oil and (C) castor oil, wherein the contents of the respective components satisfy requirements represented by the following formulae:0% by volume <A.ltoreq.80% by volume,10% by volume .ltoreq.B<50% by volume, and10% by volume .ltoreq.C<50% by volume.
    Type: Grant
    Filed: May 17, 1982
    Date of Patent: September 20, 1983
    Assignee: Yanmar Diesel Engine Co., Ltd.
    Inventor: Mitsuyoshi Mori