Abstract: In one embodiment, the present invention includes a processor that has an on-die storage such as a static random access memory to store an architectural state of one or more threads that are swapped out of architectural state storage of the processor on entry to a system management mode (SMM). In this way communication of this state information to a system management memory can be avoided, reducing latency associated with entry into SMM. Embodiments may also enable the processor to update a status of executing agents that are either in a long instruction flow or in a system management interrupt (SMI) blocked state, in order to provide an indication to agents inside the SMM. Other embodiments are described and claimed.

Abstract: An apparatus for pooling memory resources across multiple nodes is described herein. The apparatus includes a shared memory controller, wherein each node of the multiple nodes is connected to the shared memory controller. The apparatus also includes a pool of memory connected to the shared memory controller, wherein a portion of the pool of memory is allocated to each node of the multiple nodes.

Abstract: Provided are a method, apparatus, and a system in which an initiator node is configured to communicate with a target node that is coupled to a memory. At system initialization time, a memory address map of the initiator node is generated to include addresses corresponding to the memory to which the target node is coupled. The initiator node accesses the memory coupled to the target node, by using the memory address map of the initiator node.

Abstract: A selectively upgradeable disaggregated server is generally described herein. An example modular server unit, the modular server unit includes a processor module coupled to an input/output (I/O) module via a connector. The processor module to communicate with the I/O module via the connector to store and retrieve data. The processor module is a separate hardware unit from the I/O module.

Abstract: A mechanism for PCIe cable topology discovery in a Rack Scale Architecture (RSA) and associated methods, apparatus, and systems. Pooled system drawers installed in rack are interconnected via multiple PCIe cables coupled to PCIe ports on the pooled system drawers. The PCIe ports are associated with host ports connections between server nodes and host ports in respective pooled system drawers are automatically detected, with corresponding PCIe connection information being automatically generated and aggregated to determine the PCIe cable topology for the rack. In one aspect, PCIe devices are emulated for each host port in a pooled storage drawer including pooled PCIe storage devices. Server nodes in a pooled compute drawer send PCIe configuration messages over the PCIe cables, with returned reply messages generated by the emulated PCIe devices identifying the host ports. Information pertaining to the host ports, pooled system drawers, and server nodes is used to determine the PCIe cable topology.

Abstract: Mechanisms for disaggregated storage class memory over fabric and associated methods, apparatus, and systems. A rack is populated with pooled system drawers including pooled compute drawers and pooled storage class memory (SCM) drawers, also referred to as SCM nodes. Optionally, a pooled memory drawer may include a plurality of SCM nodes. Each SCM node provides access to multiple storage class memory devices. Compute nodes including one or more processors and local storage class memory devices are installed in the pooled compute drawers, and are enabled to be selectively-coupled to access remote storage class memory devices over a low-latency fabric. During a memory access from an initiator node (e.g., a compute node) to a target node including attached disaggregated memory (e.g., an SCM node), a fabric node identifier (ID) corresponding to the target node is identified, and an access request is forwarded to that target node over the low-latency fabric.

Abstract: In one embodiment, a processor includes a core having a fetch unit to fetch instructions, a decode unit to decode the instructions, and one or more execution units to execute the instructions. The core may further include: a first pair of block address range registers to store a start location and an end location of a block range within a non-volatile block storage coupled to the processor; and a block status storage to store an error indicator responsive to an occurrence of an error within the block range during a block operation. Other embodiments are described and claimed.

Abstract: Examples may include a basic input/output system (BIOS) for a computing platform communicating with a controller for a non-volatile dual in-line memory module (NVDIMM). Communication between the BIOS and the controller may include a request for the controller to scan and identify error locations in non-volatile memory at the NVDIMM. The non-volatile memory may be capable of providing persistent memory for the NVDIMM.

Abstract: A method is described. The method includes recognizing different latencies and/or bandwidths between different levels of a system memory and different memory access requestors of a computing system. The system memory includes the different levels and different technologies. The method also includes allocating each of the memory access requestors with a respective region of the system memory having an appropriate latency and/or bandwidth.

Abstract: Embodiments are generally directed to high capacity energy backed memory with off device storage. A memory device includes a circuit board; multiple memory chips that are installed on the circuit board; a controller to provide for backing up contents of the memory chips when a power loss condition is detected; a connection to a backup energy source; and a connection to a backup data storage that is separate from the memory device.

Abstract: Mechanisms for efficient discovery of storage resources in a Rack Scale Architecture (RSA) system and associated methods, apparatus, and systems. A rack is populated with pooled system drawers including pooled compute drawers and pooled storage drawers communicatively coupled via input-output (IO) cables. Compute nodes including one or more processors, memory resources, and optional local storage resources are installed in the pooled compute drawers, and are enabled to be selectively-coupled to storage resources in the pooled storage drawers over virtual attachment links. During a discovery process, a compute node determines storage resource characteristics of storage resources it may be selectively-coupled to and the attachment links used to access the storage resources. The storage resource characteristics are aggregated by a pod manager that uses corresponding configuration information to dynamically compose compute nodes for rack users based on user needs.

Abstract: Out-of-band management techniques for networking fabrics are described. In an example embodiment, an apparatus may comprise a packet-switched network interface to deconstruct a packet received via an out-of-band management network and control circuitry to execute an out-of-band management agent, and the out-of-band management agent may be operative to identify a configuration command comprised in the received packet and control an optical circuit-switched network interface based on the configuration command. Other embodiments are described and claimed.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques to enable memory interfaces to communicate read request, write requests, and data via an interconnect. Embodiments, include processing write requests to write data into memory coupled via an interconnect and processing read requests to read data from memory coupled via an interconnect. In embodiments, the data may be compressed data based on a compression mechanism and communicated in a fabric packet including a compression mechanism indicator, the compressed data, and an address, the compression mechanism indicator to indicate which compression mechanism is applied to the data.

Abstract: Embodiments are generally directed apparatuses, methods, techniques and so forth to receive a sled manifest comprising identifiers for physical resources of a sled, receive results of an authentication and validation operations performed to authenticate and validate the physical resources of the sled, determine whether the results of the authentication and validation operations indicate the physical resources are authenticate or not authenticate. Further and in response to the determination that the results indicate the physical resources are authenticated, permit the physical resources to process a workload, and in response to the determination that the results indicate the physical resources are not authenticated, prevent the physical resources from processing the workload.

Abstract: Examples may include a sled for a rack of a data center including physical compute resources. The sled comprises a processor component and a unitary memory module comprising a memory controller and a quantity of memory based on the processor component. The unitary memory module can comprise a quantity of memory based on a number of cores of processor component to which the unitary memory module is communicably coupled.

Abstract: Techniques for automated data center maintenance are described. In an example embodiment, an automated maintenance device may comprise processing circuitry and non-transitory computer-readable storage media comprising instructions for execution by the processing circuitry to cause the automated maintenance device to receive an automation command from an automation coordinator for a data center, identify an automated maintenance procedure based on the received automation command, and perform the identified automated maintenance procedure. Other embodiments are described and claimed.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for communicating metric data between a plurality of management controllers for sleds via an out-of-band (OOB) network, the sleds comprising physical resources and the metric data to indicate one or more metrics for the physical resources. Embodiments may also include determining a physical resource of the physical resources to perform a task based at least in part on the one or more metrics, and causing the task to be performed by the physical resources.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques for prefetching data for a workload based on memory access information of the workload. For example, an apparatus may include at least one memory, at least one processor, and logic, at least a portion of the logic comprised in hardware, the logic to determine a workload to be executed via the at least one processor, monitor a plurality of memory accesses of the at least one memory by the workload during execution, and generate memory access information for the workload. Other embodiments are described.

Abstract: Various embodiments are generally directed to an apparatus, method and other techniques enable disaggregation of physical memory resources from physical compute resources. For example, embodiments may include a memory interface coupled with the memory controller and a memory module. The memory interface may receive data in parallel via a bus, and convert the received parallel data to send to a memory module of a memory expander sled in serial via a high speed serial link, and receive data in serial via the high speed serial link from the memory module of the memory expander sled, and convert the received serial data to send in parallel to the memory controller via the bus.

Abstract: Examples may include techniques to determine locations of a physical resource in a data center. A data center can include a number of racks having sled spaced. The sled spaces accommodate sleds having one or more physical resources disposed on each sled. The racks and sleds can include a beacon and beacon sensor, respectively, operable to determine a location of the sleds within the data center. Beacons and beacon sensors can exchange signals, a pod controller can receive an information element including indications of the exchanged signals and determine a location of the physical resource within the data center.