Abstract: A CMOS semiconductor device and a method of manufacturing the same in which the gate induced drain leakage (GIDL) effect is reduced. In the semiconductor device of this invention, high concentration source/drain regions of a PMOS transistor are formed away from the gate pattern sidewall spacers. This is accomplished by using as an implant mask a dielectric film formed on an entire surface of a semiconductor substrate, where the semiconductor substrate includes a PMOS transistor region in an n-well, a low concentration source/drain regions of a PMOS transistor formed by using a gate pattern as an implant mask, the PMOS transistor gate pattern sidewall spacers, and an NMOS transistor region in a p-well with the NMOS transistor having both a low concentration and a high concentration source/drain regions.

Abstract: A flash memory device may include a memory cell array having a plurality of word lines, bit lines, and memory cells. Each memory cell may be arranged at an intersection of a corresponding word line and a corresponding bit line. The device may include a bit line voltage setting circuit for setting a voltage on a bit line of a given memory cell to be programmed to a variable bit line voltage or to a ground voltage. A variable bit line voltage generating circuit may be provided in the flash memory device for generating the variable bit line voltage. To facilitating programming of the device, a bit line voltage of a given memory cell to be programmed may be set based on a supply voltage of the device, so as to maintain a voltage difference based on the set bit line voltage above a given threshold voltage.

Abstract: A CMOS semiconductor device and a method of manufacturing the same in which the gate induced drain leakage (GIDL) effect is reduced. In the semiconductor device of this invention, high concentration source/drain regions of a PMOS transistor are formed away from the gate pattern sidewall spacers. This is accomplished by using as an implant mask a dielectric film formed on an entire surface of a semiconductor substrate, where the semiconductor substrate includes a PMOS transistor region in an n-well, a low concentration source/drain regions of a PMOS transistor formed by using a gate pattern as an implant mask, the PMOS transistor gate pattern sidewall spacers, and an NMOS transistor region in a p-well with the NMOS transistor having both a low concentration and a high concentration source/drain regions.

Abstract: A plasma display panel and a method for fabricating the same are provided. The plasma display panel includes a plurality of front substrates for forming a display part for displaying an image, a plurality of rear substrates provided to be sealed to corresponding front substrates, a first frit glass with which the outer edge of the front and rear substrates are coated, an upper glass provided on the top of the plurality of front substrates, a lower glass which is provided on the bottom of the plurality of rear substrates and sealed to the upper glass, and a second frit glass with which the edge of the upper and lower glasses is coated.

Abstract: A plasma display panel and a method for fabricating the panel. The plasma display panel includes front substrates assembled into a front substrate structure for forming a display part for displaying an image, rear substrates assembled into a rear substrate structure and sealed to the front substrate structure, a first frit glass with which only the outer edge of the front and rear substrate structures are coated, an upper glass on the top of the front substrate structures, a lower glass on the bottom of the rear substrate structures, and a second frit glass with which the edge of the upper and lower glasses are coated, sealing the upper and lower glasses to the front and rear substrate structures.

Abstract: A method and an apparatus for fabricating a plasma display device are disclosed. The method for fabricating a plasma display device includes installing in a heating chamber a plasma display device assembly in which frit glass coats the peripheries of substrates; heating the heating chamber while evacuating the plasma display device assembly and the heating chamber via respective exhaust lines; stopping the evacuation and heating of the heating chamber so the frit glass bonds the substrates, and cooling the heating chamber; filling the heating chamber with a discharge gas to atmospheric pressure when the temperature of the heating chamber reaches a predetermined temperature; and filling the plasma display device assembly with the discharge gas when the temperature of the plasma display device assembly reaches room temperature, and sealing the plasma display device assembly.

Abstract: An improved epitaxial growth rate varying method for a side surface of a semiconductor pattern capable of controlling a growth rate of a side surface of a semiconductor pattern by controlling the amount of CCl.sub.4 gas supplied when forming an epitaxial layer on a patterned GaAs substrate in a metalorganic chemical deposition method, thus fabricating a desired quantum wire, and which is characterized by controlling a side-surface growth rate of an epitaxial layer in accordance with the CCl.sub.4 doping gas flow rate while an epitaxial layer is formed on a patterned GaAs substrate in a metalorganic chemical deposition method and in achieving a desired substantial flatness.

Abstract: A semiconductor device epitaxial layer lateral growth rate control method using CBr.sub.4 gas involves regulating an epitaxial layer lateral growth rate in accordance with the CBr.sub.4 amount doped into the epitaxial layer during the epitaxial layer growth occurring on a patterned GaAs substrate by means of a metalorganic chemical vapor deposition (MOCVD) process. The lateral growth rate may be regulated by varying the growth temperature and the V/III doping ratio.

Abstract: A heater for a chemical vapor deposition equipment includes a meandering heating wire made of either molybdenum or tungsten and having a diameter of about 1 mm. The heating wire is laid on a heater disc that is made of either molybdenum, tungsten or ceramic. The heater disc is holed at its center for receiving a susceptor rotating shaft. A plurality of heating wire fixtures support the heating wire on the heater disc while spacing the heating wire from the heater disc at an interval, thus to prevent the heating wire from directly contacting the heater disc. Each of the heating wire fixtures is provided with a pair of lateral through holes, that is, a heating wire hole formed in an upper section of each fixture and a fixing wire hole formed in a lower section of each fixture.