Abstract: The present invention relates to a high density printed circuit board and a method of manufacturing the same which enable a thin printed circuit board to be manufactured and can overcome problems occurring in a conventional method of manufacturing a printed circuit board because a conventional CCL is not used as a raw material. The high density printed circuit board includes a first insulating layer having a constant thickness, and a pair of first circuit layers embedded in two sides of the first insulating layer, respectively.

Abstract: A method for manufacturing a printed circuit board having a via-on-pad (VOP) structure, the method including: preparing an insulator and a metal clad laminate, the laminate having a metal foil and a barrier layer successively formed on the insulator; processing a via hole in the insulator from an upper surface of the insulator, a bottom of the via hole being shielded by the metal foil; removing the barrier layer so as to expose a surface of the metal foil; forming a seed layer of the metal foil and in the via hole; forming a patterned plating resist on upper and lower surfaces of the laminate, a portion of the metal foil, which shields the bottom of the via hole, and a top of the via hole being open; and forming a via inside the via hole, and forming a pad on a lower side of the via.

Abstract: Disclosed is a method of manufacturing a printed circuit board. The method of manufacturing a printed circuit board having a via for interlayer connection can include forming a circuit pattern on one side of a carrier, pressing one side of the carrier into one side of the insulator, removing the carrier, forming a hole penetrating through the insulator by processing one end of the circuit pattern, and forming a conductive material inside the hole to have the conductive material correspond to the via.

Abstract: Disclosed is a manufacturing method of a printed circuit board. The method in accordance with an embodiment of the present invention includes: providing a laminated substrate having an insulator as well as a first metal layer and a second metal layer, which are sequentially laminated on one side of the insulator; processing a via hole in the laminated substrate; forming a seed layer on an inner wall of the via hole and on a surface of the second metal layer; plating an inside of the via hole and the surface of the second metal layer with a conductive material that is different from a material of the second metal layer; etching the seed layer and the conductive material, formed on the second metal layer; etching the second metal layer; and forming a first circuit pattern by selectively etching the first metal layer.

Abstract: A circuit board including: an insulator having a trench; a first circuit pattern formed to bury a portion of the trench; and a second circuit pattern formed on a surface of the insulator having the trench formed therein.

Abstract: Disclosed herein is a method for manufacturing a semiconductor package which uses a base member 120 in which a first metal layer 113, a barrier layer 115, and a second metal layer 117 are stacked on both surface thereof in sequence based on an adhesive member 111 to simultaneously manufacture two printed circuit boards through a single sheet process, thereby making it possible to improve manufacturing efficiency; electrically connects a semiconductor chip 300 to a printed circuit board through a solder bump 250, thereby making it possible to implement a high-density package substrate; and forms a metal post 140 instead of a through hole to required in an interlayer circuit connection, thereby making it possible to reduce costs required in the processing/plating of the through hole.

Abstract: A carrier member for transmitting circuits, which is a component of a coreless printed circuit board having circuit patterns embedded therein, and which can be used to provide a high-density and highly reliable printed circuit board by forming protrusions only on the lower ends of the circuit patterns, a coreless printed circuit board using the carrier member, and methods of manufacturing the carrier member and the coreless printed circuit board.

Abstract: A method of manufacturing a printed circuit board having a metal bump, including: forming a recess for creation of the metal bump on a metal carrier; forming a barrier layer on the metal carrier including the recess; forming an upper circuit layer on the barrier layer, the upper circuit layer including the metal bump charged in the recess and a circuit pattern; preparing an insulating layer, and transferring the upper circuit layer to the insulating layer; and removing the metal carrier and the barrier layer.

Abstract: A printed circuit board having a metal bump, including: an upper circuit layer including a circuit pattern embedded in an upper part of an insulating layer, the circuit pattern being made of electroconductive metal; wherein the metal bump is integrally formed with the circuit pattern and protruding from the circuit pattern and above the insulating layer.

Abstract: A method of manufacturing a printed circuit board having a metal bump, including: forming a recess for creation of the metal bump on a first carrier, forming a first barrier layer on the first carrier, and forming an upper circuit layer on the first barrier layer, the upper circuit layer including a metal bump charged in the recess and a circuit pattern; forming a second barrier layer on a second carrier, and forming a lower circuit layer on the second barrier layer; preparing an insulating layer, and transferring the upper and lower circuit layers to the insulating layer; removing the first and second carriers; and removing the first and second barrier layers.

Abstract: A method of manufacturing a circuit board that includes: forming a conductive relievo pattern, including a first plating layer, a first metal layer, and a second plating layer stacked sequentially in correspondence with a first circuit pattern, on a seed layer stacked on a carrier; stacking and pressing together the carrier and an insulator, such that a surface of the carrier having the conductive relievo pattern faces the insulator; transcribing the conductive relievo pattern into the insulator by removing the carrier; forming a conduction pattern, including a third plating layer and a second metal layer stacked sequentially in correspondence with a second circuit pattern, on the surface of the insulator having the conductive relievo pattern transcribed; removing the first plating layer and seed layer; and removing the first and second metal layers, can provide a circuit board that has high-density circuit patterns without an increased amount of insulator.

Abstract: A method of manufacturing a printed circuit board having a buried solder bump, including: preparing a carrier on which a circuit layer, a solder bump, and a circuit pattern formed on the solder bump are formed; pressing the carrier into an insulating layer so that the circuit layer, the solder bump and the circuit pattern are buried in the insulating layer; and removing the carrier.

Abstract: A method of manufacturing a substrate using a carrier, that includes preparing a carrier having a releasing layer, and insulating layers and metal layers sequentially disposed on both sides of the releasing layer; patterning the metal layers to form base circuit layers; forming buildup layers on the base circuit layers; executing a routing process to separate the insulating layers from the releasing layer; and forming solder resist layers on the buildup layers and forming openings in the solder resist layers and the insulating layers to expose pads.

Abstract: A printed circuit board, which increases the contact area between an IC and a printed circuit board, thus increasing the degree of adhesion, is disclosed. The printed circuit board includes: an insulation layer which includes a first circuit pattern, including at least one via land, embedded in the upper surface of the insulation layer to be flush with the upper surface, and a second circuit pattern formed in the lower surface of the insulation layer to be flush with the lower surface; a solder resist layer formed on the insulation layer; a via hole and a bump integrally formed on the second circuit pattern through the via hole and the via land such that it protrudes from the insulation layer to be higher than the solder resist layer.

Abstract: A method of manufacturing a mounting substrate, the method including: providing an insulation layer, the insulation layer having a circuit pattern formed in one side thereof; forming at least one bonding pad in the other side of the insulation layer, the bonding pad electrically connected with the circuit pattern; and etching the bonding pad such that a surface of the bonding pad is recessed from a surface of the insulation layer by a predetermined depth.

Abstract: A circuit board includes: an insulator having a groove; a circuit layer filling a portion of the groove; a solder pad on the circuit layer filling the remainder of the groove; and a circuit pattern electrically connected with the circuit layer, the circuit pattern buried in the insulator such that a portion of the circuit pattern is exposed at a surface of the insulator.

Abstract: Disclosed is a printed circuit board having a buried solder bump, in which a circuit pattern and a solder bump formed on the circuit pattern are buried in an insulating layer, thus improving the degree of matching between the solder bump and the circuit pattern and obviating a need for an additional coining process of the solder bump. A manufacturing method thereof is also provided.

Abstract: Disclosed are a printed circuit board for improving the tolerance of embedded capacitors and a method of manufacturing the same. The printed circuit board having embedded capacitors is manufactured by transferring and embedding a circuit layer having a lower electrode formed through an additive process into a resin insulating layer, and thereby is minimized in the circuit tolerance conventionally caused by an etching process to thus be applied to capacitors for RF matching.

Abstract: A mounting substrate and a method of manufacturing the mounting substrate. The mounting substrate can include an insulation layer, a bonding pad buried in one side of the insulation layer in correspondence with a mounting position of a chip, and a circuit pattern electrically connected to the bonding pad. By utilizing certain embodiments of the invention, the process for stacking a solder resist layer can be omitted, as the bonding pads can be implemented in a form recessed from the surface of the insulation layer. In this way, the manufacturing process can be simplified and manufacturing costs can be reduced. Since the surface of the mounting-substrate on which to mount a chip can be kept flat without any protuberances, the occurrence of voids in the underfill can be minimized. This is correlated to obtaining a high degree of reliability, and leads to a greater likelihood of successful mounting.

Abstract: A board on chip package including a photo solder resist having a cavity and a pattern on one side, the pattern corresponding to a circuit wire; a solder ball pad accommodated in the cavity; a circuit wire electrically connected with the solder ball pad, and formed on the other side of the photo solder resist; a semiconductor chip mounted on the solder ball pad by a flip chip bonding; and a passivation material to mold the semiconductor chip.