Patents by Inventor Myung Sun Kim

Myung Sun Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110230027
    Abstract: Provided are methods of forming semiconductor devices. A method may include preparing a semiconductor substrate including a first region and a second region adjacent the first region. The method may also include forming sacrificial pattern covering the second region and exposing the first region. The method may further include forming a capping layer including a faceted sidewall on the first region using selective epitaxial growth (SEG). The faceted sidewall may be separate from the sacrificial pattern. The sacrificial pattern may be removed. Impurity ions may be implanted into the semiconductor substrate.
    Type: Application
    Filed: March 21, 2011
    Publication date: September 22, 2011
    Inventors: Myung-Sun Kim, Dong-Suk Shin, Dong-Hyuk Kim, Yong-Joo Lee, Hoi-Sung Chung
  • Patent number: 8005758
    Abstract: A method and apparatus for encrypting or decrypting digital content are provided. In the method, a binding range is selected from a plurality of binding ranges of content use based on license information of the content, and the content is encrypted based on the selected binding range so that the content can be used only within the selected binding range. Accordingly, it is possible to limit content use to a plurality of binding ranges of use of the content, using license information of the content.
    Type: Grant
    Filed: April 13, 2006
    Date of Patent: August 23, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sun-nam Lee, Myung-sun Kim, Sung-hyu Han, Young-sun Yoon, Jae-heung Lee, Bong-seon Kim, Moon-young Choi
  • Publication number: 20110201166
    Abstract: A method of manufacturing a semiconductor device includes forming a gate electrode on a semiconductor substrate and a sidewall spacer on the gate electrode. Then, a portion of the semiconductor substrate at both sides of the sidewall spacer is partially etched to form a trench. A SiGe mixed crystal layer is formed in the trench. A silicon layer is formed on the SiGe mixed crystal layer. A portion of the silicon layer is partially etched using an etching solution having different etching rates in accordance with a crystal direction of a face of the silicon layer to form a capping layer including a silicon facet having an (111) inclined face.
    Type: Application
    Filed: February 4, 2011
    Publication date: August 18, 2011
    Inventors: Hoi-Sung CHUNG, Dong-Suk SHIN, Dong-Hyuk KIM, Jung-Shik HEO, Myung-Sun KIM
  • Patent number: 7996322
    Abstract: A method of creating a domain based on public key cryptography includes providing, by a content-providing server, a list of devices requesting content, and selecting, by a user, a device from the list; transmitting, by the server, discrimination information on revoked devices to the device; extracting, by the device having received the discrimination information, a secret value from the discrimination information, preparing a certificate using the extracted secret value, and transmitting device information and the certificate of the device to the server; verifying, by the server, the certificate and creating a domain ID and a domain key using the device information; encrypting, by the server, the domain ID and the domain key using a unique public key of the device and transmitting the encrypted domain ID and domain key to the device; and restoring, by the device, the domain key using a unique secret key of the device.
    Type: Grant
    Filed: June 16, 2004
    Date of Patent: August 9, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-kuk You, Myung-sun Kim, Yang-lim Choi, Yong-jin Jang
  • Publication number: 20110189608
    Abstract: A photoresist composition for fabricating a probe array is provided. The photoresist composition includes a photoacid generator having an onium salt and an i-line reactive sensitizer.
    Type: Application
    Filed: January 28, 2011
    Publication date: August 4, 2011
    Inventors: Hyo-Jin Yun, Jae-Ho Kim, Young-Ho Kim, Boo-Deuk Kim, Jin-A Ryu, Myung-Sun Kim, Se-Kyung Baek, Soo-Kyung Kim, Ji-Yun Ham
  • Patent number: 7985347
    Abstract: In a method of forming a pattern and a method of forming a capacitor, an oxide layer pattern having an opening is formed on a substrate. A conductive layer is formed on the oxide layer pattern and the bottom and sidewalls of the opening. A buffer layer pattern is formed in the opening having the conductive layer, the buffer layer pattern including a siloxane polymer. The conductive layer on the oxide layer pattern is selectively removed using the buffer layer pattern as an etching mask. A conductive pattern having a cylindrical shape can be formed on the substrate. The method of forming a pattern may simplify manufacturing processes for a capacitor and a semiconductor device, and may improve their efficiencies.
    Type: Grant
    Filed: December 14, 2007
    Date of Patent: July 26, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Mi Kim, Young-Ho Kim, Myung-Sun Kim, Jae-Ho Kim, Chang-Ho Lee, Seok Han
  • Patent number: 7981750
    Abstract: In one aspect, a method of fabricating a semiconductor device is provided. The method includes forming at least one capping layer over epitaxial source/drain regions of a PMOS device, forming a stress memorization (SM) layer over the PMOS device including the at least one capping layer and over an adjacent NMOS device, and treating the SM layer formed over the NMOS and PMOS devices to induce tensile stress in a channel region of the NMOS device.
    Type: Grant
    Filed: June 13, 2008
    Date of Patent: July 19, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hion-suck Baik, Jong-bong Park, Jung-yun Won, Hwa-sung Rhee, Byung-seo Kim, Ho Lee, Myung-sun Kim, Ji-hye Yi
  • Patent number: 7979913
    Abstract: A home network system allowing a user to directly control joining or removing of member devices in a domain using a user interface and to effectively control a status change of the member devices of the domain and a management method therefor. The home network system includes: a master device, which forms a domain with more than one controlled device, transmits a predetermined domain key to the controlled devices included in the domain, generates a new domain key whenever a configuration of the domain is changed, and transmits the new domain key to the controlled devices remaining in the domain; and a control point, which provides a user interface allowing a user to directly change the configuration of the domain.
    Type: Grant
    Filed: December 1, 2004
    Date of Patent: July 12, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-jin Jang, Myung-sun Kim, Su-hyun Nam, Jae-heung Lee
  • Publication number: 20110136311
    Abstract: A semiconductor device having a locally buried insulation layer and a method of manufacturing a semiconductor device having the same are provided, in which a gate electrode is formed on a substrate, and oxygen ions are implanted into an active region to form a locally buried insulation layer. An impurity layer is formed on the locally buried insulation layer to form a source/drain. A silicide layer is formed on the source/drain and on the gate electrode. The locally buried insulation layer can prevent junction leakage, decrease junction capacitance and prevent a critical voltage of an MOS transistor from increasing due to body bias, thereby to improve characteristics of the device.
    Type: Application
    Filed: February 16, 2011
    Publication date: June 9, 2011
    Inventors: Dong-Suk SHIN, Ho Lee, Myung-Sun Kim
  • Patent number: 7879668
    Abstract: In a method of manufacturing a semiconductor device, a first gate electrode and a second gate electrode are formed in a first area and a second area of a substrate. Non-crystalline regions are formed in the first area of the substrate adjacent the first gate electrode. A layer having a first stress is formed on the substrate and the first and the second gate electrodes. A mask is formed on a first portion of the layer in the first area of the substrate to expose a second portion of the layer in the second area. The second portion is etched to form a sacrificial spacer on a sidewall of the second gate electrode. The second area of the substrate is partially etched using the mask, the second gate electrode and the sacrificial spacer, to form recesses in the second area of the substrate adjacent the second gate electrode. Patterns having a second stress are formed in the recesses.
    Type: Grant
    Filed: December 23, 2008
    Date of Patent: February 1, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hwa-Sung Rhee, Ho Lee, Myung-Sun Kim, Ji-Hye Yi
  • Patent number: 7848526
    Abstract: A method of receiving a session key in a home network and a method of reproducing content using the same. The method of receiving a session key from a home server in a home network, includes: (a) whenever one of members of the home network changes, receiving and storing the session key and a session version indicating a session key generation sequence; (b) receiving a license necessary for reproducing predetermined content; and (c) determining a session key necessary for reproducing the predetermined content based on an encoding session version (ESV), which is a session version extracted from the license, and the stored session version. A home server transmits a session key and a session version to a user device whenever a subscriber to a home network changes, and the user device determines a session key using the session version, thereby performing a variety of domain administration by freely transmitting content between user devices.
    Type: Grant
    Filed: November 8, 2005
    Date of Patent: December 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jae-heung Lee, Myung-sun Kim, Sung-hyu Han, Yong-kuk You, Bong-seon Kim, Young-sun Yoon
  • Publication number: 20100304543
    Abstract: A semiconductor device includes a gate insulator and a gate electrode stacked on a substrate, a source/drain pattern which fills a recess region formed at opposite sides adjacent to the gate electrode, the source/drain pattern being made of silicon-germanium doped with dopants and a metal germanosilicide layer disposed on the source/drain pattern. The metal germanosilicide layer is electrically connected to the source/drain pattern. Moreover, a proportion of germanium amount to the sum of the germanium amount and silicon amount in the metal germanosilicide layer is lower than that of germanium amount to the sum of the germanium amount and silicon amount in the source/drain pattern.
    Type: Application
    Filed: August 6, 2010
    Publication date: December 2, 2010
    Inventors: Myung-Sun KIM, Hwa-Sung RHEE, Tetsuji UENO, Ho LEE, Ji-Hye YI
  • Patent number: 7826615
    Abstract: A scrambling apparatus and method are provided for increasing randomness without damaging compression efficiency of total video data by selectively and randomly performing conversion when converting motion vector codes of compressed video data into other motion vector codes indicating other motion vector values, and more particularly, by performing conditional conversion only if a predetermined condition is satisfied when selective conversion of motion vector codes is performed. The scrambling apparatus includes a conversion motion vector code table generator generating a conversion motion vector code table comprising motion vector codes obtained by converting motion vector codes corresponding to motion vector values of input video data in a standard motion vector code table; and a conversion controller randomly determining whether a certain motion vector value is encoded using the conversion motion vector code table or the standard motion vector code table.
    Type: Grant
    Filed: February 4, 2005
    Date of Patent: November 2, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Su-hyun Nam, Myung-sun Kim, Yong-jin Jang, Sun-nam Lee, Jae-heung Lee, Sang-su Choi
  • Publication number: 20100233864
    Abstract: Methods of fabricating a semiconductor device are provided, the methods include forming a gate stack on a substrate, forming an insulation layer on the substrate to cover the gate stack, forming a spacer at both side walls of the gate stack by etching the insulation layer, and ion implanting impurities in the spacer or the insulation layer.
    Type: Application
    Filed: February 17, 2010
    Publication date: September 16, 2010
    Inventors: Ho Lee, Moon-han Park, Hwa-sung Rhee, Myung-sun Kim, Hoi-sung Chung
  • Patent number: 7791146
    Abstract: A semiconductor device includes a gate insulator and a gate electrode stacked on a substrate, a source/drain pattern which fills a recess region formed at opposite sides adjacent to the gate electrode, the source/drain pattern being made of silicon-germanium doped with dopants and a metal germanosilicide layer disposed on the source/drain pattern. The metal germanosilicide layer is electrically connected to the source/drain pattern. Moreover, a proportion of germanium amount to the sum of the germanium amount and silicon amount in the metal germanosilicide layer is lower than that of germanium amount to the sum of the germanium amount and silicon amount in the source/drain pattern.
    Type: Grant
    Filed: September 18, 2007
    Date of Patent: September 7, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-Sun Kim, Hwa-Sung Rhee, Tetsuji Ueno, Ho Lee, Ji-Hye Yi
  • Patent number: 7788728
    Abstract: A method and apparatus are provided for simply and securely limiting a number of times that contents can be accessed using a hash chain. The apparatus limiting a number of times contents are accessed by a user terminal includes a hash chain generator receiving information indicating selected contents by the user terminal and information indicating how many times (n) the user terminal has authority to access the selected contents and generating a hash chain including n hash values derived from a seed value, and a contents access manager deleting the hash values one by one from the hash chain whenever the user terminal accesses the selected contents such that the number of times the contents can be accessed by the user terminal is decreased by the number of deleted hash values.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: August 31, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Myung-sun Kim, Su-hyun Nam, Yong-jin Jang, Sun-nam Lee, Jae-heung Lee
  • Publication number: 20100171181
    Abstract: A method of forming a semiconductor device includes forming a device isolation region in a silicon substrate to define an nMOS region and a pMOS region. A p-well is formed in the nMOS region and an n-well in the pMOS region. Gate structures are formed over the p-well and n-well, each gate structure including a stacked structure comprising a gate insulating layer and a gate electrode. A resist mask covers the nMOS region and exposes the pMOS region. Trenches are formed in the substrate on opposite sides of the gate structures of the pMOS region. SiGe layers are grown in the trenches of the pMOS region. The resist mask is removed from the nMOS region. Carbon is implanted to an implantation depth simultaneously on both the nMOS region and the pMOS region to form SiC on the nMOS region and SiGe on the pMOS region.
    Type: Application
    Filed: December 17, 2009
    Publication date: July 8, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hwa Sung Rhee, Myung Sun Kim, Ho Lee, Hoi Sung Chung
  • Patent number: 7736527
    Abstract: Siloxane polymer compositions and methods of manufacturing a capacitor are described. In some embodiments, a mold layer pattern is formed on a substrate having a conductive structure, and the mold layer pattern has an opening to expose the conductive structure. A conductive layer is formed on the substrate. A buffer layer pattern is formed on the conductive layer formed in the opening. The buffer layer pattern includes a siloxane polymer represented by the following Chemical Formula 1. The conductive layer is selectively removed to form a lower electrode. The mold layer pattern and the buffer layer pattern are removed. A dielectric layer and an upper electrode are formed on the substrate to form a capacitor. The methods may simplify manufacturing processes for a capacitor and a semiconductor device, and may improve their efficiencies.
    Type: Grant
    Filed: January 9, 2008
    Date of Patent: June 15, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Kyoung-Mi Kim, Myung-Sun Kim, Young-Ho Kim
  • Patent number: 7653713
    Abstract: A method of measuring round trip time (RTT) and a proximity checking method using the same. The method of measuring RTT includes: transmitting a hashed second random number and starting the RTT measurement; and receiving a hashed first random number from a device that received the hashed second random number and ending the RTT measurement, thereby greatly reducing repetitive encryption and decryption operations in the proximity check using a repetitive RTT measurement.
    Type: Grant
    Filed: January 27, 2006
    Date of Patent: January 26, 2010
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-hyu Han, Myung-sun Kim, Young-sun Yoon, Sun-nam Lee, Bong-seon Kim, Jae-heung Lee
  • Publication number: 20100006906
    Abstract: A semiconductor device includes a single crystalline substrate and an active region defined in the single crystalline substrate, wherein a major axis direction of the active region is aligned with a <0,1,1> family direction.
    Type: Application
    Filed: July 14, 2009
    Publication date: January 14, 2010
    Inventors: Hwa-Sung Rhee, Ho Lee, Myung-Sun Kim, Ji-Hye Yi