Patents by Inventor Nageswara RAO

Nageswara RAO has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230125056
    Abstract: One or more embodiments relates to a system for simultaneously detecting vibration and the presence of a target gas having a tunable fiber ring laser in electronic and optical communication with a vibration sensor and a gas detection sensor. One or more embodiments relate to a method for simultaneously measuring vibration and detecting the presence of a target gas in an environment having the steps of providing a system for simultaneously measuring vibration and detecting a target gas into an environment; sending an optical signal to a vibration sensor and gas detection sensor; and collecting and analyzing modified signals from the vibration sensor and gas detection sensor.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 20, 2023
    Inventors: Nageswara Rao Lalam, Michael P. Buric, Ping Lu, Fei Lu, Tao Hong, Ruishu Feng Wright
  • Publication number: 20230096734
    Abstract: Methods, systems, and computer-readable media are disclosed herein combine randomization functionalities with the machine-learning prioritization of workflows for performance testing. In aspects, a primary workflow having a sequence of user interface steps is input. Testing workflows are generated that represent each variable position of unlocked steps in the sequence of the primary workflow while maintaining the sequential position of any locked steps. These testing workflows are then ingested to a machine learning model that identifies as subset of the testing workflows to prioritize over other. Specifically, testing workflows are prioritized that at least partially match sequence patterns in historical workflow data that is associated with vulnerable computer code. The subset is output and tested by testing engine to generate a report of any vulnerable computer code.
    Type: Application
    Filed: September 28, 2021
    Publication date: March 30, 2023
    Inventors: Ranjeet Joseph Kumar Anthonappa, Venkata Nageswara Rao Desaraju, Sneha Raveendran, Sudarshan Babu Kotapati
  • Patent number: 11611426
    Abstract: A multi-lane transmitting apparatus includes lanes, and each lane includes a serializer circuit to convert parallel bits to serial bits. A clock signal generator generates a first clock signal having phases. A deserializer circuit converts serial bits to parallel bits. A Built-In Self-Test (BIST) circuit includes a signal generator circuit for generating a signal having bits in a defined pattern. A comparator circuit compares a pattern of bits of an output signal with the defined pattern. A BIST lane circuit monitors a status of the lanes. A BIST central circuit receives the status and determines if a number of lanes having an unmatched status is less than a threshold value. A phase extrapolator circuit adjusts a phase of the first clock signal when the number of the lanes is less than the threshold value.
    Type: Grant
    Filed: September 9, 2021
    Date of Patent: March 21, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Nageswara Rao Kunchapu, Tamal Das, Akshay Karkal Kamath, Mohit Arora
  • Publication number: 20230084235
    Abstract: In one embodiment, a method is disclosed for mobile device security that includes receiving a label ID from a low power mobile device via a first access point, wherein the label ID is a randomized value that substitutes a device address of the low power mobile device during wireless communication. The method includes mapping the label ID to the device address, and transmitting the device address to the first access point, and responsive to the transmitting, causing the first access point to pair with the low power mobile device.
    Type: Application
    Filed: September 13, 2021
    Publication date: March 16, 2023
    Inventors: Nageswara Rao MAJETI, Sairam SAMBARAJU, Manikanteswar G. GOVINDA SWAMY, Kishore HANUMANSETTY, Saravanan RADHAKRISHNAN, Bhavik P. SHAH
  • Publication number: 20230063094
    Abstract: A holdup energy arrangement can include a motor control module configured to connect to motor power electronics to operate an inverter to control a motor. The motor control module can operate at a lower voltage than the motor power electronics. The arrangement can include a power supply operatively connected to the motor control module and configured to provide power the motor control module and a converter operatively connected to the power supply and configured to be electrically connected to a DC link capacitor of the motor power electronics. The arrangement can also include a logic control module configured to control the converter to selectively allow energy to flow from the DC link capacitor, through the converter, and to the power supply to provide holdup energy to the power supply with energy from the DC link capacitor.
    Type: Application
    Filed: August 10, 2022
    Publication date: March 2, 2023
    Applicant: Hamilton Sundstrand Corporation
    Inventors: Nageswara Rao Kalluri, Sridhar Katakam, Surendra Somasekhar Valleru, Rajkumar Perumal, Pravinsharma Kaliyannan Eswaran
  • Publication number: 20230063593
    Abstract: A motor speed monitoring system can include a monitor channel having an input configured to connect to an inverter output of an inverter to receive motor command signals from the inverter, and an intelligence module configured to determine a motor speed based on the motor power signals from the inverter.
    Type: Application
    Filed: August 10, 2022
    Publication date: March 2, 2023
    Applicant: Hamilton Sundstrand Corporation
    Inventors: Nageswara Rao Kalluri, Pravinsharma Kaliyannan Eswaran, Sridhar Katakam, Surendra Somasekhar Valleru, Ashish Vijay
  • Patent number: 11568397
    Abstract: Systems and methods for providing a financial/clinical data interchange are provided. The financial/clinical data interchange provides a distributed implementation to a secure hash key (i.e., a token) and value pair data derived from a medical claim (e.g., patient identification, submitter identification, payer identification, encounter identification, and the like) and enriched with submitter-based domain data. The token may be used as a data attribute in an API that unlocks a pointer to the value (e.g., a fast healthcare interoperability resources (FHIR) uniform resource identifier (URI) to the patient encounter associated with the claim) to leverage a FHIR query for all documented medical records associated with the claim the payer is authorized by the submitter to view.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: January 31, 2023
    Assignee: CERNER INNOVATION, INC.
    Inventors: James L. Poteet, III, Vidya N V, Venkata Nageswara Rao Desaraju, Roma Kumari, Pogaku Shahazad, Mandar Vijay Kulkarni, Sparsha Shetty
  • Publication number: 20220343455
    Abstract: An example image processor for processing pixels includes processing circuitry configured to determine that a first subset of input bits of a current pixel are the same as a first subset of input bits of a previously processed pixel, selectively bypass processing the first subset of input bits through a first pipeline based on the determination, output a first subset of output bits of the previously processed pixel as a first subset of output bits of the current pixel based on the determination, and merge the first subset of output bits of the current pixel with a second subset of output bits of the current pixel generated through a second pipeline from a second subset of input bits of the current pixel.
    Type: Application
    Filed: April 21, 2021
    Publication date: October 27, 2022
    Inventors: Nageswara Rao Vavintaparthi, Venkatesh Hanamsagar, Raghavendra Prasad Nerlige Onkarappa, Joby Abraham
  • Publication number: 20220329405
    Abstract: A multi-lane transmitting apparatus includes lanes, and each lane includes a serializer circuit to convert parallel bits to serial bits. A clock signal generator generates a first clock signal having phases. A deserializer circuit converts serial bits to parallel bits. A Built-In Self-Test (BIST) circuit includes a signal generator circuit for generating a signal having bits in a defined pattern. A comparator circuit compares a pattern of bits of an output signal with the defined pattern. A BIST lane circuit monitors a status of the lanes. A BIST central circuit receives the status and determines if a number of lanes having an unmatched status is less than a threshold value. A phase extrapolator circuit adjusts a phase of the first clock signal when the number of the lanes is less than the threshold value.
    Type: Application
    Filed: September 9, 2021
    Publication date: October 13, 2022
    Inventors: Nageswara Rao Kunchapu, Tamal Das, Akshay Karkal Kamath, Mohit Arora
  • Publication number: 20220187103
    Abstract: System and methods for accuracy improvement of an LVDT are provided. Aspects include determining a first voltage from the first PGA and a second voltage from the second PGA, wherein the first voltage is determined from a PGA coupled to a first secondary winding, and wherein the second voltage is determined from a second PGA coupled to a second secondary winding, iteratively performing: analyzing the first voltage to determine a gain correction is needed for a first gain for the first PGA, the gain correction comprising change to the first gain, and analyzing the second voltage to determine a gain correction is needed for a second gain for the second PGA, the gain correction comprising change to the second gain, based on determining a gain correction is not needed for the first gain and the second gain, calculating a position based on the first voltage and the second voltage.
    Type: Application
    Filed: February 8, 2021
    Publication date: June 16, 2022
    Inventors: Nageswara Rao Kalluri, Sridhar Katakam, Somasekhar Valleru, Pravinsharma Kaliyannan Eswaran, Rajkumar Perumal
  • Publication number: 20220124117
    Abstract: Protecting data in non-volatile storages provided to clouds against malicious attacks. According to an aspect, multiple malicious patterns indicating respective malicious attacks to access non-volatile storages provided to clouds in a cloud infrastructure are maintained. When an access request is received, the data stream representing the access request is examined to determine whether the data stream contains any of the malicious patterns. If the data stream is found not to contain any malicious pattern, it is concluded that the access request is free of the malicious attacks. If the data stream is found to contain at least one malicious pattern, it is concluded that the access request is a malicious attack corresponding to the malicious pattern.
    Type: Application
    Filed: October 19, 2020
    Publication date: April 21, 2022
    Inventors: Prasad Bilugu, Praveen Kumar Kannoju, Nageswara Rao Samudrala
  • Patent number: 11232616
    Abstract: Methods and systems for performing editing operations on media are provided. A method includes receiving at least one reference media and at least one target media, identifying at least one dominant edit attribute of the at least one reference media, and performing a compatibility check to determine a compatibility of the at least one target media with the at least one dominant edit attribute of the at least one reference media. Based on results of the compatibility check, at least one compatible edit attribute is selected from the at least one dominant edit attribute, and the at least one compatible edit attribute is transferred from the at least one reference media to the at least one target media.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: January 25, 2022
    Inventors: Gururaj Bhat, Adappa M Gourannavar, Rahul Varna, Pavan Sudheendra, Mamata Pattanaik, Nageswara Rao Pragada
  • Publication number: 20210380557
    Abstract: The present invention relates to novel crystalline form of nilotinib hydrochloride, process for its preparation and pharmaceutical composition comprising the same.
    Type: Application
    Filed: November 5, 2019
    Publication date: December 9, 2021
    Inventors: Ram Thaimattam, Suresh Babu Radhakrishnan, Nageswara Rao Regandla, Venkata Lakshmi Narasimha Rao Dammalapati, Uma Maheswer Rao Vasireddi
  • Publication number: 20210361270
    Abstract: The present invention is related to an occlusion device for occluding an opening in a body tissue and a method of deploying said occlusion device to the site of defect. The occlusion device comprises a flexible proximal high-pressure disc and a flexible distal low-pressure disc, that are centrally connected by a central connector section of varying diameter and length which further comprises a stretchable narrow connector at the tapered end, and retention screws. The design of the occlusion device of the present invention is such that it enables haemodynamic adjustment providing a better-fit to the size of the defect, and reduction of clamping force and stress on the conduction system.
    Type: Application
    Filed: August 9, 2021
    Publication date: November 25, 2021
    Inventor: NAGESWARA RAO KONETI
  • Publication number: 20210328518
    Abstract: An intelligent architecture system is provided. The intelligent architecture system includes an input line, an output line and an intelligent architecture operably interposed between the input line and the output line. The intelligent architecture is configured to control a voltage of the output line in accordance with a voltage of the input line.
    Type: Application
    Filed: February 18, 2021
    Publication date: October 21, 2021
    Inventors: Sridhar Katakam, Somasekhar Valleru, Nageswara Rao Kalluri, Ashish Vijay
  • Publication number: 20210297005
    Abstract: A threshold detection system can be configured to monitor a location (e.g., a DC link) for overcurrent. The threshold detection system can be configured to generate a pulse width modulated signal with a duty cycle that is proportional to current through the DC link. The threshold detection system can be configured to determine whether the duty cycle exceeds a selected threshold.
    Type: Application
    Filed: July 29, 2020
    Publication date: September 23, 2021
    Applicant: Hamilton Sundstrand Corporation
    Inventors: Shobha Ramanjani, Nageswara Rao Kalluri, Sridhar Katakam
  • Publication number: 20210052556
    Abstract: Disclosed are compounds of the general formula (I), wherein R1-R3 are as defined herein, for use as MALT1 inhibitors in the treatment of autoimmune and inflammatory diseases or disorders. Methods of synthesizing the compounds are also disclosed. Also disclosed are pharmaceutical compositions containing a compound of the invention and a method of treating a patient for an autoimmune or an inflammatory disease or disorder, for example, a cancer, by administering a compound of the invention.
    Type: Application
    Filed: March 26, 2020
    Publication date: February 25, 2021
    Inventors: Gagan Kukreja, Nageswara Rao Irlapati, Arun Rangnath Jagdale, Gokul Keruji Deshmukh, Vinod Popatrao Vyavahare, Kiran Chandrashekhar Kulkarni, Neelima Sinha, Venkata P. Palle, Rajender Kumar Kamboj
  • Patent number: 10922954
    Abstract: A system and method for facilitating user interactions with a life safety system that includes an event panel controller configured to trigger, in response to information received from the one or more life safety system components, an emergency event and insert the triggered emergency event into a queue of active emergency events. The event panel controller is further configured to display an event indication corresponding to the triggered emergency event in an event indicator region of an emergency event graphical user interface (GUI). The event indication is displayed in one of a plurality of event elements of the event indicator region, wherein the one of the plurality of event elements of the event indicator region displays information of the triggered emergency event. Accordingly, each of the event elements remains visible to a user of the event panel controller during its use. Additional embodiments are described herein.
    Type: Grant
    Filed: February 1, 2018
    Date of Patent: February 16, 2021
    Assignee: CARRIER CORPORATION
    Inventors: Donald Edward Becker, Nageswara Rao Bonam, Kumara Raja Suseelan
  • Publication number: 20200342455
    Abstract: Systems and methods for providing a financial/clinical data interchange are provided. The financial/clinical data interchange provides a distributed implementation to a secure hash key (i.e., a token) and value pair data derived from a medical claim (e.g., patient identification, submitter identification, payer identification, encounter identification, and the like) and enriched with submitter-based domain data. The token may be used as a data attribute in an API that unlocks a pointer to the value (e.g., a fast healthcare interoperability resources (FHIR) uniform resource identifier (URI) to the patient encounter associated with the claim) to leverage a FHIR query for all documented medical records associated with the claim the payer is authorized by the submitter to view.
    Type: Application
    Filed: June 28, 2019
    Publication date: October 29, 2020
    Inventors: James L. Poteet, III, Vidya N V, Venkata Nageswara Rao Desaraju, Roma Kumari, Pogaku Shahazad, Mandar Vijay Kulkarni, Sparsha Shetty
  • Patent number: 10804904
    Abstract: A multi-lane transmitter and method of detecting a sync loss are provided. The method includes generating a high-speed clock signal and a sync reset signal synchronized to the high-speed clock signal. A sync loss pulse is generated based on the high-speed clock signal, and the sync loss pulse is provided to each of plural serializer circuits. Each serializer circuit generates a sampled sync loss signal by sampling the sync loss pulse in accordance with a parallel clock signal, and a Boolean value is assigned to the sampled sync loss signal and output. A logic block detects a sync loss when the sampled sync loss signal of any serializer circuit is out of sync from the sync loss pulse based on the Boolean value.
    Type: Grant
    Filed: December 23, 2019
    Date of Patent: October 13, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tamal Das, Nageswara Rao Kunchapu, Umamaheswara Reddy Katta