Abstract: A composition for preventing, alleviating or treating a neurodegenerative disease, which contains Pediococcus inopinatus as an active ingredient. The Pediococcus inopinatus strain can suppress neuroinflammation and can also alleviate the symptoms of ataxia in an animal model of Parkinson's disease and, thus, can be utilized for the prevention, alleviation and treatment of various neurodegenerative diseases including Parkinson's disease.

Abstract: A three-dimensional semiconductor device is provided. The three-dimensional device may include substrate; a common electrode layer on the substrate; a word line stack disposed on the common electrode layer, the word line stack having interlayer insulating layers and word lines structures alternately stacked and; and a vertical channel pillar penetrating the word line stack, the vertical channel pillar being electrically connected to the common electrode layer. Each of the word line structures includes a body portion having a first vertical width and an extension portion having a second vertical width greater than the first vertical width. The extension portion abuts the vertical channel pillar.

Abstract: A camera module includes a housing having an internal space; a carrier disposed in the internal space; a lens module disposed in the carrier; a guide frame disposed between the carrier and the lens module; a first ball member and a second ball member disposed between the housing and the carrier, spaced apart from each other in a diagonal direction of the housing and the carrier, and configured to guide a movement of the carrier in a direction of an optical axis; and a third ball member disposed between the carrier and the guide frame, and a fourth ball member disposed between the guide frame and the lens module, and configured to guide a movement of the lens module in a direction perpendicular to the optical axis direction, wherein the third ball member and the fourth ball member do not overlap each other in the optical axis direction.

Abstract: A read pattern obtained in a read operation for determining an optimal read voltage when an initial read operation fails is stored, and is used in a read operation to be subsequently performed for determining a new optimal read voltage.

Abstract: A read retry table (RRT) apparatus is coupled to a plurality of memory dies via a data path. The apparatus is configured to collect data from a plurality of memory cells coupled to a plurality of word lines in the plurality of memory dies via the data path; perform a first clustering on the plurality of word lines based on an error correction capability of error correction circuitry for collected data; perform a second clustering on an outlier of the first clustering; and generate or update an RRT based on values obtained from the first clustering and the second clustering.

Abstract: A camera module including a lens module, a carrier accommodating the lens module, a housing accommodating the carrier, and a shaking correction driver including a plurality of magnets disposed on the lens module, a plurality of coils disposed on the housing, and three or more position sensors, wherein the shaking correction driver is configured to form driving force to move the lens module on a plane perpendicular to an optical axis, wherein at least one of the plurality of magnets faces two or more position sensors, and wherein a position sensor facing one of the plurality of magnets is disposed closer to the optical axis than a position sensor facing an other of the plurality of magnets.

Abstract: A camera module includes a housing having an internal space; a carrier disposed in the internal space; a lens module provided in the carrier; and a first ball member and a second ball member, disposed between the carrier and the housing and spaced apart in a direction, perpendicular to an optical axis, wherein a virtual line connecting a center of a ball included in the first ball member and a center of a ball included in the second ball member passes through the lens module, wherein the lens module includes a first avoidance portion securing space in which at least one of the first ball member or the second ball member is disposed.

Abstract: Provided is a near-infrared ray absorbing article. A near-infrared ray absorbing article of the present invention is capable of preventing a decrease in visible transmittance and near-infrared absorption due to the interaction between a plurality of organic materials forming light-absorbing layers. In addition, the near-infrared ray absorbing article of the present invention has the advantage of being able to be thinner. In addition, the near-infrared ray absorbing article of the present invention has the advantage of excellent mechanical properties such as strength and heat resistance.

Abstract: A storage device includes a memory including a plurality of word lines, a plurality of bit lines and a plurality of memory cells, and a controller configured to control the memory and perform a read retry operation for the memory using a read retry table. The memory includes a special block that stores a read retry table in which a plurality of read retry values are set for each of a plurality of first conditions and each of a plurality of second conditions corresponding to each of the plurality of first conditions.

Abstract: A memory device comprising: a plurality of memory blocks each including a plurality of word lines arranged between a first and second select line, a peripheral circuit performs an erase operation by applying an erase voltage to a source or drain line of a selected memory block, and a control logic controls, in a period in which the erase operation is performed, the peripheral circuit to: sequentially select the plurality of word lines included in the selected memory block at least one by one from a word line closest to the first and second select line to a word line farthest from the first and second select line, apply a first erase permission voltage to the selected word lines, and apply a second erase permission voltage, which have a higher potential level than the first erase permission voltage, to remaining word lines except the selected word lines.

Abstract: Provided is a memory device. The memory device may include a voltage code controller configured to generate a voltage code that generates a program voltage and pass voltages based on a number of times a program loop is performed, and a voltage generator configured to generate the program voltage and the pass voltages in response to the voltage code, transmit the program voltage to a selected word line, and transmit the pass voltages to unselected word lines, wherein the voltage generator is configured to sequentially increase the pass voltage that is applied to the unselected word lines in order of proximity to the selected word line as the number of times a program loop is performed increases.

Abstract: A memory device comprising: a plurality of memory blocks each including a plurality of word lines arranged between a first and second select line, a peripheral circuit performs an erase operation by applying an erase voltage to a source or drain line of a selected memory block, and a control logic controls, in a period in which the erase operation is performed, the peripheral circuit to: sequentially select the plurality of word lines included in the selected memory block at least one by one from a word line closest to the first and second select line to a word line farthest from the first and second select line, apply a first erase permission voltage to the selected word lines, and apply a second erase permission voltage, which have a higher potential level than the first erase permission voltage, to remaining word lines except the selected word lines.

Abstract: A three-dimensional semiconductor device is provided. The three-dimensional device may include substrate; a common electrode layer on the substrate; a word line stack disposed on the common electrode layer, the word line stack having interlayer insulating layers and word lines structures alternately stacked and; and a vertical channel pillar penetrating the word line stack, the vertical channel pillar being electrically connected to the common electrode layer. Each of the word line structures includes a body portion having a first vertical width and an extension portion having a second vertical width greater than the first vertical width. The extension portion abuts the vertical channel pillar.

Abstract: Provided is a memory device. The memory device may include a voltage code controller configured to generate a voltage code that generates a program voltage and pass voltages based on a number of times a program loop is performed, and a voltage generator configured to generate the program voltage and the pass voltages in response to the voltage code, transmit the program voltage to a selected word line, and transmit the pass voltages to unselected word lines, wherein the voltage generator is configured to sequentially increase the pass voltage that is applied to the unselected word lines in order of proximity to the selected word line as the number of times a program loop is performed increases.

Abstract: A nonvolatile memory device includes a block switching unit which transmits an operation signal to a memory cell array, and a voltage sustaining block which provides a voltage to sustain the operation signal to an arbitrary interconnection overlapping the block switching unit.

Abstract: A nonvolatile memory device includes a block switching unit which transmits an operation signal to a memory cell array, and a voltage sustaining block which provides a voltage to sustain the operation signal to an arbitrary interconnection overlapping the block switching unit.

Abstract: A semiconductor device and a method of operating the same are provided. The semiconductor device includes a memory block including a plurality of pages having a plurality of first cells and a plurality of second cells, a circuit group configured to read first cells and second cells of a selected page of the pages, a strobe signal control circuit configured to store source bouncing information generated during a read operation of the first cells of the selected page and output a strobe signal based on stored information, and a control circuit configured to control the circuit group in response to the strobe signal during a read operation of the second cells of the selected page.

Abstract: A semiconductor device and a method of operating the same are provided. The semiconductor device includes a memory block including a plurality of pages having a plurality of first cells and a plurality of second cells, a circuit group configured to read first cells and second cells of a selected page of the pages a strobe signal control circuit configured to store source bouncing information generated during a read operation of the first cells of the selected page and output a strobe signal based on stored information, and a control circuit configured to control the circuit group in response to the strobe signal during a read operation of the second cells of the selected page.

Abstract: A nonvolatile memory includes a memory cell array including a plurality of nonvolatile memory cells connected to bit lines and word lines crossing the bit lines, a voltage driver configured to provide a word line voltage to the word lines and provide a first voltage during a precharging operation and a second voltage during a sensing operation, based on a voltage setting signal, and a page buffer unit configured to adjust a precharging level of a sensing node connected to a bit line of a page included in a selected memory block of the memory cell array using the first voltage and adjust a sensing level of the sensing node using the second voltage.

Abstract: Subject matter disclosed herein relates to a memory device, and more particularly to a nonvolatile memory device having a recess structure and methods of fabricating same.