Patents by Inventor Nan Wang

Nan Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12089331
    Abstract: A metal circuit structure based on a flexible printed circuit (FPC) contains: a substrate, a first metal layer attached on the substrate, a second metal layer formed on the first metal layer, and an intermediate layer defined between the first metal layer and the second metal layer. A first surface of the intermediate layer is connected with the first metal layer, and a second surface of the intermediate layer is connected with the second metal layer. The intermediate layer is made of a first material, the second metal layer is made of a second material, and the first material of the intermediate layer does not act with the second material of the second metal layer.
    Type: Grant
    Filed: May 7, 2021
    Date of Patent: September 10, 2024
    Assignee: APLUS SEMICONDUCTOR TECHNOLOGIES CO., LTD.
    Inventors: Cheng-Neng Chen, Sui-Ho Tsai, Yun-Nan Wang, Chiao-Hui Wang
  • Publication number: 20240288602
    Abstract: A method for jointly estimating soil profile salinity by using time-series remote sensing image is provided. The method includes following. First, soil profile sample (1 meter), EM38-MK2 soil conductivity data, and a long time series monthly average Sentinel-2 satellite remote sensing image data for describing the same object is obtained. Secondly, the salt content of the soil profile with a depth of 1 meter is obtained according to linear regression equation and profile salt content calculation formula. Then, indices based on the time-series monthly average Sentinel-2 images are obtained to serve as independent variables of modeling by using a random forest to screen the independent variables. Finally, the salt contents of soil profile at 1 meter of the sample points are used as dependent variables, a temporal convolution network regression model is used for estimating, and a distribution map of the salt contents of the soil profile of large-space-scale is obtained.
    Type: Application
    Filed: May 5, 2024
    Publication date: August 29, 2024
    Applicant: ZHEJIANG UNIVERSITY
    Inventors: Zhou SHI, Nan WANG, Jie PENG, Jie XUE
  • Publication number: 20240273010
    Abstract: Embodiments of the present disclosure relate to a method, an electronic device, and a computer program product for testing. The method includes: obtaining code modification information, program error information, and test case information. The method further includes: selecting a first test case set associated with code modification records from the test case information according to the program error information. The method further includes: sorting multiple test cases in the first test case set to generate a test strategy for the code modification records. Embodiments of the present disclosure may select the best test case for current code fix to meet different test requirements and reduce the test time.
    Type: Application
    Filed: March 1, 2023
    Publication date: August 15, 2024
    Inventors: Nan Wang, Chi Chen, Yang Wu, Jing Ye
  • Publication number: 20240270719
    Abstract: Disclosed herein are crystalline forms of 2-(4-(4-(aminomethyl)-1-oxo-1,2-dihydrophthalazin-6-yl)-1-methyl-1H-pyrazol-5-yl)-4-chloro-6-cyclopropoxy-3-fluorobenzonitrile free base, pharmaceutically acceptable compositions comprising these crystalline forms, and methods for using these crystalline forms.
    Type: Application
    Filed: February 9, 2024
    Publication date: August 15, 2024
    Inventors: Michal Achmatowicz, Svitlana Kulyk, Christopher Ronald Smith, Nan Wang, Harsh Shah, Tian Xie, Qi Gao
  • Patent number: 12057419
    Abstract: A method for forming a chip structure is provided. The method includes providing a semiconductor substrate, a first conductive line, and a first dielectric layer. The method includes forming a first conductive layer over the first dielectric layer. The method includes forming a second conductive layer over the first conductive layer. The method includes forming a second dielectric layer over the second conductive layer and the first conductive layer. The method includes forming a first through hole passing through the second dielectric layer, the first conductive layer, and the first dielectric layer. The method includes forming a first conductive structure in and over the first through hole.
    Type: Grant
    Filed: July 26, 2022
    Date of Patent: August 6, 2024
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Chih-Fan Huang, Mao-Nan Wang, Hui-Chi Chen, Dian-Hau Chen, Yen-Ming Chen
  • Patent number: 12052344
    Abstract: A method for electing a representative node device for a blockchain system includes: receiving IP address information of a first node device, the first node device being in a candidate state for a representative node device; receiving, from the first node device, an IP address obtaining request for requesting IP address information of a representative node device; when the first node device is determined to be a representative node device of the blockchain system elected in a current election process, transmitting, to the first node device, an IP address list comprising IP address information of representative node devices elected in the current election process; and when the first node device is determined not to be a representative node device of the blockchain system elected in the current election process, skipping the IP address obtaining request.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: July 30, 2024
    Assignee: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Rui Guo, Maocai Li, Zongyou Wang, Haitao Tu, Li Kong, Kaiban Zhou, Changqing Yang, Nan Wang, Yong Ding, Yifang Shi
  • Patent number: 12051737
    Abstract: Semiconductor device and fabrication method are provided by providing initial fins discretely arranged on a substrate; forming an isolation structure on the substrate; forming a connecting layer on sidewalls of the initial fins and between adjacent initial fins; forming a dummy gate structure across the initial fins and the connecting layer on the substrate, covering sidewalls of the connecting layer and a portion of a top surface of the initial fins; forming grooves in the initial fins on both sides of the dummy gate structure, and forming source and drain doped layers in the grooves; forming a dielectric layer on the substrate, covering sidewalls of the dummy gate structure and the source and drain doped layers, that a top surface of the dielectric layer is flush with a top surface of the dummy gate structure; and removing the dummy gate structure to form a gate structure.
    Type: Grant
    Filed: August 27, 2021
    Date of Patent: July 30, 2024
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Nan Wang
  • Publication number: 20240246521
    Abstract: A parking brake control method for an electromechanical brake system of an urban rail vehicle includes an operation instruction mechanism, a brake control mechanism, an electromechanical actuating mechanism and an auxiliary mechanism. The operation instruction mechanism outputs a control signal to the brake control mechanism to drive the action of the electromechanical actuating mechanism so as to achieve braking application and relief of the vehicle. The auxiliary mechanism is used for a redundant power supply system of a brake system. The auxiliary mechanism further includes a zero-speed state monitoring mechanism for monitoring a zero-speed state of the vehicle and an energy storage battery mechanism for providing a backup power supply. The parking brake control method enables an urban rail vehicle using an electromechanical brake system to achieve brake application and relief in a parked state and achieve brake application and relief in a dormant state of the urban rail vehicle.
    Type: Application
    Filed: September 6, 2022
    Publication date: July 25, 2024
    Applicant: CRRC Nanjing Puzhen Co., Ltd.
    Inventors: Rui SHI, Yifan LIANG, Meng SHI, Xiaowei CHEN, Shenyue HUANG, Nan WANG
  • Publication number: 20240248743
    Abstract: An example method of provisioning a virtual desktop deployment includes: receiving, at an admin service executing on first virtualized infrastructure, deployment information for the virtual desktop deployment, the deployment information including a capacity and an image; providing the deployment information from the admin service to a lifecycle manager (LCM) executing on second virtualized infrastructure; provisioning, by the LCM in cooperation with a provider of a third virtualized infrastructure, virtual machines (VMs) based on the capacity and the image; providing, by the LCM to a first VM of the VMs, connection information for a message cluster in a fourth virtualized infrastructure; and connecting, by a virtual desktop (VD) agent executing in the first VM, to the message cluster based on the connection information.
    Type: Application
    Filed: January 20, 2023
    Publication date: July 25, 2024
    Inventors: Mahadevan Vishwanth IYER, Julio Cesar FERNANDES CORREA, Kushal BHANDARI, Nan WANG, Dinesh M SHANMUGAM
  • Patent number: 12048133
    Abstract: Semiconductor structures is provided. The semiconductor structure includes a semiconductor substrate having at least one first region, a plurality of second regions and a plurality of third regions; at least one second fin formed on one second region of the plurality of second region; at least one third fin formed on one third region of the plurality of third regions; a first epitaxial layer formed in the at least one first fin; and a second epitaxial layer formed in the at least one second fin and the at least one third fin.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: July 23, 2024
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Nan Wang
  • Patent number: 12039805
    Abstract: The present invention provides an offline handwriting individual recognition system and method. The method comprises: scanning the suspicious handwriting to obtain a first white light image and a first three-dimensional image, and scanning the sample handwriting to obtain a second white light image and a second three-dimensional image; pre-processing the first white light image and the second white light image to obtain a first pre-processed image and a second pre-processed image; extracting a first skeleton image and a second skeleton image from the first pre-processed image and the second pre-processed image; obtaining a first writing trajectory and a second writing trajectory according to the first skeleton image and the second skeleton image; extracting a first dynamic feature, a first three-dimensional feature, and a second dynamic feature, a second three-dimensional feature; processing to obtain a correlation coefficient, and obtaining an individual recognition result.
    Type: Grant
    Filed: November 29, 2019
    Date of Patent: July 16, 2024
    Inventors: Xiaohong Chen, Xu Yang, Yachen Wang, Nan Wang, Qimeng Lu
  • Publication number: 20240232058
    Abstract: Techniques for generating a test case involve: acquiring a first set of coding sequences representing a first set of test cases selected from a test case set for product testing. A test element in a test case of the test case set is coded based on the position of the test element in the element hierarchy of the test case set. The techniques further involve: generating a second set of coding sequences by performing a random variation related to at least one test element with respect to the first set of coding sequences; and generating a second set of test cases based on the second set of coding sequences. Accordingly, product testing and development may be automated, and the case set may change dynamically in a way that is adapted to product development while significantly reducing the overhead of designing and reviewing test cases throughout the product life cycle.
    Type: Application
    Filed: April 25, 2023
    Publication date: July 11, 2024
    Inventors: Chi Chen, Nan Wang, Jing Ye
  • Publication number: 20240236869
    Abstract: Disclosed herein are related to a device. The device can include a wireless communication interface and one or more processors. The wireless communication interface can transmit data to a remote device. The one or more processors can determine a particular control state from a plurality of control states according to sensor data received from a plurality of sensors. The control states can be for meeting at least one of a specific absorption rate (SAR) or power density (PD) for operation of the wireless communication interface. The one or more processors can control operation of the at least one wireless communication interface according to the particular control state.
    Type: Application
    Filed: January 11, 2023
    Publication date: July 11, 2024
    Inventors: Ding Li, Siddharth Ray, Songping Wu, Jin Yang, Wei Sun, Peter Eli Renner, Shu Zhang, Nan Wang
  • Patent number: 12019044
    Abstract: Defect detection method for a semi-conducting bedding layer of a power cable includes: obtaining a length parameter, a corrugation pitch parameter, radius parameters, and a thickness parameter of a power cable; obtaining a first resistance value between a shield and a corrugated sheath, and calculating a second resistance value of the shield based on the length parameter and the corrugation pitch parameter; calculating a radial resistance value of the semi-conducting bedding layer based on the first resistance value and the second resistance value; determining a contact angle of a critical point of contact between the corrugated sheath and the semi-conducting bedding layer based on the radius parameters and the thickness parameter; calculating volume resistivity of the semi-conducting bedding layer based on the radial resistance value and the contact angle; and comparing the volume resistivity with a preset evaluation parameter to obtain a defect detection result of the semi-conducting bedding layer.
    Type: Grant
    Filed: January 21, 2022
    Date of Patent: June 25, 2024
    Assignees: Electric Power Science & Research Institute of State Grid Tianjin Electric Power Company, State Grid Tianjin Electric Power Company
    Inventors: Shengchen Fang, Pengxian Song, Xu Li, Yang Yu, Mingzheng Zhu, Zhengzheng Meng, Fengzheng Zhou, Xiaohui Zhu, Lei Yang, Jun Zhang, Chun He, Nan Wang, Ke Xu, Qinghua Tang, Chi Zhang, Haoming Wang, Longji Li, Cheng Sun, Wei Fan
  • Patent number: 12015067
    Abstract: A semiconductor structure and a fabrication method are provided. The semiconductor structure includes: a base substrate; a gate structure on the base substrate, including a first portion in a first region and a second portion in a second region; and one or more stop layers on the base substrate and located in the first portion of the gate structure in the first region. A length of the first portion of the gate structure in the first region is larger than a length of the second portion of the gate structure in the second region.
    Type: Grant
    Filed: April 15, 2021
    Date of Patent: June 18, 2024
    Assignees: Semiconductor Manufacturing International (Shanghai) Corporation, Semiconductor Manufacturing International (Beijing) Corporation
    Inventor: Nan Wang
  • Publication number: 20240181076
    Abstract: The present invention relates to the field of biotechnology drugs. In particular, provided in the present invention is an antibody-drug conjugate (ADC) complex based on a complementary and paired nucleic acid skeleton. The ADC complex is a polymer formed by means of compounding n monomers having complementary and paired nucleic acid skeletons, wherein the polymer contains: m “targeting monomers”, which are cell-surface-targeting antibodies or proteins linked to nucleic acid single strands, and k “drug monomers”, which are drugs (toxin payload) linked to nucleic acid single strands, n is a positive integer of 2-8, m is a positive integer of 1-3 and m<n, and k is a positive integer of 1?(n-m). In the polymer, each nucleic acid single strand of the monomer is complemented with a nucleic acid single strand of the other 1-3 monomers to form a complementary and paired double strand by means of base complementation, so that a complementary and paired nucleic acid skeleton structure is formed.
    Type: Application
    Filed: March 31, 2022
    Publication date: June 6, 2024
    Applicant: ASSEMBLY MEDICINE, LLC.
    Inventors: Liujuan Zhou, Chan Cao, Nan Wang, Liqiang Pan, James Jeiwen Chou
  • Publication number: 20240175839
    Abstract: Defect detection method for a semi-conducting bedding layer of a power cable includes: obtaining a length parameter, a corrugation pitch parameter, radius parameters, and a thickness parameter of a power cable; obtaining a first resistance value between a shield and a corrugated sheath, and calculating a second resistance value of the shield based on the length parameter and the corrugation pitch parameter; calculating a radial resistance value of the semi-conducting bedding layer based on the first resistance value and the second resistance value; determining a contact angle of a critical point of contact between the corrugated sheath and the semi-conducting bedding layer based on the radius parameters and the thickness parameter; calculating volume resistivity of the semi-conducting bedding layer based on the radial resistance value and the contact angle; and comparing the volume resistivity with a preset evaluation parameter to obtain a defect detection result of the semi-conducting bedding layer.
    Type: Application
    Filed: January 21, 2022
    Publication date: May 30, 2024
    Inventors: Shengchen Fang, Pengxian Song, Xu Li, Yang Yu, Mingzheng Zhu, Zhengzheng Meng, Fengzheng Zhou, Xiaohui Zhu, Lei Yang, Jun Zhang, Chun He, Nan Wang, Ke Xu, Qinghua Tang, Chi Zhang, Haoming Wang, Longji Li, Cheng Sun, Wei Fan
  • Publication number: 20240169975
    Abstract: A speech processing method, performed by an electronic device, includes determining a first speech feature and a first text bottleneck feature based on to-be-processed speech information, determining a first combined feature vector based on the first speech feature and the first text bottleneck feature, inputting the first combined feature vector to a trained unidirectional long short-term memory (LSTM) model, performing speech processing on the first combined feature vector to obtain speech information after noise reduction, and transmitting the obtained speech information after noise reduction to another electronic device for playing.
    Type: Application
    Filed: January 29, 2024
    Publication date: May 23, 2024
    Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Yan Nan WANG, Jun Huang
  • Patent number: 11983535
    Abstract: The invention provides an artificial intelligence computing device and a related product. The artificial intelligence computing device is used for executing machine learning computation. According to the device of the invention, for the instructions in the more than two instruction sets forming the loop body, the same operation code in the operation code storage area is used for the repeated instructions, so that the storage space of the operation code is saved, the code amount of each instruction in the instruction set in the second time slice can be reduced, the instruction storage space can also be saved, and the operation efficiency is improved.
    Type: Grant
    Filed: March 20, 2020
    Date of Patent: May 14, 2024
    Assignee: CAMBRICON TECHNOLOGIES CORPORATION LIMITED
    Inventors: Nan Wang, Xiaobing Chen, Yongzhe Sun, Yongwei Zhao
  • Publication number: 20240153123
    Abstract: The present invention discloses an isogeometric analysis method based on a geometric reconstruction model comprising steps of: dividing boundaries of a CAD model into triangular patches or directly based on point cloud data, generating a closed regular embedded domain, dividing the embedded domain into regular sub-domains, dividing the elements according to a positional relationship between the boundaries of the triangular patches/points and the elements into trimmed elements and untrimmed elements; calculating a minimum directional distance from each vertex of a trimmed element to a triangular patch near the trimmed element; using the minimum directional distance to divide the untrimmed elements into real and virtual elements; using the minimum directional distance as a level set function value, and using a marching tetrahedra algorithm to reconstruct a displayed geometric model based on the regular embedded domain; after obtaining the level set function value, calculating the level set function value of a G
    Type: Application
    Filed: November 24, 2020
    Publication date: May 9, 2024
    Inventors: Yingjun WANG, Jinghui LI, Zhencong LI, Jiancheng ZHANG, Nan WANG