Abstract: An integrated circuit includes a first set of devices, a set of metal layers and a header circuit. The first set of devices are configured to operate on a first supply voltage, and are located on a first layer of the integrated circuit. The set of metal layers are above the first layer, and includes a first metal layer and a second metal layer. The first metal layer extends in at least a first direction and a second direction. The header circuit is above the first set of devices. At least a portion of the header circuit is positioned between the first metal layer and the second metal layer. The header circuit is configured to provide the first supply voltage to the first set of devices, and is configured to be coupled to a first voltage supply having the first supply voltage.

Abstract: The invention discloses a composite negative active material ball, which includes an electrically conductive metal core, which is substantially without pores, and a plurality of silicon or silicon compound particles, which is distributed on the surface of electrically conductive metal core. Partial volume of the silicon or silicon compound particles are embedded into the electrically conductive metal core. The silicon or silicon compound particles can maintain the well contact of the electrically conductive metal core during alloying/dealloying with lithium. Therefore, the composite negative active material ball have good electrical transfer characteristics.

Abstract: The invention provides a lithium secondary battery including an ionic provider added to the positive electrode. The ionic provider does not involve in the electrochemical reaction of the lithium secondary battery during charging and discharging. The ionic provider can absorb thermal energy caused by the rising temperature of the lithium secondary battery to release the reactive anionic group. The reactive anionic group will react with the positive active material to reduce the reversibility of the positive active material. Also, the positive active material will become to a lower energy state from a higher energy state with lithium-ion extraction to effectively suppress the thermal runaway of the lithium secondary battery.

Abstract: The invention provides a lithium secondary battery including an ionic provider added to the positive electrode and/or a lithium receiver added to the negative electrode. The ionic provider and/or the ionic provider does not involve in the electrochemical reaction of the lithium secondary battery during charging and discharging. The ionic provider can absorb thermal energy caused by the rising temperature of the lithium secondary battery to release the reactive cation. The reactive cation will insert the location with lithium-ion extraction of the positive electrode to make the lattice structure of the positive active material be stable. Therefore, the release of atomic oxygen is avoided. The lithium receiver receives the diffused lithium from the negative electrode to reduce the lithium concentration of the negative electrode. Therefore, it will present a stable state with lower energy to effectively suppress the thermal runaway.

Abstract: A suppression element includes a passivation composition supplier and a polar solution supplier. The passivation composition supplier is capable of releasing a metal ion (A), selected from a non-lithium alkali metal ion, an alkaline earth metal ion or a combination thereof, and an aluminum etching ion (B). The polar solution of the polar solution supplier carries the metal ion (A) and the aluminum etching ion (B) to an aluminum current collector to etched through thereof, and the metal ion (A) and the aluminum ion, generated during the etching, are seeped into the electrochemical reaction system. Then, the positive active material is transferred to a crystalline state with lower electric potential and lower energy, and the negative active material is transferred y to an inorganic polymer state with higher electric potential and lower energy to prevent the thermal runaway from occurring.

Abstract: A method for manufacturing a semiconductor device is provided. The method comprises determining a dimensional quantity of a layout pattern having an angle relative to grid lines of a minimum grid. The minimum grid may be defined by a first quantity associated with a first direction and a second quantity associated with a second direction perpendicular to the first direction. The determination of the dimensional quantity of the layout pattern is based on the first quantity, the second quantity and the angle of the layout pattern relative to the grid lines of the minimum grid.

Abstract: A semiconductor structure includes a power grid layer (including a first metallization layer) and a set of cells. The first metallization layer includes: conductive first and second portions which provide correspondingly a power-supply voltage and a reference voltage, and which have corresponding long axes oriented substantially parallel to a first direction; and conductive third and fourth portions which provide correspondingly the power-supply voltage and the reference voltage, and which have corresponding long axes oriented substantially parallel to a second direction substantially perpendicular to the first direction. The set of cells is located below the PG layer. Each cell is monostate cell which lacks an input signal and has a single output state. The cells are arranged to overlap at least one of the first and second portions in a repeating relationship with respect to at least one of the first or second portions of the first metallization layer.

Abstract: The present disclosure includes an omnidirectional dielectric resonator antenna (DRA). The omnidirectional DRA comprises a substrate, a dielectric, and a planar antenna positioned between the substrate and the dielectric. The planar antenna comprises a central planar feed positioned on the substrate. The planar antenna also comprises a plurality of feed lines coupled to, and extending outward from, the central planar feed. The planar antenna also comprises a plurality of arms coupled to the plurality of feed lines. Each arm extends from a corresponding feed line.

Abstract: Various layouts for conductive interconnects in the conductor layers in an integrated circuit are disclosed. Some or all of the conductive interconnects are included in a power delivery system. In general, the conductive interconnects in a first conductor layer are arranged according to an orthogonal layout and the conductive interconnects in a second conductor layer are arranged according to a non-orthogonal layout. Conductive stripes in a transition conductor layer positioned between the first and the second conductor layers electrically connect the conductive interconnects in the first conductor layer to the conductive interconnects in the second conductor layer.

Abstract: A method of forming a semiconductor device includes: providing a first circuit having a plurality of circuit cells; analyzing a loading capacitance on a first pin cell connecting a first circuit cell and a second circuit cell in the plurality of circuit cells to determine if the loading capacitance of the first pin cell is larger than a first predetermined capacitance; replacing the first pin cell by a second pin cell for generating a second circuit when the loading capacitance is larger than the first predetermined capacitance, wherein the second pin cell is different from the first pin cell; and generating the semiconductor device according to the second circuit.

Abstract: The present disclosure provides a routing structure. The routing structure includes a substrate having a boundary and a first conductive trace configured to be coupled to a first conductive pad disposed within the boundary of the substrate. The first conductive trace is inclined with respect to the boundary of the substrate.

Abstract: An integrated circuit includes a cell layer including a first cell and a second cell, a first metal layer over the cell layer and having a first conductive feature, a second metal layer over the first metal layer and having a second conductive feature, and a first via between the first metal layer and the second metal layer and connecting the first conductive feature to the second conductive feature. The first conductive feature spans over a boundary between the first and second cells, and has a lengthwise direction along a first direction. The second conductive feature spans over the boundary between the first and second cells, and has a lengthwise direction along a second direction that is perpendicular to the first direction.

Abstract: An integrated circuit includes a gated circuit configured to operate on a first or second voltage, a header circuit, a first power rail and a second power rail on a back-side of a wafer, a third power rail on the back-side of the wafer, and a fourth power rail on a front-side of the wafer. The first and second power rail extend in a first direction, and are separated from each other in a second direction. The third power rail is between the first and second power rail in the second direction. The third power rail is configured to supply the second voltage to the gated circuit. The fourth power rail includes a first set of conductors extending in the second direction. Each of the first set of conductors is configured to supply a third voltage to the header circuit, and is separated from each other in the first direction.

Abstract: In non-limiting examples of the present disclosure, systems, methods and devices for executing gesture operations are provided. A touchpad gesture manager and a touchscreen gesture manager may be maintained. Both managers may comprise the identities of gesture operations and conditions for executing the gesture operations. The conditions for one or more touchscreen gesture operations may be the same as the conditions for one or more corresponding touchpad gesture operations. The gestures that have same conditions for the touchscreen and the touchpad may comprise application window operations and virtual desktop transition operations. In some examples, one or more display elements, animations, or intermediate operations may be different in executing the touchscreen operations than for executing the touchpad operations.

Abstract: The invention discloses a lithium electrode. The electrically conductive structure layer has a recess with one-side opening, and the lithium metal layer is disposed on the bottom of the recess. The solid electrolyte layer and the electrolyte storage layer are disposed thereon sequentially. When the lithium metal is plated, the plated lithium metal is restricted by the solid electrolyte layer to push and compress the electrolyte storage layer. Therefore, the growth of the lithium dendrites is limited efficiently. The penetration through issue of the lithium dendrites will not be occurred so that the safety of the lithium metal battery is improved greatly.

Abstract: Various layouts for conductive interconnects in the conductor layers in an integrated circuit are disclosed. Some or all of the conductive interconnects are included in a power delivery system. In general, the conductive interconnects in a first conductor layer are arranged according to an orthogonal layout and the conductive interconnects in a second conductor layer are arranged according to a non-orthogonal layout. Conductive stripes in a transition conductor layer positioned between the first and the second conductor layers electrically connect the conductive interconnects in the first conductor layer to the conductive interconnects in the second conductor layer.

Abstract: An IC device includes first and second cells adjacent each other and over a substrate. The first cell includes a first IO pattern along a first track among a plurality of tracks in a first metal layer, the plurality of tracks elongated along a first axis and spaced from each other along a second axis. The second cell includes a plurality of conductive patterns along corresponding different tracks among the plurality of tracks in the first metal layer, each of the plurality of conductive patterns being an IO pattern of the second cell or a floating conductive pattern. The first metal layer further includes a first connecting pattern along the first track and connects the first IO pattern and a second IO pattern of the second cell. The second IO pattern is one of the plurality of conductive patterns of the second cell and is along the first track.

Abstract: This invention provides a thermal runaway suppression element for lithium batteries and the related applications. The thermal runaway suppression element includes a composite salt layer provided by a eutectic mixture containing at least two single inorganic salts. The composite salt layer has a melting point between 90 to 150° C. At least one of the single inorganic salts comprises a cation, which is an amphoteric metal ion or an alkali metal ion. The thermal runaway suppression element is disposed inside or outside the lithium battery. When the temperature of the lithium battery reaches to 90 to 150° C., the composite slat layer will be molten and reacts with the electrochemical reaction system to passivate the active materials and decrease ionic and electronic conductivity. Therefore, the thermal runaway event and its derived problem are efficiently solved.

Abstract: The invention discloses a recycling method for oxide-based solid electrolyte with original phase, method of fabricating lithium battery and green battery thereof, which is adapted to recycle the solid-state or quasi-solid lithium batteries after discard. The oxide-based solid electrolyte is only used as an ion transport pathway, and does not participate in the insertion and extraction of lithium ions during charge and discharge cycles. Its crystal structure dose not be destroyed. Therefore, the original phase recycle of the oxide-based solid electrolyte is achieved without damage the structure or materials. The recycled the oxide-based solid electrolyte can be re-used to reduce the manufacturing cost of the related lithium battery.

Abstract: The present disclosure relates to a horizontal composite electricity supply structure, which comprises a first insulation layer, a second insulation layer, two electrically conductive layers, and a plurality of electrochemical system element groups. The two electrically conductive layers are disposed on the first and second insulation layers, respectively. The electrochemical system element groups are disposed between the first insulation layer and the second insulation layer, and connected in series and/or in parallel via the electrically conductive layers. The electrochemical system element group is formed by several serially connected electrochemical system elements. Each electrochemical system element includes a package layer on the sidewall, so that their electrolyte systems do not circulate with one another. Thereby, the high voltage produced by connection will not influence any single electrochemical system element nor decompose their respective electrolyte systems.