Patents by Inventor Naoki Shimizu

Naoki Shimizu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150228320
    Abstract: According to one embodiment, a memory includes a memory cell array with banks, each bank including rows, a first word lines provided in corresponding to the rows, an address latch circuit which latches a first row address signal, a row decoder which activates one of the first word lines, and a control circuit which is configured to execute a first operation which activates one of the banks based on a bank address signal when a first command is loaded, and a second operation which latches the first row address signal in the address latch circuit, and execute a third operation which activates one of the first word lines by the row decoder based on a second row address signal and the first row address signal latched in the address latch circuit when a second command is loaded after the first command.
    Type: Application
    Filed: April 21, 2015
    Publication date: August 13, 2015
    Inventors: Yutaka SHIRAI, Naoki SHIMIZU, Kenji TSUCHIDA, Yoji WATANABE, Ji Hyae BAE, Yong Ho KIM
  • Patent number: 9042198
    Abstract: According to one embodiment, a memory includes a memory cell array with banks, each bank including rows, a first word lines provided in corresponding to the rows, an address latch circuit which latches a first row address signal, a row decoder which activates one of the first word lines, and a control circuit which is configured to execute a first operation which activates one of the banks based on a bank address signal when a first command is loaded, and a second operation which latches the first row address signal in the address latch circuit, and execute a third operation which activates one of the first word lines by the row decoder based on a second row address signal and the first row address signal latched in the address latch circuit when a second command is loaded after the first command.
    Type: Grant
    Filed: September 6, 2013
    Date of Patent: May 26, 2015
    Inventors: Yutaka Shirai, Naoki Shimizu, Kenji Tsuchida, Yoji Watanabe, Ji Hyae Bae, Yong Ho Kim
  • Patent number: 9035984
    Abstract: A printing system and printing apparatus are provided with improvements in the image quality of an image formed on a printing medium, a peel off region (PO) wherein a transfer layer of a transfer film is not transferred is set corresponding to a card, modified printing data is generated by modifying a gray-scale value of printing data inside a region that is larger than the PO region by predetermined dimensions and including the PO region in the printing data of Y, M, C and Bk into a gray-scale value of 0, an image is formed on the transfer film by heating a thermal head for an image formation panel of an ink ribbon according to the modified printing data. The transfer layer is peeled off by heating the thermal head for a peel off panel of the ink ribbon according to position information of the PO region.
    Type: Grant
    Filed: July 30, 2014
    Date of Patent: May 19, 2015
    Assignee: NISCA CORPORATION
    Inventors: Yuichi Aihara, Naoki Shimizu, Tomohisa Koike
  • Patent number: 8988855
    Abstract: A ceramic electronic component includes a ceramic body and an outer electrode. The outer electrode is disposed on the ceramic body. The outer electrode includes a first conductive layer and a second conductive layer. The first conductive layer includes a resin, a first metal component, and a second metal component having a higher melting point than the first metal component. The second conductive layer is disposed on the first conductive layer. The second conductive layer is includes a plating film. An alloy particle containing the first metal component and the second metal component protrudes to the second conductive layer side from a surface of the first conductive layer.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: March 24, 2015
    Assignee: Murata Manufacturing Co., Ltd.
    Inventors: Kiyoyasu Sakurada, Kota Zenzai, Hisayoshi Omori, Takashi Kanayama, Shinji Otani, Naoki Shimizu, Seiji Katsuta
  • Publication number: 20150063017
    Abstract: A semiconductor memory device is capable of executing a first mode having a first latency and a second mode having a second latency longer than the first latency. The semiconductor memory device includes: a pad unit configured to receive an address and a command from an outside; a first delay circuit configured to delay the address by a time corresponding to the first latency; a second delay circuit including shift registers connected in series and configured to delay the address by a time corresponding to a difference between the first latency and the second latency; and a controller configured to use the first delay circuit and the second delay circuit when executing the second mode.
    Type: Application
    Filed: March 7, 2014
    Publication date: March 5, 2015
    Inventors: Naoki SHIMIZU, Ji Hyae BAE
  • Publication number: 20150063016
    Abstract: A semiconductor memory device includes: banks each including a memory cell array; word lines connected to rows in each of the banks; and an address latch circuit configured to latch a full address specifying one of the word lines, the full address including a first address and a second address. The address latch circuit receives a first command and a second command to latch the first address and the second address in accordance with the first command and the second command, respectively. Paths for the first address and the second address are configured to be separate from each other.
    Type: Application
    Filed: March 7, 2014
    Publication date: March 5, 2015
    Inventor: Naoki SHIMIZU
  • Publication number: 20150063015
    Abstract: A semiconductor memory device includes: banks each including a memory cell array; word lines connected to rows of each of the banks; an address latch circuit configured to latch a full address for specifying one of the word lines, the full address including a first address and a second address; and a control circuit configured to ignore a reset operation for the first address as a target of a set operation, and overwrite the first address in accordance with the set operation when receiving a first command for specifying a reset operation for a bank and a set operation for the first address.
    Type: Application
    Filed: March 7, 2014
    Publication date: March 5, 2015
    Inventor: Naoki SHIMIZU
  • Publication number: 20150035932
    Abstract: A printing system and printing apparatus are provided with improvements in the image quality of an image formed on a printing medium, a peel off region (PO) wherein a transfer layer of a transfer film is not transferred is set corresponding to a card, modified printing data is generated by modifying a gray-scale value of printing data inside a region that is larger than the PO region by predetermined dimensions and including the PO region in the printing data of Y, M, C and Bk into a gray-scale value of 0, an image is formed on the transfer film by heating a thermal head for an image formation panel of an ink ribbon according to the modified printing data. The transfer layer is peeled off by heating the thermal head for a peel off panel of the ink ribbon according to position information of the PO region.
    Type: Application
    Filed: July 30, 2014
    Publication date: February 5, 2015
    Applicant: NISCA CORPORATION
    Inventors: Yuichi AIHARA, Naoki SHIMIZU, Tomohisa KOIKE
  • Publication number: 20150015911
    Abstract: An information processing device, separate from an image processing apparatus, which controls the image processing apparatus and includes a display unit, a volatile memory store image data, and a nonvolatile memory. The information processing device also includes an image data acquisition unit that acquires image data processed by the image processing apparatus page by page, an image data storage processor that compares the image data acquired by the image data acquisition unit for each page with the image data stored in the volatile memory and to store the image data in either the volatile memory or the nonvolatile memory based on comparison, a display image generator that generates a display image to be displayed on the display unit based on the image data for each page stored in either the volatile memory or the nonvolatile memory, and a display image output controller that displays the display image generated by the display image generator on the display unit.
    Type: Application
    Filed: June 27, 2014
    Publication date: January 15, 2015
    Inventor: Naoki SHIMIZU
  • Publication number: 20140350845
    Abstract: Disclosed is technology for providing guidance in a manner that facilitates travel along a guidance route when there is a road which has a carpool lane. A navigation device (100) is provided with: a current-location calculation means for calculating the current location of a moving body; a recommended route search means for searching for a recommended route to a destination; a guidance-point setting means for setting a guidance point in the recommended route; and a guidance information notification means for notifying predetermined guidance information when a moving body reaches a set guidance point. When predetermined conditions are fulfilled, the guidance-point setting means sets in a road which has a carpool lane a guidance point for notifying information for guidance from said road to a branch road, before the guidance point that would be set in a road that does not have a carpool lane.
    Type: Application
    Filed: August 1, 2014
    Publication date: November 27, 2014
    Inventors: Arata HAYASHI, Naoki SHIMIZU
  • Patent number: 8882238
    Abstract: A coating device is provided with: a plurality of inkjet heads (31) staggered to cover an area to be coated in a width direction of a long-roll supporting body (10); a pressure adjusting mechanism (40) for adjusting the back-pressure of the coating solution to be applied from inkjet heads (31); a plurality of solution feeding pipes (43) for supplying the coating solution from the pressure adjusting mechanism (40) to inkjet heads (31); and storage tank (50) for storing the coating solution, wherein the feeding volumes of the coating solution from the solution feeding pipes (43) are adjusted equal (i.e. flow resistances of the piping are made equal), so that equal back-pressures are applied to the coating solution to be jetted from the inkjet heads.
    Type: Grant
    Filed: May 15, 2008
    Date of Patent: November 11, 2014
    Assignee: Konica Minolta Opto, Inc.
    Inventors: Daiki Minamino, Tadatsugu Okumura, Ichiro Miyagawa, Tomohiko Sakai, Naoki Shimizu, Kiyoshi Akagi
  • Publication number: 20140286115
    Abstract: According to one embodiment, a memory includes a memory cell array with banks, each bank including rows, a first word lines provided in corresponding to the rows, an address latch circuit which latches a first row address signal, a row decoder which activates one of the first word lines, and a control circuit which is configured to execute a first operation which activates one of the banks based on a bank address signal when a first command is loaded, and a second operation which latches the first row address signal in the address latch circuit, and execute a third operation which activates one of the first word lines by the row decoder based on a second row address signal and the first row address signal latched in the address latch circuit when a second command is loaded after the first command.
    Type: Application
    Filed: September 6, 2013
    Publication date: September 25, 2014
    Inventors: Yutaka SHIRAI, Naoki SHIMIZU, Kenji TSUCHIDA, Yoji WATANABE, Ji Hyae BAE, Yong Ho KIM
  • Patent number: 8831876
    Abstract: Disclosed is technology for providing guidance in a manner that facilitates travel along a guidance route when there is a road which has a carpool lane. A navigation device (100) is provided with: a current-location calculation means for calculating the current location of a moving body; a recommended route search means for searching for a recommended route to a destination; a guidance-point setting means for setting a guidance point in the recommended route; and a guidance information notification means for notifying predetermined guidance information when a moving body reaches a set guidance point. When predetermined conditions are fulfilled, the guidance-point setting means sets in a road which has a carpool lane a guidance point for notifying information for guidance from said road to a branch road, before the guidance point that would be set in a road that does not have a carpool lane.
    Type: Grant
    Filed: December 27, 2010
    Date of Patent: September 9, 2014
    Assignee: Clarion Co., Ltd.
    Inventors: Arata Hayashi, Naoki Shimizu
  • Publication number: 20140192449
    Abstract: Provided is a short-circuit protection circuit having a mask circuit which can reduce a turn-on loss of a voltage-driven type semiconductor device during turn-on operation of the voltage-driven type semiconductor device. A mask circuit (21) is provided to suspend operation of an NLU circuit (24) during turn-on operation of a voltage-driven semiconductor device (1). Accordingly, the voltage-driven type semiconductor device (1) can be driven sufficiently so that a turn-on loss can be reduced.
    Type: Application
    Filed: July 10, 2012
    Publication date: July 10, 2014
    Applicant: FUJI ELECTRIC CO., LTD.
    Inventor: Naoki Shimizu
  • Publication number: 20140157372
    Abstract: The invention is concerning to an image forming apparatus connected to a mobile terminal via a wireless network includes: an authentication unit configured to perform authentication of the mobile terminal using user authentication information and identification information of the mobile terminal that are registered in advance to the image forming apparatus; a requesting unit configured to request to acquire information stored in the mobile terminal; and an acquiring unit configured to acquire the information from the mobile terminal in response to the request by the requesting unit.
    Type: Application
    Filed: November 20, 2013
    Publication date: June 5, 2014
    Inventor: Naoki Shimizu
  • Patent number: 8643339
    Abstract: A battery pack includes a status detection unit for detecting a status of a battery; a switch unit for interrupting a discharging path of the battery; a notification unit for notifying a user of the status of the battery; an operation unit operable by the user; and control unit for opening and closing the switch unit. The control unit is configured to have the switch unit interrupt the discharging path of the battery when the status of the battery detected by the status detection unit is abnormal. Further, the control unit is configured to have the notification unit notify the user of the availability to restart a discharging operation and close the switch unit in response to an operation signal inputted from the operation unit to make the battery pack dischargeable when the status of the battery detected by the status detection unit is recovered from the abnormal status.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: February 4, 2014
    Assignee: Panasonic Corporation
    Inventors: Norihiro Iwamura, Motoharu Muto, Masaki Ikeda, Naoki Shimizu, Atsumasa Kubota, Masaaki Okada, Tatsuya Miwa
  • Publication number: 20130337298
    Abstract: The battery pack includes a battery cell for supplying electric power to an external device connected thereto, a temperature sensor for sensing a temperature of a place on which the temperature sensor is arranged, a switch member for making and breaking an electric path between the external device and the battery cell; and a controller configured to control the switch member to turn on and off according to the temperature sensed by the temperature sense. The temperature sensor is arranged on a position between the battery cell and the switch member so as to be affected by the temperatures of both of the battery cell and the switch member.
    Type: Application
    Filed: November 11, 2011
    Publication date: December 19, 2013
    Applicant: PANASONIC CORPORATION
    Inventors: Norihiro Iwamura, Masaaki Sakaue, Masaki Ikeda, Naoki Shimizu
  • Patent number: 8600431
    Abstract: A connected-device-information managing unit that obtains connection information that is predetermined information for connection from a connected device as a communication counterpart, holds it, and, when a communication process is completed normally, holds a parameter value used in the communication process as normal connection information which is a part of the connection information for each connected device, and a hands-free controller that performs a communication process based on the connection information. When a communication process is started with a device that normal connection information has been already stored in the connected-device-information managing unit, the hands-free controller sets a parameter based on the normal connection information to perform the communication process.
    Type: Grant
    Filed: January 15, 2009
    Date of Patent: December 3, 2013
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshihiro Otsuka, Naoki Shimizu
  • Publication number: 20130106560
    Abstract: A ceramic electronic component includes a ceramic body, an inner electrode, an outer electrode, and a connecting portion. The inner electrode is disposed inside the ceramic body. The end portion of the inner electrode extends to a surface of the ceramic body. The outer electrode is disposed on the surface of the ceramic body so as to cover the end portion of the inner electrode. The outer electrode includes a resin and a metal. The connecting portion is disposed so as to extend from an inside of the outer electrode to an inside of the ceramic body. In a portion of the surface of the ceramic body on which the outer electrode is disposed, the length of the connecting portion that extends in a direction in which the inner electrode is extends about 2.4 ?m or more.
    Type: Application
    Filed: November 2, 2011
    Publication date: May 2, 2013
    Applicant: Murata Manufacturing Co., Ltd.
    Inventors: Kota ZENZAI, Hisayoshi OMORI, Takashi KANAYAMA, Kiyoyasu SAKURADA, Naoki SHIMIZU, Seiji KATSUTA, Shinji OTANI
  • Publication number: 20130107421
    Abstract: A ceramic body includes an inner electrode disposed inside the ceramic body and in which an end portion of the inner electrode extends to a surface of the ceramic body. An electrode layer is formed on the surface of the ceramic body so as to cover the end portion of the inner electrode, the electrode layer including a resin, a first metal filler that contains a first metal component, and a second metal filler that contains a second metal component having a higher melting point than the first metal component. A step of heating the electrode layer is performed to form an electrode including a metal layer that is located on the surface of the ceramic body and that includes the first and second metal components and a metal contained in the inner electrode.
    Type: Application
    Filed: November 2, 2011
    Publication date: May 2, 2013
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventors: Kota ZENZAI, Hisayoshi OMORI, Takashi KANAYAMA, Kiyoyasu SAKURADA, Naoki SHIMIZU, Seiji KATSUTA, Shinji OTANI