Patents by Inventor Naoteru Matsubara

Naoteru Matsubara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7301213
    Abstract: A sound hole is provided in a silicon substrate. A diaphragm electrode is secured to the upper surface of the silicon substrate via at least one fixed end so as to cover the sound hole of the silicon substrate. The diaphragm electrode is provided with four projections extending in respective directions of diameter orthogonal to each other. The fixed end is provided in one of the four projections. Hinge shafts are provided in the other three projections. A backplate electrode is provided above the diaphragm electrode so as to form a capacitor.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: November 27, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Naoteru Matsubara, Michinori Okuda
  • Patent number: 7273810
    Abstract: A semiconductor apparatus is constructed such that the top surface, contacting a barrier metal film, of a conducting film embedded in a trench is located below the top surface of a second interlayer insulating film. The semiconductor apparatus is fabricated such that a plasma treatment is performed in a non-nitriding environment after a polishing process using CMP, so as to form a damaged layer on top of the second interlayer insulating film and the conducting film, and a portion of the damaged layer is removed by etching.
    Type: Grant
    Filed: September 28, 2004
    Date of Patent: September 25, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yohko Naruse, Naoteru Matsubara, Kazunori Fujita
  • Publication number: 20070056377
    Abstract: A sensor hard to break and capable of improving sensitivity is obtained. This sensor comprises an electrode plate and a diaphragm, opposed to the electrode plate, including a first elastic film arranged on a central portion and a second elastic film, arranged at least on a peripheral portion of the first elastic film, made of a material having a lower elastic modulus than the first elastic film.
    Type: Application
    Filed: August 29, 2006
    Publication date: March 15, 2007
    Inventor: Naoteru Matsubara
  • Publication number: 20070045757
    Abstract: A sensor capable of increasing an electric signal output therefrom by inhibiting an electrode plate from vibration is obtained. This sensor comprises a diaphragm provided in a vibrative manner, an electrode plate, opposed to the diaphragm at a prescribed distance, having a hole and a support made of a material having an elastic modulus higher than the elastic modulus of a material constituting the electrode plate for supporting the electrode plate. The support is so formed as to cover at least two of the upper surface and the lower surface of the electrode plate and the side surface of the hole.
    Type: Application
    Filed: August 30, 2006
    Publication date: March 1, 2007
    Inventors: Naoteru Matsubara, Yohko Naruse
  • Publication number: 20060169049
    Abstract: A semiconductor sensor for improving manufacturing productivity. Opposing electrodes, or a diaphragm electrode and a fixed electrode, form an electrostatic capacity sensing semiconductor microphone on a microphone chip. A through electrode is formed on the microphone chip by a conductor extending between the upper and lower surfaces of the semiconductor substrate. The through electrode directly and electrically connects a MEMS configuration formed by the diaphragm electrode to the wiring of a printed wiring board without using wire bonding.
    Type: Application
    Filed: December 15, 2005
    Publication date: August 3, 2006
    Inventor: Naoteru Matsubara
  • Publication number: 20060022285
    Abstract: A sound hole is provided in a silicon substrate. A diaphragm electrode is secured to the upper surface of the silicon substrate via at least one fixed end so as to cover the sound hole of the silicon substrate. The diaphragm electrode is provided with four projections extending in respective directions of diameter orthogonal to each other. The fixed end is provided in one of the four projections. Hinge shafts are provided in the other three projections. A backplate electrode is provided above the diaphragm electrode so as to form a capacitor.
    Type: Application
    Filed: July 26, 2005
    Publication date: February 2, 2006
    Inventors: Naoteru Matsubara, Michinori Okuda
  • Patent number: 6974717
    Abstract: A solid state image device capable of attaining high condensability also when integrating an optical lens and a solid state image sensor with each other is provided. This solid state image device comprises an optical lens, a solid state image sensor including a microlens, and a resin layer formed between the optical lens and the microlens of the solid state image sensor. Thus, the solid state image device can refract light incident upon the microlens from the resin layer also when the resin layer is formed between the solid state image sensor and the optical lens.
    Type: Grant
    Filed: August 11, 2003
    Date of Patent: December 13, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Makoto Izumi, Mitsuru Okigawa, Kazuhiro Sasada, Naoteru Matsubara, Tatsuhiko Koide
  • Patent number: 6917110
    Abstract: A semiconductor device capable of inhibiting a conductive plug from increase of resistance or disconnection resulting from moisture discharged from a first insulator film while reducing the capacitance between adjacent first interconnection layers is obtained. This semiconductor device comprises a plurality of first interconnection layers formed on a semiconductor substrate at a prescribed interval, a first insulator film, formed to fill up the clearance between the plurality of first interconnection layers, having an opening reaching the first interconnection layers and a conductive plug charged in the opening of the first insulator film and formed to be in contact with the first interconnection layers. An impurity is selectively introduced into a first region of the first insulator film in the vicinity of contact surfaces between the first interconnection layers and the conductive plug, thereby selectively modifying the first region of the first insulator film.
    Type: Grant
    Filed: December 5, 2002
    Date of Patent: July 12, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Naoteru Matsubara, Hideki Mizuhara, Takashi Goto
  • Publication number: 20050093156
    Abstract: A semiconductor apparatus is constructed such that the top surface, contacting a barrier metal film, of a conducting film embedded in a trench is located below the top surface of a second interlayer insulating film. The semiconductor apparatus is fabricated such that a plasma treatment is performed in a non-nitriding environment after a polishing process using CMP, so as to form a damaged layer on top of the second interlayer insulating film and the conducting film, and a portion of the damaged layer is removed by etching.
    Type: Application
    Filed: September 28, 2004
    Publication date: May 5, 2005
    Inventors: Yohko Naruse, Naoteru Matsubara, Kazunori Fujita
  • Publication number: 20040061233
    Abstract: After etching the interlayer dielectric film 4 formed on the lower layer interconnect line 1 into a shape with holes, the upper layer dielectric film 6 is etched into a shape with trenches utilizing the etching stopper 5. The etching stopper 5 which is exposed at the bottom of the trench is removed by additional etching, and then, the interlayer dielectric film 4 which is exposed at the bottom of the trench is etched back to a predetermined thickness. Subsequently, the hole and the trench are filled with an interconnect metal 10.
    Type: Application
    Filed: September 22, 2003
    Publication date: April 1, 2004
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Naoteru Matsubara, Kazunori Fujita
  • Publication number: 20040033640
    Abstract: A solid state image device capable of attaining high condensability also when integrating an optical lens and a solid state image sensor with each other is provided. This solid state image device comprises an optical lens, a solid state image sensor including a microlens, and a resin layer formed between the optical lens and the microlens of the solid state image sensor. Thus, the solid state image device can refract light incident upon the microlens from the resin layer also when the resin layer is formed between the solid state image sensor and the optical lens.
    Type: Application
    Filed: August 11, 2003
    Publication date: February 19, 2004
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Makoto Izumi, Mitsuru Okigawa, Kazuhiro Sasada, Naoteru Matsubara, Tatsuhiko Koide
  • Patent number: 6690084
    Abstract: A semiconductor device including an insulation film superior in insulation characteristic is obtained. Boron ions are introduced by ion implantation into an organic SOG film with a silicon nitride film formed on the organic SOG film. By this boron implantation, the property of the organic SOG film is modified. The moisture and hydroxyl group included in the film are greatly reduced irrespective of the amount of dose of ions. By using such a layered film of a modified SOG film and a silicon nitride film thereupon as an interlayer insulation film or a passivation film, the water resistance of a semiconductor device can be improved sufficiently.
    Type: Grant
    Filed: November 21, 2000
    Date of Patent: February 10, 2004
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hideki Mizuhara, Hiroyuki Watanabe, Naoteru Matsubara
  • Patent number: 6617240
    Abstract: A method of fabricating a semiconductor device capable of attaining an excellent embedding characteristic also when an opening has a small diameter is obtained. According to this method of fabricating a semiconductor device, an interlayer dielectric film having an opening is formed. A first conductive member is formed in the opening by sputtering. In advance of formation of the first conductive member, first heat treatment is performed at a temperature capable of reducing the quantity of moisture and hydroxyl groups in the interlayer dielectric film. Thus, the interlayer dielectric film has a small quantity of moisture and hydroxyl groups when the first conductive member is embedded in the opening, whereby the embedding characteristic of the first conductive member is improved. Consequently, electric characteristics of a contact part can be improved also when the opening has a small diameter.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: September 9, 2003
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yasunori Inoue, Naoteru Matsubara, Hidetaka Nishimura, Hideki Mizuhara
  • Publication number: 20030116853
    Abstract: A semiconductor device capable of inhibiting a conductive plug from increase of resistance or disconnection resulting from moisture discharged from a first insulator film while reducing the capacitance between adjacent first interconnection layers is obtained. This semiconductor device comprises a plurality of first interconnection layers formed on a semiconductor substrate at a prescribed interval, a first insulator film, formed to fill up the clearance between the plurality of first interconnection layers, having an opening reaching the first interconnection layers and a conductive plug charged in the opening of the first insulator film and formed to be in contact with the first interconnection layers. An impurity is selectively introduced into a first region of the first insulator film in the vicinity of contact surfaces between the first interconnection layers and the conductive plug, thereby selectively modifying the first region of the first insulator film.
    Type: Application
    Filed: December 5, 2002
    Publication date: June 26, 2003
    Inventors: Naoteru Matsubara, Hideki Mizuhara, Takashi Goto
  • Patent number: 6469391
    Abstract: A semiconductor device capable of preventing a conductive member embedded in an interlayer dielectric film from oxidation or corrosion and keeping the electric characteristics of the conductive member excellent is obtained. The semiconductor device comprises the interlayer dielectric film, the conductive member embedded in the interlayer dielectric film and side wall insulator films formed on the side surfaces of the conductive member. Thus, the side wall insulator films inhibit moisture and hydroxyl groups contained in the interlayer dielectric film from reaching the conductive member. Therefore, the conductive member is prevented from inconvenience such as oxidation or corrosion resulting from moisture and hydroxyl groups discharged from the interlayer dielectric film. Consequently, the electric characteristics of a contact part can be maintained excellent.
    Type: Grant
    Filed: December 27, 2000
    Date of Patent: October 22, 2002
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Naoteru Matsubara
  • Patent number: 6399478
    Abstract: A semiconductor device having a dual damascene structure having a highly reliable multilayered interconnection is applied to the present invention. A protective film (12) is formed on a first interconnection (11), and a modified SOG film (13a) is then provided thereon. An etch stopper film (14) is formed on the modified SOG film (13a), and a modified SOG film (15a) is then formed. The modified SOG film (15a), the etch stopper film (14), and the modified SOG film (13a) are etched away using a resist pattern, to form a via hole (17). The modified SOG film (15a) is etched away using the resist pattern, to form a recess (19) serving as a trench interconnection portion. The etch stopper film (14) and the protective film (12) which are exposed are removed, and the recess is filled with a conductive material (20), to form a conductive plug in the via hole and a second interconnection.
    Type: Grant
    Filed: February 21, 2001
    Date of Patent: June 4, 2002
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Naoteru Matsubara, Hideki Mizuhara
  • Publication number: 20020063336
    Abstract: A semiconductor device that prevents the dispersion of copper and is optimal for high speed operation. The semiconductor device includes an interlayer dielectric film formed on a lower wiring layer. The interlayer dielectric film has a groove. A contact plug and a copper line are formed in the groove. A barrier metal formed between the groove and the contact plug and the barrier metal serves to prevent contact between copper and the dielectric film. The upper surface of the copper line is coated with a modified SOG film in which ions are implanted. The barrier metal and the modified SOG film decrease the dispersion of copper.
    Type: Application
    Filed: November 29, 2001
    Publication date: May 30, 2002
    Applicant: Sanyo Electric Co. , Ltd
    Inventor: Naoteru Matsubara
  • Publication number: 20010027009
    Abstract: A semiconductor device having a dual damascene structure having a highly reliable multilayered interconnection is applied to the present invention. A protective film (12) is formed on a first interconnection (11), and a modified SOG film (13a) is then provided thereon. An etch stopper film (14) is formed on the modified SOG film (13a), and a modified SOG film (15a) is then formed. The modified SOG film (15a), the etch stopper film (14), and the modified SOG film (13a) are etched away using a resist pattern, to form a via hole (17). The modified SOG film (15a) is etched away using the resist pattern, to form a recess (19) serving as a trench interconnection portion. The etch stopper film (14) and the protective film (12) which are exposed are removed, and the recess is filled with a conductive material (20), to form a conductive plug in the via hole and a second interconnection.
    Type: Application
    Filed: February 21, 2001
    Publication date: October 4, 2001
    Inventors: Naoteru Matsubara, Hideki Mizuhara
  • Publication number: 20010005627
    Abstract: A semiconductor device capable of preventing a conductive member embedded in an interlayer dielectric film from oxidation or corrosion and keeping the electric characteristics of the conductive member excellent is obtained. The semiconductor device comprises the interlayer dielectric film, the conductive member embedded in the interlayer dielectric film and side wall insulator films formed on the side surfaces of the conductive member. Thus, the side wall insulator films inhibit moisture and hydroxyl groups contained in the interlayer dielectric film from reaching the conductive member. Therefore, the conductive member is prevented from inconvenience such as oxidation or corrosion resulting from moisture and hydroxyl groups discharged from the interlayer dielectric film. Consequently, the electric characteristics of a contact part can be maintained excellent.
    Type: Application
    Filed: December 27, 2000
    Publication date: June 28, 2001
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Naoteru Matsubara
  • Publication number: 20010005628
    Abstract: A method of fabricating a semiconductor device capable of attaining an excellent embedding characteristic also when an opening has a small diameter is obtained. According to this method of fabricating a semiconductor device, an interlayer dielectric film having an opening is formed. A first conductive member is formed in the opening by sputtering. In advance of formation of the first conductive member, first heat treatment is performed at a temperature capable of reducing the quantity of moisture and hydroxyl groups in the interlayer dielectric film. Thus, the interlayer dielectric film has a small quantity of moisture and hydroxyl groups when the first conductive member is embedded in the opening, whereby the embedding characteristic of the first conductive member is improved. Consequently, electric characteristics of a contact part can be improved also when the opening has a small diameter.
    Type: Application
    Filed: December 27, 2000
    Publication date: June 28, 2001
    Applicant: Sanyo Electric Co., Ltd.
    Inventors: Yasunori Inoue, Naoteru Matsubara, Hidetaka Nishimura, Hideki Mizuhara