Patents by Inventor Naoto Kusumoto

Naoto Kusumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20110308588
    Abstract: A photoelectric conversion device having a high electric generating capacity at low illuminance, in which a semiconductor layer is appropriately separated and short circuit of a side surface portion of a cell is prevented. The photoelectric conversion device includes an isolation groove formed between one first electrode and the other first electrode that is adjacent to the one first electrode; a stack including a first semiconductor layer having one conductivity type over the first electrode, a second semiconductor layer formed using an intrinsic semiconductor, and a third semiconductor layer having a conductivity type opposite to the one conductivity type; and a connection electrode connecting one first electrode and a second electrode that is in contact with a third semiconductor layer included in a stack formed over the other first electrode that is adjacent to the one first electrode. A side surface portion of the second semiconductor layer is not crystallized.
    Type: Application
    Filed: June 14, 2011
    Publication date: December 22, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazuo NISHI, Takashi HIROSE, Naoto KUSUMOTO
  • Publication number: 20110303272
    Abstract: An object is to provide a photoelectric conversion device in which defects are suppressed as much as possible by filling a separation process region of a semiconductor film with an insulating resin. A photoelectric conversion device includes a first conductive layer formed over a substrate; first to third semiconductor layers formed over the first conductive layer; a second conductive layer formed over the third semiconductor layer; a first separation groove for separating the first conductive layer and the first to third semiconductor layers into a plurality of pieces; a second separation groove for separating the first to third semiconductor layers into a plurality of pieces; and a third separation groove for separating the second conductive layer into a plurality of pieces. An insulating resin is filled in a structural defect that exists in at least one of the first to third semiconductor layers, and in the first separation groove.
    Type: Application
    Filed: June 7, 2011
    Publication date: December 15, 2011
    Inventors: Kazuo Nishi, Takashi Hirose, Fumito Isaka, Naoto Kusumoto
  • Publication number: 20110291090
    Abstract: A manufacturing method of a photoelectric conversion device includes the following steps: forming a first electrode over a substrate; and, over the first electrode, forming a photoelectric conversion layer that includes a first conductive layer having one conductivity, a second semiconductor layer, and a third semiconductor layer having a conductivity opposite to the one conductivity of the second semiconductor layer over the first electrode. The manufacturing method further includes the step of removing a part of the second semiconductor layer and a part of the third semiconductor layer in a region of the photoelectric conversion layer so that the third semiconductor layer does not overlap the first electrode.
    Type: Application
    Filed: August 10, 2011
    Publication date: December 1, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuusuke Sugawara, Kazuo Nishi, Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto
  • Patent number: 8053816
    Abstract: It is an object of the present invention to obtain a photoelectric conversion device having a favorable spectral sensitivity characteristic and no variation in output current without such a contamination substance mixed into a photoelectric conversion layer or a transistor. Further, it is another object of the present invention to obtain a highly reliable semiconductor device in a semiconductor device having such a photoelectric conversion device.
    Type: Grant
    Filed: March 2, 2007
    Date of Patent: November 8, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Arao, Daiki Yamada, Hidekazu Takahashi, Naoto Kusumoto, Kazuo Nishi, Yuusuke Sugawara, Hironobu Takahashi
  • Patent number: 8049157
    Abstract: The present invention provides a photoelectric conversion device capable of detecting light from weak light to strong light and relates to a photoelectric conversion device having a photodiode having a photoelectric conversion layer; an amplifier circuit including a transistor; and a switch, where the photodiode and the amplifier circuit are electrically connected to each other by the switch when intensity of entering light is lower than predetermined intensity so that a photoelectric current is amplified by the amplifier circuit to be outputted, and the photodiode and part or all of the amplifier circuits are electrically disconnected by the switch so that a photoelectric current is reduced in an amplification factor to be outputted. According to such a photoelectric conversion device, light from weak light to strong light can be detected.
    Type: Grant
    Filed: November 18, 2010
    Date of Patent: November 1, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuo Nishi, Tatsuya Arao, Atsushi Hirose, Yuusuke Sugawara, Naoto Kusumoto, Daiki Yamada, Hidekazu Takahashi
  • Patent number: 8039353
    Abstract: The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered by an insulating layer which serves as a substrate for protection. In the semiconductor device, the insulating layer is formed over a conductive layer serving as an antenna such that the value in the thickness ratio of the insulating layer in a portion not covering the conductive layer to the conductive layer is at least 1.2, and the value in the thickness ratio of the insulating layer formed over the conductive layer to the conductive layer is at least 0.2. Further, not the conductive layer but the insulating layer is exposed in the side face of the semiconductor device, and the insulating layer covers a TFT and the conductive layer.
    Type: Grant
    Filed: August 10, 2010
    Date of Patent: October 18, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshitaka Dozen, Tomoyuki Aoki, Hidekazu Takahashi, Daiki Yamada, Eiji Sugiyama, Kaori Ogita, Naoto Kusumoto
  • Publication number: 20110244656
    Abstract: It is an object of the present invention to improve a factor which influences productivity such as variation caused by a characteristic defect of a circuit by thinning or production yield when an integrated circuit device in which a substrate is thinned is manufactured. A stopper layer is formed over one surface of a substrate, and an element is formed over the stopper layer, and then, the substrate is thinned from the other surface thereof. A method in which a substrate is ground or polished or a method in which the substrate is etched by chemical reaction is used as a method for thinning or removing the substrate.
    Type: Application
    Filed: June 17, 2011
    Publication date: October 6, 2011
    Applicant: Semiconductor Energy Laboratory Co., Ltd. .
    Inventors: Koji DAIRIKI, Naoto KUSUMOTO, Takuya TSURUME
  • Publication number: 20110171776
    Abstract: An antenna used for an ID chip or the like is disclosed with planarized antenna unevenness and an IC chip having such the antenna with a flat surface is disclosed. Manufacturing an integrated circuit mounted with an antenna is facilitated. A laminated body formed by stacking a conductive film 11, a resin film 13, an integrated circuit 12, and a resin film 14 are rolled so that the resin film 14 is outside. Then, the laminated body is integrated in a roll form by softening the resin films 13, 14 by applying heat. By slicing the rolled laminated body along with the direction in which the rolled conductive film 31 appears in the cross section, an IC chip with antenna formed by the rolled conductive film 11 is formed.
    Type: Application
    Filed: March 22, 2011
    Publication date: July 14, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Naoto KUSUMOTO, Takuya TSURUME
  • Patent number: 7972910
    Abstract: It is an object of the present invention to improve a factor which influences productivity such as variation caused by a characteristic defect of a circuit by thinning or production yield when an integrated circuit device in which a substrate is thinned is manufactured. A stopper layer is formed over one surface of a substrate, and an element is formed over the stopper layer, and then, the substrate is thinned from the other surface thereof. A method in which a substrate is ground or polished or a method in which the substrate is etched by chemical reaction is used as a method for thinning or removing the substrate.
    Type: Grant
    Filed: May 30, 2006
    Date of Patent: July 5, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Dairiki, Naoto Kusumoto, Takuya Tsurume
  • Patent number: 7939435
    Abstract: In crystallizing an amorphous silicon film by illuminating it with linear pulse laser beams having a normal-distribution type beam profile or a similar beam profile, the linear pulse laser beams are applied in an overlapped manner. There can be obtained effects similar to those as obtained by a method in which the laser illumination power is gradually increased and then decreased in a step-like manner in plural scans.
    Type: Grant
    Filed: March 25, 2009
    Date of Patent: May 10, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Koichiro Tanaka
  • Publication number: 20110101366
    Abstract: Paper embedded with a semiconductor device capable of communicating wirelessly is realized, whose unevenness of a portion including the semiconductor device does not stand out and the paper is thin with a thickness of less than or equal to 130 ?m. A semiconductor device is provided with a circuit portion and an antenna, and the circuit portion includes a thin film transistor. The circuit portion and the antenna are separated from a substrate used during manufacturing, and are interposed between a flexible base and a sealing layer and protected. The semiconductor device can be bent, and the thickness of the semiconductor device itself is less than or equal to 30 ?m. The semiconductor device is embedded in a paper in a papermaking process.
    Type: Application
    Filed: January 6, 2011
    Publication date: May 5, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshitaka DOZEN, Tomoyuki AOKI, Hidekazu TAKAHASHI, Daiki YAMADA, Kaori OGITA, Naoto KUSUMOTO
  • Publication number: 20110101362
    Abstract: A semiconductor device having a pair of impurity doped second semiconductor layers, formed on a first semiconductor layer having a channel formation region therein, an outer edge of the first semiconductor film being at least partly coextensive with an outer edge of the impurity doped second semiconductor layers. The semiconductor device further includes source and drain electrodes formed on the pair of impurity doped second semiconductor layers, wherein the pair of impurity doped second semiconductor layers extend beyond inner sides edges of the source and drain electrodes so that a stepped portion is formed from an upper surface of the source and drain electrodes to a surface of the first semiconductor film.
    Type: Application
    Filed: January 10, 2011
    Publication date: May 5, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Hongyong ZHANG, Naoto KUSUMOTO
  • Patent number: 7928554
    Abstract: An antenna used for an ID chip or the like is disclosed with planarized antenna unevenness and an IC chip having such the antenna with a flat surface is disclosed. Manufacturing an integrated circuit mounted with an antenna is facilitated. A laminated body formed by stacking a conductive film 11, a resin film 13, an integrated circuit 12, and a resin film 14 are rolled so that the resin film 14 is outside. Then, the laminated body is integrated in a roll form by softening the resin films 13, 14 by applying heat. By slicing the rolled laminated body along with the direction in which the rolled conductive film 31 appears in the cross section, an IC chip with antenna formed by the rolled conductive film 11 is formed.
    Type: Grant
    Filed: November 4, 2005
    Date of Patent: April 19, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Takuya Tsurume
  • Patent number: 7923311
    Abstract: A semiconductor device having a pair of impurity doped second semiconductor layers, formed on a first semiconductor layer having a channel formation region therein, an outer edge of the first semiconductor film being at least partly coextensive with an outer edge of the impurity doped second semiconductor layers. The semiconductor device further includes source and drain electrodes formed on the pair of impurity doped second semiconductor layers, wherein the pair of impurity doped second semiconductor layers extend beyond inner sides edges of the source and drain electrodes so that a stepped portion is formed from an upper surface of the source and drain electrodes to a surface of the first semiconductor film.
    Type: Grant
    Filed: September 17, 2007
    Date of Patent: April 12, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hongyong Zhang, Naoto Kusumoto
  • Publication number: 20110073981
    Abstract: The present invention provides a semiconductor device formed over an insulating substrate, typically a semiconductor device having a structure in which mounting strength to a wiring board can be increased in an optical sensor, a solar battery, or a circuit using a TFT, and which can make it mount on a wiring board with high density, and further a method for manufacturing the same. According to the present invention, in a semiconductor device, a semiconductor element is formed on an insulating substrate, a concave portion is formed on a side face of the semiconductor device, and a conductive film electrically connected to the semiconductor element is formed in the concave portion.
    Type: Application
    Filed: December 10, 2010
    Publication date: March 31, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazuo NISHI, Hiroki ADACHI, Junya MARUYAMA, Naoto KUSUMOTO, Yuusuke SUGAWARA, Tomoyuki AOKI, Eiji SUGIYAMA, Hironobu TAKAHASHI
  • Publication number: 20110062543
    Abstract: The present invention provides a photoelectric conversion device capable of detecting light from weak light to strong light and relates to a photoelectric conversion device having a photodiode having a photoelectric conversion layer; an amplifier circuit including a transistor; and a switch, where the photodiode and the amplifier circuit are electrically connected to each other by the switch when intensity of entering light is lower than predetermined intensity so that a photoelectric current is amplified by the amplifier circuit to be outputted, and the photodiode and part or all of the amplifier circuits are electrically disconnected by the switch so that a photoelectric current is reduced in an amplification factor to be outputted. According to such a photoelectric conversion device, light from weak light to strong light can be detected.
    Type: Application
    Filed: November 18, 2010
    Publication date: March 17, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Kazuo NISHI, Tatsuya ARAO, Atsushi HIROSE, Yuusuke SUGAWARA, Naoto KUSUMOTO, Daiki YAMADA, Hidekazu TAKAHASHI
  • Publication number: 20110039373
    Abstract: The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered by an insulating layer which serves as a substrate for protection. In the semiconductor device, the insulating layer is formed over a conductive layer serving as an antenna such that the value in the thickness ratio of the insulating layer in a portion not covering the conductive layer to the conductive layer is at least 1.2, and the value in the thickness ratio of the insulating layer formed over the conductive layer to the conductive layer is at least 0.2. Further, not the conductive layer but the insulating layer is exposed in the side face of the semiconductor device, and the insulating layer covers a TFT and the conductive layer.
    Type: Application
    Filed: August 10, 2010
    Publication date: February 17, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yoshitaka DOZEN, Tomoyuki AOKI, Hidekazu TAKAHASHI, Daiki YAMADA, Eiji SUGIYAMA, Kaori OGITA, Naoto KUSUMOTO
  • Patent number: 7888714
    Abstract: Considering further promotion of high output and miniaturization of a sensor element, it is an object of the present invention to form a plurality of elements in a limited area so that an area occupied by the element is reduced for integration. It is another object to provide a process which improves the yield of a sensor element. According to the present invention, a sensor element using an amorphous silicon film and an output amplifier circuit constituted by a thin film transistor are formed over a substrate having an insulating surface. In addition, a metal layer for protecting an exposed wire when a photoelectric conversion layer of the sensor element is patterned is provided between the photoelectric conversion layer and the wire connected to the thin film transistor.
    Type: Grant
    Filed: September 15, 2005
    Date of Patent: February 15, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidekazu Takahashi, Junya Maruyama, Daiki Yamada, Naoto Kusumoto, Kazuo Nishi, Hiroki Adachi, Yuusuke Sugawara
  • Publication number: 20110033988
    Abstract: A TFT having a high threshold voltage is connected to the source electrode of each TFT that constitutes a CMOS circuit. In another aspect, pixel thin-film transistors are constructed such that a thin-film transistor more distant from a gate line drive circuit has a lower threshold voltage. In a further aspect, a control film that is removable in a later step is formed on the surface of the channel forming region of a TFT, and doping is performed from above the control film.
    Type: Application
    Filed: October 14, 2010
    Publication date: February 10, 2011
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Naoto Kusumoto, Hideto Ohnuma, Koichiro Tanaka
  • Publication number: 20110033987
    Abstract: An object is to provide a method for manufacturing a semiconductor device which suppresses an influence on a semiconductor element due to entry of an impurity element, moisture, or the like from outside even in the case of thinning or removing a substrate after forming a semiconductor element over the substrate. A feature is to form an insulating film functioning as a protective film on at least one side of the substrate by performing surface treatment on the substrate, to form a semiconductor element such as a thin film transistor over the insulating film, and to thin the substrate. As the surface treatment, addition of an impurity element or plasma treatment is performed on the substrate. As a means for thinning the substrate, the substrate can be partially removed by performing grinding treatment, polishing treatment, or the like on the other side of the substrate.
    Type: Application
    Filed: October 20, 2010
    Publication date: February 10, 2011
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Koji DAIRIKI, Naoto KUSUMOTO, Takuya TSURUME