Patents by Inventor Naoto Kusumoto

Naoto Kusumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080001148
    Abstract: An object of the present invention to provide a semiconductor device manufactured in short time by performing the step of forming the thin film transistor and the step of forming the photoelectric conversion layer in parallel, and to provide a manufacturing process thereof. According to the present invention, a semiconductor device is manufactured in such a way that a thin film transistor is formed over a first substrate, a photoelectric conversion element is formed over a second substrate, and the thin film transistor and the photoelectric conversion element are connected electrically by sandwiching a conductive layer between the first and second substrates opposed to each other so that the thin film transistor and the photoelectric conversion element are located between the first and second substrates. Thus, a method for manufacturing a semiconductor device which suppresses the increase in the number of steps and which increases the throughput can be provided.
    Type: Application
    Filed: May 16, 2005
    Publication date: January 3, 2008
    Inventors: Kazuo Nishi, Junya Maruyama, Naoto Kusumoto, Yuusuke Sugawara
  • Publication number: 20070296037
    Abstract: The present invention provides a thin and bendable semiconductor device utilizing an advantage of a flexible substrate used in the semiconductor device, and a method of manufacturing the semiconductor device. The semiconductor device has at least one surface covered by an insulating layer which serves as a substrate for protection. In the semiconductor device, the insulating layer is formed over a conductive layer serving as an antenna such that the value in the thickness ratio of the insulating layer in a portion not covering the conductive layer to the conductive layer is at least 1.2, and the value in the thickness ratio of the insulating layer formed over the conductive layer to the conductive layer is at least 0.2. Further, not the conductive layer but the insulating layer is exposed in the side face of the semiconductor device, and the insulating layer covers a TFT and the conductive layer.
    Type: Application
    Filed: June 21, 2007
    Publication date: December 27, 2007
    Inventors: Yoshitaka Dozen, Tomoyuki Aoki, Hidekazu Takahashi, Daiki Yamada, Eiji Sugiyama, Kaori Ogita, Naoto Kusumoto
  • Patent number: 7303980
    Abstract: A linear pulse laser beam to be applied to an illumination surface is so formed as to have, at the focus, an energy profile in the width direction which satisfies inequalities 0.5L1?L2?L1 and 0.5L1?L3?L1 where assuming that a maximum energy is 1, L1 is a beam width of two points having an energy of 0.95 and L1+L2+L3 is a beam width of two points having an energy of 0.70, L2 and L3 occupying two peripheral portions of the beam width. According to another aspect of the invention, a compound-eye-like fly-eye lens for expanding a pulse laser beam in a sectional manner is provided upstream of a cylindrical lens for converging the laser beam into a linear beam.
    Type: Grant
    Filed: October 18, 2002
    Date of Patent: December 4, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Naoto Kusumoto, Koichiro Tanaka
  • Patent number: 7271042
    Abstract: In order to promote an effect of laser annealing in respect of a semiconductor film, moisture is intentionally included in an atmosphere in irradiating laser beam to the semiconductor film by which a temperature holding layer comprising water vapor is formed on the surface of the semiconductor film in irradiating the laser beam and the laser annealing operation can be performed effectively.
    Type: Grant
    Filed: August 20, 2004
    Date of Patent: September 18, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Shunpei Yamazaki, Koichiro Tanaka
  • Publication number: 20070210344
    Abstract: It is an object of the present invention to obtain a photoelectric conversion device having a favorable spectral sensitivity characteristic and no variation in output current without such a contamination substance mixed into a photoelectric conversion layer or a transistor. Further, it is another object of the present invention to obtain a highly reliable semiconductor device in a semiconductor device having such a photoelectric conversion device.
    Type: Application
    Filed: March 2, 2007
    Publication date: September 13, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tatsuya ARAO, Daiki YAMADA, Hidekazu TAKAHASHI, Naoto KUSUMOTO, Kazuo NISHI, Yuusuke SUGAWARA, Hironobu TAKAHASHI
  • Publication number: 20070187790
    Abstract: [Abstract]Considering further promotion of high output and miniaturization of a sensor element, it is an object of the present invention to form a plurality of elements in a limited area so that an area occupied by the element is reduced for integration. It is another object to provide a process which improves the yield of a sensor element. According to the present invention, a sensor element using an amorphous silicon film and an output amplifier circuit constituted by a thin film transistor are formed over a substrate having an insulating surface. In addition, a metal layer for protecting an exposed wire when a photoelectric conversion layer of the sensor element is patterned is provided between the photoelectric conversion layer and the wire connected to the thin film transistor.
    Type: Application
    Filed: September 15, 2005
    Publication date: August 16, 2007
    Inventors: Hidekazu Takahashi, Junya Maruyama, Daiki Yamada, Naoto Kusumoto, Kazuo Nishi, Hiroki Adachi, Yuusuke Sugawara
  • Publication number: 20070190710
    Abstract: In crystallizing an amorphous silicon film by illuminating it with linear pulse laser beams having a normal--distribution type beam profile or a similar beam profile, the linear pulse laser beams are applied in an overlapped manner. There can be obtained effects similar to those as obtained by a method in which the laser illumination power is gradually increased and then decreased in a step-like manner in plural scans.
    Type: Application
    Filed: April 16, 2007
    Publication date: August 16, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Naoto Kusumoto, Koichiro Tanaka
  • Publication number: 20070141768
    Abstract: A linear pulse laser beam to be applied to an illumination surface is so formed as to have, at the focus, an energy profile in the width direction which satisfies inequalities 0.5L1?L2?L1 and 0.5L1?L3?L1 where assuming that a maximum energy is 1, L1 is a beam width of two points having an energy of 0.95 and L1 +L2 +L3 is a beam width of two points having an energy of 0.70, L2 and L3 occupying two peripheral portions of the beam width. According to another aspect of the invention, a compound-eye-like fly-eye lens for expanding a pulse laser beam in a sectional manner is provided upstream of a cylindrical lens for converging the laser beam into a linear beam.
    Type: Application
    Filed: February 9, 2007
    Publication date: June 21, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Naoto Kusumoto, Koichiro Tanaka
  • Patent number: 7229861
    Abstract: In producing a thin film transistor, after an amorphous silicon film is formed on a substrate, a nickel silicide layer is formed by spin coating with a solution (nickel acetate solution) containing nickel as the metal element which accelerates (promotes) the crystallization of silicon and by heat treating. The nickel silicide layer is selectively patterned to form island-like nickel silicide layer. The amorphous silicon film is patterned. A laser light is irradiated while moving the laser, so that crystal growth occurs from the region in which the nickel silicide layer is formed and a region equivalent to a single crystal (a monodomain region) is obtained.
    Type: Grant
    Filed: November 6, 2002
    Date of Patent: June 12, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Setsuo Nakajima, Shunpei Yamazaki, Naoto Kusumoto, Satoshi Teramoto
  • Publication number: 20070113886
    Abstract: A photoelectric conversion device provided with a photoelectric conversion layer between a first electrode and a second electrode is formed. The first electrode is partially in contact with the photoelectric conversion layer, and a cross-sectional shape of the first electrode in the contact portion is a taper shape. In this case, part of a first semiconductor layer with one conductivity type is in contact with the first electrode. A planer shape in an edge portion of the first electrode is preferably nonangular, that is, a shape in which edges are planed or a curved shape. By such a structure, concentration of an electric field and concentration of a stress can be suppressed, whereby characteristic deterioration of the photoelectric conversion device can be reduced.
    Type: Application
    Filed: November 14, 2006
    Publication date: May 24, 2007
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Tatsuya Arao, Naoto Kusumoto, Daiki Yamada, Hidekazu Takahashi, Kazuo NISHI, Yuusuke Sugawara, Hironobu Takahashi, Shuji Fukai
  • Publication number: 20070107827
    Abstract: The substrate is placed over a pressure detection film, the element group is placed selectively over the substrate so that a conductive film functioning as an antenna formed over the substrate and a conductive film functioning as a bump formed over the element group overlap each other, the substrate and the element group are pressure-bonded to each other by applying pressure to the substrate and the element group so that the conductive film formed over the substrate and the conductive film functioning as a bump formed over the element group are electrically connected to each other, a value and distribution of pressure applied to the element group at the time of the pressure bonding are detected by the pressure detection film, and the pressure applied at the time of the pressure bonding is controlled, based on the detected pressure value and pressure distribution.
    Type: Application
    Filed: November 1, 2006
    Publication date: May 17, 2007
    Inventors: Hidekazu Takahashi, Naoto Kusumoto
  • Publication number: 20070105285
    Abstract: To provide a semiconductor device which is higher functional and reliable and a technique capable of manufacturing the semiconductor device with a high yield at low cost without complexing the apparatus or process. At least one of a first conductive layer and a second conductive layer is formed containing one kind or plural kinds of indium, tin, lead, bismuth, calcium, manganese, or zinc; or oxidation treatment is performed at least one of interfaces between an organic compound layer and the first conductive layer and between the organic compound layer and the second conductive layer. The first conductive layer, the organic compound layer, and the second conductive layer which are formed over a first substrate with a peeling layer interposed therebetween can be peeled from the first substrate with the peeling layer, and transposed to a second substrate.
    Type: Application
    Filed: November 7, 2006
    Publication date: May 10, 2007
    Inventors: Naoto Kusumoto, Nobuharu Ohsawa, Mikio Yukawa, Yoshitaka Dozen
  • Patent number: 7208358
    Abstract: In crystallizing an amorphous silicon film by illuminating it with linear pulse laser beams having a normal-distribution type beam profile or a similar beam profile, the linear pulse laser beams are applied in an overlapped manner. There can be obtained effects similar to those as obtained by a method in which the laser illumination power is gradually increased and then decreased in a step-like manner in plural scans.
    Type: Grant
    Filed: August 15, 2005
    Date of Patent: April 24, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Koichiro Tanaka
  • Publication number: 20070069340
    Abstract: It is an object of the present invention to provide a device which can pick up a chip from an adhesive film while preventing damage to the chip. In addition, a device which can pick up a chip over an adhesive film with a high yield is provided. A pickup device includes: a frame for holding a film to which a chip is attached, which is fixed to a support; a pressing jig which presses a surface of the film, to which a chip is not attached, while rotated or moved; a holding jig which holds the chip simultaneously with or after the pressing jig pressing the film; and a moving unit which moves the holding jig.
    Type: Application
    Filed: September 20, 2006
    Publication date: March 29, 2007
    Inventors: Daiki Yamada, Naoto Kusumoto
  • Publication number: 20070069382
    Abstract: The invention includes a layer having an integrated circuit, a first terminal which is formed over the layer having the integrated circuit and is electrically connected to the layer having the integrated circuit, a conductive layer which functions as an antenna, which is formed over the first terminal and is electrically connected to the first terminal, and a second terminal which is formed over the layer having the integrated circuit and is not electrically connected to the layer having the integrated circuit, the conductive layer which functions as the antenna, and the first terminal.
    Type: Application
    Filed: September 20, 2006
    Publication date: March 29, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Naoto Kusumoto, Hidekazu Takahashi, Yuka Kobayashi
  • Publication number: 20070052088
    Abstract: To solve the problems caused by accumulation of heat generated from an integrated circuit. The integrated circuit device of the invention includes a substrate over one surface of which an integrated circuit is formed. The other surface of the substrate (a surface over which the integrated circuit is not formed) includes a depressed portion and has a larger surface area than the one surface. The depressed portion formed on the other surface of the substrate is filled with a heat sink material, or a film containing a heat sink material is formed at least over the surface of the depressed portion. Such integrated circuit devices may be provided in a multilayer structure.
    Type: Application
    Filed: August 16, 2006
    Publication date: March 8, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Naoto Kusumoto
  • Publication number: 20070045672
    Abstract: The present invention provides a photoelectric conversion device capable of detecting light from weak light to strong light and relates to a photoelectric conversion device having a photodiode having a photoelectric conversion layer; an amplifier circuit including a transistor; and a switch, where the photodiode and the amplifier circuit are electrically connected to each other by the switch when intensity of entering light is lower than predetermined intensity so that a photoelectric current is amplified by the amplifier circuit to be outputted, and the photodiode and part or all of the amplifier circuits are electrically disconnected by the switch so that a photoelectric current is reduced in an amplification factor to be outputted. According to such a photoelectric conversion device, light from weak light to strong light can be detected.
    Type: Application
    Filed: July 24, 2006
    Publication date: March 1, 2007
    Inventors: Kazuo Nishi, Tatsuya Arao, Atsushi Hirose, Yuusuke Sugawara, Naoto Kusumoto, Daiki Yamada, Hidekazu Takahashi
  • Patent number: 7180197
    Abstract: The present invention provides a semiconductor device having a structure that can be mounted on a wiring substrate, as for the semiconductor device formed over a thin film-thickness substrate, a film-shaped substrate, or a sheet-like substrate. In addition, the present invention provides a method for manufacturing a semiconductor device that is capable of raising a reliability of mounting on a wiring substrate. One feature of the present invention is to bond a semiconductor element formed on a substrate having isolation to a member that a conductive film is formed via a medium having an anisotropic conductivity.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: February 20, 2007
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kazuo Nishi, Hiroki Adachi, Naoto Kusumoto, Yuusuke Sugawara, Hidekazu Takahashi, Daiki Yamada, Yoshikazu Hiura
  • Publication number: 20070004102
    Abstract: An object is to provide a method for manufacturing a semiconductor device which suppresses an influence on a semiconductor element due to entry of an impurity element, moisture, or the like from outside even in the case of thinning or removing a substrate after forming a semiconductor element over the substrate. A feature is to form an insulating film functioning as a protective film on at least one side of the substrate by performing surface treatment on the substrate, to form a semiconductor element such as a thin film transistor over the insulating film, and to thin the substrate. As the surface treatment, addition of an impurity element or plasma treatment is performed on the substrate. As a means for thinning the substrate, the substrate can be partially removed by performing grinding treatment, polishing treatment, or the like on the other side of the substrate.
    Type: Application
    Filed: June 7, 2006
    Publication date: January 4, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Koji Dairiki, Naoto Kusumoto, Takuya Tsurume
  • Publication number: 20070004082
    Abstract: It is an object of the present invention to provide a method for manufacturing a semiconductor device, which is flexible and superiority in physical strength. As a method for manufacturing a semiconductor device, an element layer including a plurality of integrated circuits is formed over one surface of a substrate; a hole having curvature is formed in part of one surface side of the substrate; the substrate is thinned (for example, the other surface of the substrate is ground and polished); and the substrate is cut off so that a cross section of the substrate has curvature corresponding to a portion where the hole is formed; whereby a laminated body including an integrated circuit is formed. Further, a thickness of the substrate, which is polished, is 2 ?m or more and 50 ?m or less.
    Type: Application
    Filed: June 19, 2006
    Publication date: January 4, 2007
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuya Tsurume, Naoto Kusumoto