Patents by Inventor Naoto Kusumoto

Naoto Kusumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20200212094
    Abstract: An imaging device that has a structure where a transistor is used in common by a plurality of pixels and is capable of imaging with a global shutter system is provided. A transistor that resets the potential of a charge detection portion, a transistor that outputs a signal corresponding to the potential of the charge detection portion, and a transistor that selects a pixel are used in common by the plurality of pixels. A node AN (a first charge retention portion), a node FD (a second charge retention portion), and a node FDX (the charge detection portion) are provided. Imaging data obtained in the node AN is transferred to the node FD, and the imaging data is sequentially transferred from the node FD to the node FDX to be read.
    Type: Application
    Filed: March 9, 2020
    Publication date: July 2, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORYCO., LTD.
    Inventors: Takuro Ohmaru, Naoto Kusumoto
  • Publication number: 20200194527
    Abstract: To provide a display device capable of performing image processing. Each pixel is provided with a memory circuit in which desired correction data is retained. The correction data is generated by calculation in an external device and written to each pixel. The correction data is added to image data by capacitive coupling and supplied to a display element. Thus, the display element can display a corrected image. Through the correction, image upconversion can be performed, or image quality decreased because of variations in pixel transistor characteristics can be corrected.
    Type: Application
    Filed: August 10, 2018
    Publication date: June 18, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Susumu KAWASHIMA, Koji KUSUNOKI, Kazunori WATANABE, Kouhei TOYOTAKA, Naoto KUSUMOTO, Shunpei YAMAZAKI
  • Publication number: 20200193928
    Abstract: A display device capable of performing image processing is provided. A memory node is provided in each pixel included in the display device. An intended correction data is held in the memory node. The correction data is calculated by an external device and written into each pixel. The correction data is added to image data by capacitive coupling, and the resulting data is supplied to a display element. Thus, the display element can display a corrected image. The correction enables image upconversion, for example.
    Type: Application
    Filed: September 4, 2018
    Publication date: June 18, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Susumu KAWASHIMA, Koji KUSUNOKI, Kazunori WATANABE, Kouhei TOYOTAKA, Naoto KUSUMOTO, Shunpei YAMAZAKI
  • Publication number: 20200152897
    Abstract: A display device with a narrow bezel is provided. The display device includes a pixel circuit and a driver circuit which are provided on the same plane. The driver circuit includes a selection circuit and a buffer circuit. The selection circuit includes a first transistor. The buffer circuit includes a second transistor. The first transistor has a region overlapping with the second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. One of a source and a drain of the second transistor is electrically connected to the pixel circuit.
    Type: Application
    Filed: January 15, 2020
    Publication date: May 14, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Shishido, Naoto Kusumoto
  • Publication number: 20200127064
    Abstract: An imaging display device which can quickly display a captured image is provided. The imaging display device includes an imaging portion on a first surface and a display portion on a second surface that is opposite to the first surface. The imaging portion includes a photoelectric conversion element configured to receive light delivered to the first surface. The display portion includes a light-emitting element configured to emit light in a direction opposite to the first surface. A pixel in the imaging portion is electrically connected to a pixel in the display portion. An image signal obtained at the imaging portion can be directly input to the display portion. Accordingly, the time delay due to data conversion can be eliminated, so that a captured image can be displayed in a moment.
    Type: Application
    Filed: April 16, 2018
    Publication date: April 23, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki IKEDA, Naoto KUSUMOTO
  • Patent number: 10573621
    Abstract: An imaging system using ultraviolet light or a manufacturing apparatus including the imaging system is provided. An imaging system includes an imaging element and a light source, which operates the imaging element with light that is emitted from the light source and reflected or transmitted by an object. A pixel included in the imaging element includes a photoelectric conversion element and a charge holding part. The light source has a function of emitting ultraviolet light to an object. The photoelectric conversion element is irradiated with the ultraviolet light reflected or transmitted by the object. The photoelectric conversion element has a function of changing the potential of the charge holding part when irradiated with the ultraviolet light and retaining the potential when not irradiated with the ultraviolet light.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: February 25, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akio Endo, Yusuke Yoshitani, Jun Koyama, Naoto Kusumoto
  • Patent number: 10541375
    Abstract: A display device with a narrow bezel is provided. The display device includes a pixel circuit and a driver circuit which are provided on the same plane. The driver circuit includes a selection circuit and a buffer circuit. The selection circuit includes a first transistor. The buffer circuit includes a second transistor. The first transistor has a region overlapping with the second transistor. One of a source and a drain of the first transistor is electrically connected to a gate of the second transistor. One of a source and a drain of the second transistor is electrically connected to the pixel circuit.
    Type: Grant
    Filed: July 19, 2017
    Date of Patent: January 21, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideaki Shishido, Naoto Kusumoto
  • Publication number: 20190384079
    Abstract: A display device includes a first region and a second region adjacent to the first region. A display element included in the first region has a function of reflecting visible light and a function of emitting visible light. A display element included in the second region has a function of emitting visible light. In an electronic device including the display device, the first region is located on a first surface (e.g., top surface) on which a main image is displayed, and the second region is located on a second surface (e.g., side surface) on which an auxiliary image is displayed.
    Type: Application
    Filed: August 23, 2019
    Publication date: December 19, 2019
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke KUBOTA, Naoto KUSUMOTO
  • Publication number: 20190378859
    Abstract: A display device capable of improving image quality with low power consumption is provided. A storage node is provided in each pixel and a first signal can be held in the storage node. A second signal is added to the first signal by capacitive coupling to generate a third signal. A display element operates in response to the third signal. Thus, regardless of the output voltage of a driver that supplies data, a high voltage can be supplied to the display element. Consequently, even a display element that requires a relatively high voltage for operation can operate with low power consumption.
    Type: Application
    Filed: May 30, 2019
    Publication date: December 12, 2019
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Susumu KAWASHIMA, Naoto KUSUMOTO
  • Publication number: 20190371848
    Abstract: An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.
    Type: Application
    Filed: August 15, 2019
    Publication date: December 5, 2019
    Inventors: Takayuki IKEDA, Naoto KUSUMOTO
  • Publication number: 20190355770
    Abstract: An imaging device with low power consumption is provided. The pixel of the imaging device includes first and second photoelectric conversion elements, and first to fifth transistors. A cathode of the first photoelectric conversion element is electrically connected to the first transistor. An anode of a second photoelectric conversion element is electrically connected to the second transistor. Imaging data of a reference frame is obtained using the first photoelectric conversion element, and then imaging data of a difference detection frame is obtained using the second photoelectric conversion element. After the imaging data of the difference detection frame is obtained, a first potential that is a potential of a signal output from the pixel and a second potential that is a reference potential are compared. Whether or not there is a difference between the imaging data of the reference frame and the imaging data of the difference detection frame is determined using the first potential and the second potential.
    Type: Application
    Filed: August 1, 2019
    Publication date: November 21, 2019
    Inventors: Takuro OHMARU, Naoto KUSUMOTO, Kentaro HAYASHI
  • Patent number: 10477192
    Abstract: A display system which enables a stereoscopic image to be perceived by the naked eye is provided. The display system includes a display panel which can display a first image, a second image, a third image, and a fourth image. The first image has a region overlapping with the third image. The second image has a region overlapping with the fourth image. The first image and the third image are perceived by one of the right and left eyes and the second image and the fourth image are perceived by the other of the right and left eyes, so that a composite image of the first to fourth images is stereoscopically perceivable.
    Type: Grant
    Filed: September 12, 2017
    Date of Patent: November 12, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akio Suzuki, Naoto Kusumoto
  • Publication number: 20190283186
    Abstract: A laser processing apparatus and a stack processing apparatus are provided. The laser processing apparatus includes a laser oscillator and an optical system for forming a linear beam and an x-y-? or x-? stage. With use of the x-y-? or x-? stage, the object to be processed can be moved and rotated in the horizontal direction. With this operation, a desired region of the object to be processed can be efficiently irradiated with laser light, and the area occupied by a chamber provided with the x-y-? or x-? stage can be made small.
    Type: Application
    Filed: October 26, 2017
    Publication date: September 19, 2019
    Inventors: Shunpei YAMAZAKI, Naoto KUSUMOTO
  • Patent number: 10394069
    Abstract: A display device includes a first region and a second region adjacent to the first region. A display element included in the first region has a function of reflecting visible light and a function of emitting visible light. A display element included in the second region has a function of emitting visible light. In an electronic device including the display device, the first region is located on a first surface (e.g., top surface) on which a main image is displayed, and the second region is located on a second surface (e.g., side surface) on which an auxiliary image is displayed.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: August 27, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Daisuke Kubota, Naoto Kusumoto
  • Patent number: 10388687
    Abstract: An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.
    Type: Grant
    Filed: April 9, 2018
    Date of Patent: August 20, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Naoto Kusumoto
  • Patent number: 10373991
    Abstract: An imaging device with low power consumption is provided. The pixel of the imaging device includes first and second photoelectric conversion elements, and first to fifth transistors. A cathode of the first photoelectric conversion element is electrically connected to the first transistor. An anode of a second photoelectric conversion element is electrically connected to the second transistor. Imaging data of a reference frame is obtained using the first photoelectric conversion element, and then imaging data of a difference detection frame is obtained using the second photoelectric conversion element. After the imaging data of the difference detection frame is obtained, a first potential that is a potential of a signal output from the pixel and a second potential that is a reference potential are compared. Whether or not there is a difference between the imaging data of the reference frame and the imaging data of the difference detection frame is determined using the first potential and the second potential.
    Type: Grant
    Filed: August 8, 2016
    Date of Patent: August 6, 2019
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takuro Ohmaru, Naoto Kusumoto, Kentaro Hayashi
  • Publication number: 20190147312
    Abstract: Thin film integrated circuits are peeled from a substrate and the peeled thin film integrated circuits are sealed, efficiently in order to improve manufacturing yields. The present invention provides laminating system comprising transporting means for transporting a substrate provided with a plurality of thin film integrated circuits; first peeling means for bonding first surfaces of the thin film integrated circuits to a first sheet member to peel the thin film integrated circuits from the substrate; second peeling means for bonding second surfaces of the thin film integrated circuits to a second sheet member to peel the thin film integrated circuits from the first sheet member; and sealing means for interposing the thin film integrated circuits between the second sheet member and a third sheet member to seal the thin film integrated circuit with the second sheet member and the third sheet member.
    Type: Application
    Filed: January 15, 2019
    Publication date: May 16, 2019
    Inventors: Ryosuke WATANABE, Naoto KUSUMOTO, Osamu NAKAMURA
  • Patent number: 10109667
    Abstract: An imaging device that has a structure where a transistor is used in common by a plurality of pixels and is capable of imaging with a global shutter system is provided. A transistor that resets the potential of a charge detection portion, a transistor that outputs a signal corresponding to the potential of the charge detection portion, and a transistor that selects a pixel are used in common by the plurality of pixels. A transistor is provided between a power supply line and a photoelectric conversion element. Exposure is performed by turning on the transistor. Imaging data is retained in a charge retention portion by turning off the transistor.
    Type: Grant
    Filed: September 29, 2016
    Date of Patent: October 23, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Naoto Kusumoto
  • Publication number: 20180233525
    Abstract: An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.
    Type: Application
    Filed: April 9, 2018
    Publication date: August 16, 2018
    Inventors: Takayuki IKEDA, Naoto KUSUMOTO
  • Patent number: 10020336
    Abstract: An imaging device having a three-dimensional integration structure is provided. A first structure including a transistor including silicon in an active layer or an active region and a second structure including an oxide semiconductor in an active layer are fabricated. After that, the first and second structures are bonded to each other so that metal layers included in the first and second structures are bonded to each other; thus, an imaging device having a three-dimensional integration structure is formed.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: July 10, 2018
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Naoto Kusumoto