Patents by Inventor Naoya Okamoto

Naoya Okamoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8977716
    Abstract: The present invention relates to an information processing device, an information processing method, and a program for easily acquiring information. A television receiver accesses an application server and acquires an application list therefrom. When an application is selected from the application list, the television receiver again accesses the application server and acquires the selected application therefrom. While executing a process based on the acquired application, the television receiver accesses a content server as needed and acquires content data therefrom. The acquired application and content data are deleted from a storage unit when an end of the process based on the application is designated. The present invention applies to television receivers which acquire data via a network.
    Type: Grant
    Filed: January 31, 2008
    Date of Patent: March 10, 2015
    Assignee: Sony Corporation
    Inventors: Naoya Okamoto, Ken Onogi, Fujio Nobori, Seiichi Aoyagi
  • Patent number: 8969919
    Abstract: A field-effect transistor includes a carrier transport layer made of nitride semiconductor, a gate electrode having first and second sidewall surfaces on first and second sides, respectively, an insulating film formed directly on the gate electrode to cover at least one of the first and second sidewall surfaces, first and second ohmic electrodes formed on the first and second sides, respectively, a passivation film including a first portion extending from the first ohmic electrode toward the gate electrode to cover a surface area between the first ohmic electrode and the gate electrode and a second portion extending from the second ohmic electrode toward the gate electrode to cover a surface area between the second ohmic electrode and the gate electrode, wherein the insulating film is in direct contact with at least the first and second passivation film portions, and has a composition different from that of the passivation film.
    Type: Grant
    Filed: December 6, 2011
    Date of Patent: March 3, 2015
    Assignee: Fujitsu Limited
    Inventors: Toshihiro Ohki, Naoya Okamoto
  • Patent number: 8969921
    Abstract: A semiconductor device is provided with: a GaN layer; an anode electrode that forms a Schottky junction with a Ga face of the GaN layer; and an InGaN layer positioned between at least a part of the anode electrode and the GaN layer.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: March 3, 2015
    Assignee: Fujitsu Limited
    Inventors: Naoya Okamoto, Yuichi Minoura
  • Publication number: 20150027387
    Abstract: The influenced of condensed water on an EGR device is alleviated. A device (100) that controls a cooling system including adjusting means for being able to adjust a circulation amount of coolant in a first flow passage, including an engine cooling flow passage, an EGR cooling flow passage and a radiator flow passage, and a second flow passage, including the engine cooling flow passage, the EGR cooling flow passage and a bypass flow passage and not including the radiator flow passage, includes: measuring means for measuring a temperature of the coolant; limiting means for limiting circulation of the coolant at starting an internal combustion engine; and control means for circulating the coolant preferentially through the second flow passage via control over the adjusting means based on the Measured temperature in a period in which circulation of the coolant is limited.
    Type: Application
    Filed: December 19, 2011
    Publication date: January 29, 2015
    Inventors: Nobumoto Ohashi, Taro Aoyama, Naoya Okamoto, Yoshio Yamashita, Yuki Haba, Hajime Takagawa, Koki Uno, Naoki Takeuchi, Masashi Shinoda, Teruhiko Miyake, Koji Nakayama
  • Publication number: 20140367694
    Abstract: A semiconductor device includes a first semiconductor layer configured to be formed of a nitride semiconductor on a substrate; a second semiconductor layer configured to be formed of a nitride semiconductor on the first semiconductor layer; an insulation film configured to include an opening, and to be formed on the second semiconductor layer; a source electrode and a drain electrode configured to be formed on the second semiconductor layer; and a gate electrode configured to be formed at the opening on the second semiconductor layer. Both the insulation film and the second semiconductor layer include carbon in a neighborhood of an interface between the insulation film and the second semiconductor layer.
    Type: Application
    Filed: June 11, 2014
    Publication date: December 18, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Youichi KAMADA, Shirou OZAKI, Toshihiro Ohki, Kozo Makiyama, NAOYA OKAMOTO
  • Publication number: 20140354674
    Abstract: Provided is a multi-projector system including: projectors; an image outputting apparatus; and an adjusting apparatus to adjust images. Each of the projectors includes: a light-emitting unit to emit the modulated light; and a color adjusting unit to adjust colors of the projected image. The image outputting apparatus includes an outputting unit to output the first adjustment image and the second adjustment image as the input images of the projectors. The adjusting apparatus includes: an imaging unit to take a projected image and to output a captured image; an analyzing unit to analyze an image of the overlapping area from the captured image so as to determine a color component; and a controller for controlling the color adjusting unit of the first projector so that the color of the overlapping area is an achromatic color in accordance with the color component determined as a result of the analysis.
    Type: Application
    Filed: May 29, 2014
    Publication date: December 4, 2014
    Applicant: JVC KENWOOD CORPORATION
    Inventors: Naoya Okamoto, Ryosuke Nakagoshi
  • Publication number: 20140346525
    Abstract: A semiconductor device includes a first semiconductor layer formed of a nitride semiconductor on a substrate; a second semiconductor layer formed of a nitride semiconductor on the first semiconductor layer; a gate trench formed in the second semiconductor layer or in the second and first semiconductor layers; a gate electrode formed at the gate trench; and a source electrode and a drain electrode formed on the second semiconductor layer. The gate trench has terminal parts of a bottom of the gate trench formed shallower than a center part of the bottom. A part of a sidewall of the gate trench is formed of a surface including an a-plain surface. The center part of the bottom is a c-plain surface. The terminal parts of the bottom form a slope from the c-plain surface to the a-plain surface.
    Type: Application
    Filed: April 9, 2014
    Publication date: November 27, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Yuichi Minoura, NAOYA OKAMOTO
  • Patent number: 8875056
    Abstract: Provided is a display device including a display mode controller for controlling a transition to a whole screen display mode for displaying an image in an entire screen of a display section, a multiple content display mode for displaying, on the screen, multiple thumbnail images related to contents, or a panel display mode for displaying, on the screen, a panel on which information related to the contents is displayed, an arrangement determination section for arranging multiple thumbnail images displayed in the multiple content display mode by category to which the contents belong, an arrangement change section for changing an arrangement of multiple thumbnail images by a user, and a boundary line display section for displaying, between two thumbnail images, a boundary line indicating a difference of the category before the arrangement of the thumbnail images is changed by the user, and for not displaying the boundary line after changed.
    Type: Grant
    Filed: July 29, 2010
    Date of Patent: October 28, 2014
    Assignee: Sony Corporation
    Inventors: Ken Onogi, Koichi Tashiro, Naoya Okamoto
  • Publication number: 20140306231
    Abstract: A semiconductor device includes: a first electrode; a second electrode; an interlayer insulating film made of a porous insulating material and formed above the first electrode and the second electrode; and connection parts electrically connected to the first electrode and the second electrode respectively, wherein a cavity is formed between the interlayer insulating film and a surface of the first electrode, a surface of the second electrode, and parts of surfaces of the connection parts.
    Type: Application
    Filed: March 19, 2014
    Publication date: October 16, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, NAOYA OKAMOTO, Kozo Makiyama, Toshihiro Ohki
  • Publication number: 20140295666
    Abstract: A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.
    Type: Application
    Filed: June 11, 2014
    Publication date: October 2, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Naoya Okamoto, Kozo Makiyama, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • Publication number: 20140264451
    Abstract: A semiconductor device includes: a nitride semiconductor multilayer; an insulating film disposed on the nitride semiconductor multilayer; and a gate electrode disposed on the insulating film, wherein the nitride semiconductor multilayer has a first oxidized region near an interface with a region of the insulating film below the gate electrode, the first oxidized region having an oxygen concentration higher than an oxygen concentration of a region near an interface with a region of the insulating film other than below the gate electrode.
    Type: Application
    Filed: January 29, 2014
    Publication date: September 18, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Shirou OZAKI, NAOYA OKAMOTO
  • Patent number: 8819669
    Abstract: An information processing apparatus receives index information about an expansion function realized by being linked to a predetermined service provided by an external apparatus from a server apparatus connected via a network, displays a menu of information representing the expansion functions on a display screen, based on the index information, downloads software for executing the expansion function based on location information of the software when the expansion function being executed in accordance with a user selection on the menu on the display screen; the location information contained in the index information, and uses the downloaded software to executes the expansion function selected by an user.
    Type: Grant
    Filed: August 19, 2009
    Date of Patent: August 26, 2014
    Assignee: Sony Corporation
    Inventors: Hiroaki Dei, Seiichi Aoyagi, Naoya Okamoto, Yusuke Sakai
  • Publication number: 20140209861
    Abstract: A semiconductor device includes a drift layer having a structure wherein a plurality of quantum dot layers each including a quantum dot containing InxGa1-xN (0?x?1) and a burying layer burying the quantum dot and containing n-type Inx(GayAl1-y)1-xN (0?x?1, 0?y?1) are stacked.
    Type: Application
    Filed: April 1, 2014
    Publication date: July 31, 2014
    Applicant: FUJITSU LIMITED
    Inventor: NAOYA OKAMOTO
  • Publication number: 20140209893
    Abstract: A semiconductor device includes: a first semiconductor layer of a nitride semiconductor formed on a substrate; a second semiconductor layer of a nitride semiconductor formed on the first semiconductor layer; and a gate electrode, a source electrode, a drain electrode, and a hole extraction electrode, each of which is formed on the second semiconductor layer, wherein between the source electrode and the hole extraction electrode or in a region right under the source electrode, the first semiconductor layer and the second semiconductor layer form a vertical interface approximately perpendicular to a surface of the substrate, and a surface of the first semiconductor layer configured to form the vertical interface is an N-polar surface.
    Type: Application
    Filed: October 17, 2013
    Publication date: July 31, 2014
    Applicant: FUJITSU LIMITED
    Inventor: NAOYA OKAMOTO
  • Patent number: 8791465
    Abstract: A compound semiconductor device includes a compound semiconductor laminated structure, a passivation film formed on the compound semiconductor laminated structure and having a through-hole, and a gate electrode formed on the passivation film so as to plug the through-hole. A grain boundary between different crystalline orientations is formed in the gate electrode, and a starting point of the grain boundary is located apart from the through-hole on a flat surface of the passivation film.
    Type: Grant
    Filed: July 16, 2012
    Date of Patent: July 29, 2014
    Assignee: Fujitsu Limited
    Inventors: Naoya Okamoto, Kozo Makiyama, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • Patent number: 8789103
    Abstract: Provided is a display device including a display mode controller for controlling a screen transition to a whole screen display mode for displaying an image in an entire screen of a display section, a multiple content display mode for displaying, on the screen, a plurality of thumbnail images related to contents, or a panel display mode for displaying, on the screen, a panel on which information related to the contents is displayed, and a panel shape determination section for determining a shape of the panel based on the contents to be displayed on the panel.
    Type: Grant
    Filed: August 2, 2010
    Date of Patent: July 22, 2014
    Assignee: Sony Corporation
    Inventors: Ken Onogi, Koichi Tashiro, Naoya Okamoto
  • Publication number: 20140185347
    Abstract: An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.
    Type: Application
    Filed: March 10, 2014
    Publication date: July 3, 2014
    Applicant: FUJITSU LIMITED
    Inventors: Kozo Makiyama, Naoya Okamoto, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • Patent number: 8709886
    Abstract: An HEMT includes, on an SiC substrate, a compound semiconductor layer, a silicon nitride (SiN) protective film having an opening and covering the compound semiconductor layer, and a gate electrode formed on the compound semiconductor layer so as to plug the opening. In the protective film, a projecting portion projecting from a side surface of the opening is formed at a lower layer portion 6a.
    Type: Grant
    Filed: July 23, 2012
    Date of Patent: April 29, 2014
    Assignee: Fujitsu Limited
    Inventors: Kozo Makiyama, Naoya Okamoto, Toshihiro Ohki, Yuichi Minoura, Shirou Ozaki, Toyoo Miyajima
  • Patent number: 8704273
    Abstract: A semiconductor device includes a nitride semiconductor layer having a (0001) face and a (000-1) face, formed above a common substrate; a (0001) face forming layer provided partially between the substrate and the nitride semiconductor layer; a source electrode, a drain electrode, and a gate electrode, provided on the nitride semiconductor layer having the (0001) face; and a hole extracting electrode provided on the nitride semiconductor layer having the (000-1) face.
    Type: Grant
    Filed: June 3, 2010
    Date of Patent: April 22, 2014
    Assignee: Fujitsu Limited
    Inventors: Naoya Okamoto, Atsushi Yamada
  • Publication number: 20140084344
    Abstract: A compound semiconductor device includes: an electron transit layer formed of a compound semiconductor; and an electrode formed so as to overlie the electron transit layer with an insulating film interposed between the electron transit layer and the electrode, wherein part of the electron transit layer below the electrode are formed such that a first compound semiconductor having a first polar face and a second compound semiconductor having a second polar face are alternately arranged, and polarization charges in the first polar face have opposite polarity to polarization charges in the second polar face.
    Type: Application
    Filed: July 23, 2013
    Publication date: March 27, 2014
    Applicant: Fujitsu Limited
    Inventors: LEI ZHU, NAOYA OKAMOTO