Patents by Inventor Narendra Kumar
Narendra Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250072392Abstract: The present disclosure includes a smart pet bowl to monitor pet feeding behavior, which includes a pet bowl to carry pet food or water or carry a bowl insert to carry pet food or water. The smart pet bowl also can include a load sensor associated with the pet bowl that is sensitive to load changes of pet food or water carried within the pet bowl. The load sensor has a sensitivity of +/?50 grams or less and load data collectable therefrom is at a sample rate from 10 to 150 samples per second in sequential time increments from about 0.01 second to 5 seconds. The smart pet bowl may also include a data communicator to communicate the load data over a computer network, a processor, and a memory storing instructions that, when executed by the processor, communicates the load data over the computer network.Type: ApplicationFiled: August 21, 2024Publication date: March 6, 2025Applicant: Société des Produits Nestlé S.A.Inventors: Natalie Langenfeld-McCoy, Ragen Trudelle-Schwarz McGowan, Mark Donavon, Mark Harris, Julia Foti, Kristin Slater, Srikanth Vemparala, Helber Dussan, Nicholas Schoeneck, Olivia Arndt, Sarah Thomas, LeAnn Snow, Stuart Neubarth, Sanjay Kalsangra, Sarath Malipeddi, Rabinarayan Swain, Shivam Awasthi, Dwarakanath Raghavendra Ravi, Mohammed Affan Khan, Vignesh Chockalingam Arun, Narendra Kumar Murugan, Mani Bharath Kamaraj, Julien BELAHBIB
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Publication number: 20250072401Abstract: The present disclosure relates to the monitoring feeding behavior(s) of a pet(s), under the control of at least one processor. An example method includes obtaining load data from a load sensor of a pet bowl while the pet is interacting with contents of the pet bowl. The load sensor can have a sensitivity of +/?50 grams or less and the load data is obtained can occur at a sample rate from 10 samples to 150 samples per second. The example method can also include sequentially grouping the load data in 0.01 second to 5 second time increments, wherein individual time increments include multiple samples, and identifying a feeding behavior occurring within one or more of the time increments based on the load data resulting from the pet interacting with the pet bowl or the contents of the pet bowl.Type: ApplicationFiled: August 21, 2024Publication date: March 6, 2025Applicant: Société des Produits Nestlé S.A.Inventors: Natalie Langenfeld-McCoy, Ragen Trudelle-Schwarz McGowan, Mark Alan Donavon, Mark Harris, Julia Foti, Kristin Slater, Srikanth Vemparala, Helber Dussan, Nicholas Schoeneck, Olivia Arndt, Sarah Thomas, LeAnn Snow, Stuart Neubarth, Sanjay Kalsangra, Sarath Malipeddi, Rabinarayan Swain, Shivam Awasthi, Dwarakanath Raghavendra Ravi, Mohammed Affan Khan, Vignesh Chockalingam Arun, Narendra Kumar Murugan, Julien BELAHBIB, Mani Bharath Kamaraj
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Publication number: 20250061926Abstract: Memory driver circuitry for driving a memory cell or cells of a memory device includes first driver path circuitry and selection circuitry. The first driver path circuitry includes driver circuitry that outputs a first signal and selection circuitry that receives the first signal and a second signal, and outputs a first selected signal. The first selected signal is a selected one of the first signal and the second signal. The selection circuitry of the memory driver circuitry receives a third signal and a fourth signal, and outputs a bias voltage signal to header circuitry of a memory cell. The bias voltage signal is a selected one of the third signal and the fourth signal. The third signal corresponds to the first selected signal.Type: ApplicationFiled: August 18, 2023Publication date: February 20, 2025Inventors: Santosh YACHARENI, Sree Rama Krishna Chaithnya SARASWATULA, Shidong ZHOU, Anil Kumar KANDALA, Narendra Kumar PULIPATI
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Publication number: 20250047285Abstract: A level shifter may include a first transistor stack including at least four transistors arranged from a first voltage source to ground, including second and third transistors coupled with bias voltage source, and a fourth transistor coupled with an input to receive an input signal at a second voltage or ground. The level shifter may include a second transistor stack comprising at least four transistors arranged from the first voltage source to ground, including second and third transistors coupled with the bias voltage source, and a fourth transistor to receive an inverse of the input signal. A first transistor of the first transistor stack is cross-coupled with a first transistor of the second transistor stack. A level shifter may include a first output coupled with the second transistor stack between the second and third transistors to provide a first output signal at the first voltage or ground.Type: ApplicationFiled: August 1, 2023Publication date: February 6, 2025Inventors: Lakshmi Venkata Satya Lalitha Indumathi JANASWAMY, Narendra Kumar PULIPATI, Shidong ZHOU, Anil Kumar KANDALA, Santosh YACHARENI, Sree Rama Krishna Chaithnya SARASWATULA
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Publication number: 20250014240Abstract: The invention is an improvement over the existing UML and non UML script based diagram drawing tools to show an optimal and reduced initial presentation of the diagram, to provide the user with the controls to both view and re-define conditions of branches and their list of possible values in real time and to update the diagram with different versions corresponding to the values that the user optionally chooses for these conditions.Type: ApplicationFiled: April 22, 2024Publication date: January 9, 2025Inventor: Narendra Kumar Narayanan
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Patent number: 12155941Abstract: Multiple regions of a scene are identified, for example through user inputs to a touchscreen while the touchscreen displays preview frames of the scene. Multiple exposure settings are determined based on the identified regions. Each exposure setting is determined based on one of the identified regions, for instance to optimally expose that region. Multiple image frames are captured of the scene, with each image frame captured at a different one of the determined exposure settings. A high dynamic range (HDR) image of the scene is generated by merging the multiple image frames of the scene.Type: GrantFiled: December 14, 2020Date of Patent: November 26, 2024Assignee: QUALCOMM IncorporatedInventors: Nithin Varghese, Nitin Srivastava, Narendra Kumar Chepuri
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Patent number: 12153457Abstract: A cascaded thin-oxide N-Well voltage steering circuit includes a reference voltage generator that outputs a reference voltage within a range of first and second supply voltages, a first voltage steering circuit that outputs a higher available one of the reference voltage and the second supply voltage as an interim voltage, and a second voltage steering circuit that outputs a higher available one of the first voltage and the interim voltage at an output of the second voltage steering circuit. The interim voltage is applied to N-wells of PMOS transistors of the first voltage steering circuit. The output of the second voltage steering circuit is applied to N-wells of PMOS transistors of the second voltage steering circuit. The output of the second voltage steering circuit may also be applied to N-wells of PMOS transistors of other circuitry. The cascaded thin-oxide N-Well voltage steering circuit may consist substantially of thin-oxide PMOS transistors.Type: GrantFiled: April 20, 2023Date of Patent: November 26, 2024Assignee: XILINX, INC.Inventors: Lakshmi Venkata Satya Lalitha Indumathi Janaswamy, Sree Rama Krishna Chaithnya Saraswatula, Santosh Yachareni, Anil Kumar Kandala, Narendra Kumar Pulipati, Shidong Zhou
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Publication number: 20240353879Abstract: A cascaded thin-oxide N-Well voltage steering circuit includes a reference voltage generator that outputs a reference voltage within a range of first and second supply voltages, a first voltage steering circuit that outputs a higher available one of the reference voltage and the second supply voltage as an interim voltage, and a second voltage steering circuit that outputs a higher available one of the first voltage and the interim voltage at an output of the second voltage steering circuit. The interim voltage is applied to N-wells of PMOS transistors of the first voltage steering circuit. The output of the second voltage steering circuit is applied to N-wells of PMOS transistors of the second voltage steering circuit. The output of the second voltage steering circuit may also be applied to N-wells of PMOS transistors of other circuitry. The cascaded thin-oxide N-Well voltage steering circuit may consist substantially of thin-oxide PMOS transistors.Type: ApplicationFiled: April 20, 2023Publication date: October 24, 2024Inventors: Lakshmi Venkata Satya Lalitha Indumathi JANASWAMY, Sree Rama Krishna Chaithnya SARASWATULA, Santosh YACHARENI, Anil Kumar KANDALA, Narendra Kumar PULIPATI, Shidong ZHOU
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Patent number: 12115481Abstract: A filter assembly comprises a housing defining an internal volume. The housing defines an outlet. A housing ledge extends radially inwards from a rim of the outlet. An outlet conduit comprises an outlet elbow, and an outlet tube extending axially from the outlet elbow towards the housing. The outlet tube is positioned within the housing. A rib extends radially from an outer surface of the outlet tube proximate to the outlet elbow. The rib engages the housing ledge so as to couple the outlet conduit to the housing. A filter element is also positioned within the housing.Type: GrantFiled: May 23, 2019Date of Patent: October 15, 2024Assignee: Cummins Filtration IP, Inc.Inventor: Narendra Kumar Tripathi
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Patent number: 12120141Abstract: In an example implementation according to aspects of the present disclosure, a system, method, and storage medium to identify and score security vulnerabilities is disclosed. A memory and a processor receive security-related data from a plurality of client computing devices, create a security score for each the client computing devices. The processor identifies a subset of the client computing devices with security scores surpassing a threshold and remediates a security vulnerability on each of the subset.Type: GrantFiled: July 28, 2021Date of Patent: October 15, 2024Assignee: Hewlett-Packard Development Company, L.P.Inventors: Narendra Kumar Chincholikar, Sanket Anavkar, Vaibhav Tarange, Manohar Lal Kalwani
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Publication number: 20240319135Abstract: A method for fabricating a multianalyte detection device. The multianalyte detection device includes a substrate having a plurality of graphene field effect transistor devices each having a source, a drain, and a side gate located thereon. A graphene layer deposited on the substrate to form a plurality of graphene active regions between the source electrode and the drain electrode of each of the plurality of graphene field effect transistors for detection of an analyte therein. A plurality of graphene windows are located on the graphene active regions for receiving a liquid for detecting of the analyte therein. One or more passivation layers are positioned on the substrate to protect the source electrode and the drain electrode for each of the plurality of graphene field effect transistor devices from the liquid received in the plurality of graphene windows.Type: ApplicationFiled: June 28, 2022Publication date: September 26, 2024Applicant: The Trustees of Boston CollegeInventors: Kenneth S. Burch, Narendra Kumar, Michael Geiwitz, Matthew Catalano
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Publication number: 20240287077Abstract: The present teachings provide a compound represented by the following structural formula: or a pharmaceutically acceptable salt thereof. Also described are pharmaceutical compositions and methods of use thereof.Type: ApplicationFiled: December 20, 2023Publication date: August 29, 2024Inventors: Radoslaw Laufer, Grace Ng, Sze-Wan Li, Heinz W. Pauls, Yong Liu, Narendra Kumar B. Patel
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Publication number: 20240222354Abstract: Techniques to utilize thin-oxide devices, such as gate-all-around metal-oxide-semiconductor field-effect transistors (MOSFETs), in high voltage environments, such as to provide a high-voltage based low-power, temperature dependent, thin-oxide-only on-chip high current low drop out (LDO) regulator in a system-on-chip (SoC), such as provide power to configuration random-access memory (CRAM) cells distributed throughout configurable/programmable circuitry. Thin-oxide only circuitry may include thin-oxide-only amplifier circuitry, thin-oxide-only power gate circuitry, thin-oxide-only level shifters that shift voltage swings of control signals to voltage domains of the power gate circuitry, and thin-oxide-only clamp circuitry.Type: ApplicationFiled: December 30, 2022Publication date: July 4, 2024Inventors: Narendra Kumar PULIPATI, Sree Rama Krishna Chaithnya SARASWATULA, Santosh YACHARENI, Anil Kumar KANDALA, Shidong ZHOU
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Patent number: 12026475Abstract: Examples are described herein for facilitating responses to computing device service requests. In various examples, natural language processing may be performed on a plurality of incoming computing device service requests associated with a plurality of computing devices. A plurality of embeddings corresponding to the plurality of computing device service requests may be generated based on the natural language processing. Based on distances between each of a particular subset of the embeddings in an embedding space, a trending service issue associated with the computing device service requests corresponding to the particular subset may be predicted. The trending service issue may be provided to a computing device servicer associated with resolving a new incoming computing device service request.Type: GrantFiled: March 1, 2022Date of Patent: July 2, 2024Assignee: Hewlett-Packard Development Company, L.P.Inventors: Abhishek Jangid, Mohit Sonje, Ravindra Ramtekkar, Narendra Kumar Chincholikar
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Patent number: 12007354Abstract: A method and system for label-free detection of pathogenic and antibiotic resistant bacteria is disclosed. The method includes fabricating a G-FET/peptide device having a synthesized peptide probe capable of recognizing and binding to a bacterial target; performing electric-field assisted binding of at least one bacterial cell of the bacterial target to the G-FET/peptide device; and electrically detecting the binding of the at least one bacterial cell to the G-FET/peptide device.Type: GrantFiled: November 6, 2020Date of Patent: June 11, 2024Assignee: The Trustees of Boston CollegeInventors: Kenneth S. Burch, Tim van Opijnen, Jianmin Gao, Narendra Kumar, Juan C. Ortiz-Marquez, Wenjian Wang, Mason Gray
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Patent number: 11929941Abstract: Embodiments of the present disclosure relate to method and a system for managing a decentralized access to a resource. A user of a client device having a third-party application installed therein request to join the mesh network based on invite received from the owner of the IoT gateway. The mesh network comprises one or more IoT gateway. One gateway is identified based on the topology of the client device, and an optimal connection between the client device and the identified gateway is determined. The third-party application may send a resource access request for accessing a resource of the mesh network and access the requested resource through the optimal connection route thus determined. Thus, the disclosure enables a peer-to-peer mesh network infrastructure that allows secure access to the resource by a third-party application without using a cloud server to route the resource access request from the client device to the gateway.Type: GrantFiled: July 15, 2021Date of Patent: March 12, 2024Assignee: Elear Solutions Tech Private LimitedInventors: Manav Kumar Mehta, Narendra Kumar Agarwal
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Publication number: 20240053295Abstract: A method and system for label-free detection of pathogenic and antibiotic resistant bacteria is disclosed. The method includes fabricating a G-FET/peptide device having a synthesized peptide probe capable of recognizing and binding to a bacterial target; performing electric-field assisted binding of at least one bacterial cell of the bacterial target to the G-FET/peptide device; and electrically detecting the binding of the at least one bacterial cell to the G-FET/peptide device.Type: ApplicationFiled: October 13, 2023Publication date: February 15, 2024Applicant: The Trustees of Boston CollegeInventors: Kenneth S. Burch, Tim van Opijnen, Jianmin Gao, Narendra Kumar, Juan C. Ortiz-Marquez, Wenjian Wang, Mason Gray
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Patent number: 11900091Abstract: Methods, apparatus, and processor-readable storage media for implementing extensible upgrade and modification as a service are provided herein. An example computer-implemented method includes processing one or more modifiers, wherein each modifier includes an independent processing unit having a given canonical structure and is configured to execute one or more automated actions related to at least one of application modification and application migration; obtaining data pertaining to multiple applications across multiple computing environments; determining, based at least in part on processing at least a portion of the obtained data, at least one of the one or more modifiers applicable for use in executing at least one of the one or more automated actions in connection with at least a portion of the multiple applications; and executing the at least one of the one or more automated actions using the at least one determined modifier.Type: GrantFiled: January 12, 2021Date of Patent: February 13, 2024Assignee: Dell Products, L.P.Inventors: Nilay Mishra, Farook Shaik, Reshma Nair, Gaurav Suwal, Vishnu Prabhu Sundarrajan, Manikandan Pammal Rathinavelu, Bala Kumar, Narendra Kumar, Hung T. Dinh, Vijaya P. Sekhar, Abhijit Mishra, Satish Ranjan Das, Krishna Mohan Akkinapalli
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Patent number: 11900139Abstract: A method of executing workflows in virtual machines that have been deployed to implement virtual network functions of a network service, wherein the virtual machines are running in a plurality of data centers each having a cloud management server running a cloud computing management software to provision virtual infrastructure resources thereof for a plurality of tenants, includes upon receiving a request to execute a workflow along with a plurality of parameters including first and second parameters at a data center, identifying a virtual machine deployed in the data center, in which the workflow is to be executed based on the first parameter, designating one of a plurality of methods by which the workflow is to be executed in the virtual machine according to the second parameter, and issuing a command to the virtual machine to execute the workflow according to the designated method.Type: GrantFiled: November 4, 2020Date of Patent: February 13, 2024Assignee: VMware, Inc.Inventors: Sachin Thakkar, Prashant Waykar, Akshatha Sathyanarayan, Narendra Kumar Basur Shankarappa, Shruti Parihar
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Publication number: 20240028322Abstract: An example method of upgrading remote sites of a distributed container orchestration system includes: deploying, by upgrade software executing in a data center remote from the remote sites, a second container orchestration (CO) control plane executing concurrently with a first CO control plane, the second CO control plane having a second version different than a first version of the first CO control plane, the first CO control plane initially managing all of the remote sites; upgrading, by the upgrade software, CO support software of a first portion of the remote sites; adding, by the upgrade software, the first portion of the remote sites to a second CO cluster managed by the second CO control plane; and removing, by the upgrade software, the first portion of the remote sites from a first CO cluster managed by the first CO control plane.Type: ApplicationFiled: September 7, 2022Publication date: January 25, 2024Inventors: Weiqing WU, Uday Suresh MASUREKAR, Liang CUI, Govind HARIDAS, Narendra Kumar BASUR SHANKARAPPA