Abstract: Systems and methods for generating control signal in radiation detector systems are provided. One system includes a scheduling architecture having at least one anode channel connected to a detector of the radiation detector system. The anode channel includes a charge sensitive amplifier and a signal shaper, wherein the anode channel is configured to generate at least one control signal to control data acquisition by the detector. The scheduling architecture also includes at least one shaper timer configured having a time constant to define timing for the generation of the control signal without using a clock.

Abstract: A system and method for soft-field tomography data acquisition are provided. One system includes a plurality of transducers that correspond to a plurality of channels, and an excitation driver coupled to generate excitation signals for the plurality of transducers. The system also includes a single reference excitation source from which excitations are generated and one or more derived excitation sources. The one or more derived excitation sources derive excitations from the single reference excitation source that are applied to each of the plurality of channels. The system further includes a response detector and a reduced bit digitizer in each of the plurality of channels configured to digitize a measured response difference between the measured response at one or more of the transducers and at least one of an excitation of the single reference excitation source or an excitation derived from the single reference excitation source or a separate reference.

Abstract: A method for regulating the acquisition of an analog input signal from a digital X-ray panel is provided. The method includes opening a switch disposed between an integrator and the digital X-ray panel prior to an integrator event or upon detection of a fault in the digital X-ray panel to decouple the integrator from the digital X-ray panel, wherein the integrator is configured to integrate the analog input signal from the digital X-ray panel. Also, a system for data acquisition is provided. Further, a method for fault protection of the digital X-ray panel is provided.

Abstract: A transmission circuit for use with an ultrasonic probe including an ultrasonic transducer is provided. The transmission circuit includes a high voltage current DAC configured to output a drive current of an ultrasonic transducer to transmit and receive ultrasound, and a waveform generator configured to output a control signal from the high voltage current DAC to the high voltage current DAC with a predetermined timing. The control signal configured to output the drive current with a desired magnitude.

Abstract: Systems and methods for generating control signal in radiation detector systems are provided. One system includes a scheduling architecture having at least one anode channel connected to a detector of the radiation detector system. The anode channel includes a charge sensitive amplifier and a signal shaper, wherein the anode channel is configured to generate at least one control signal to control data acquisition by the detector. The scheduling architecture also includes at least one shaper timer configured having a time constant to define timing for the generation of the control signal without using a clock.

Abstract: A transmission circuit for use with an ultrasonic probe including an ultrasonic transducer is provided. The transmission circuit includes a high voltage current DAC configured to output a drive current of an ultrasonic transducer to transmit and receive ultrasound, and a waveform generator configured to output a control signal from the high voltage current DAC to the high voltage current DAC with a predetermined timing. The control signal configured to output the drive current with a desired magnitude.

Abstract: Detector modules and methods of manufacturing are provided. One detector module includes a detector having a silicon wafer structure formed from a first layer having a first resistivity and a second layer having a second resistivity, wherein the first resistivity is greater than the second resistivity. The detector further includes a photosensor device provided with the first layer on a first side of the silicon wafer and one or more readout electronics provided with the second layer on a second side of the silicon wafer, with the first side being a different side than the second side.

Abstract: A data acquisition system includes a charge-sensitive amplifier (CSA) configured to receive a charge from an x-ray detector, the CSA includes a high-gain electronic voltage amplifier, an electrical energy storage device coupled with the amplifier, and an electrical resistor coupled with the amplifier. The data acquisition system includes a baseline sampling circuit configured to receive an output from the CSA and to sample a baseline signal from the CSA, at least one discriminator coupled to an output of the CSA and to an output of the baseline sampling circuit, the at least one discriminator configured to output a voltage if the output of the CSA exceeds a threshold, and a counter coupled to an output of the discriminator and configured to output a digital signal indicative of a photon count received at the x-ray detector and based on the output from the CSA and on the signal from the CSA.

Abstract: A multichannel digitizer and method of digitizing are provided. One digitizer includes an analog to digital convertor (ADC) having a plurality of channels receiving input analog signals; an operational amplifier in each channel and a comparator connected to the operational amplifier. The ADC further includes a logic circuit in each channel connected to the comparator and configured to generate an output based on a comparator signal received from the comparator. The ADC also includes a ramp generator connected to the plurality of channels and configured to provide a time varying reference signal.

Abstract: A system and method for soft-field tomography data acquisition are provided. One system includes a plurality of transducers that correspond to a plurality of channels, and an excitation driver coupled to generate excitation signals for the plurality of transducers. The system also includes a single reference excitation source from which excitations are generated and one or more derived excitation sources. The one or more derived excitation sources derive excitations from the single reference excitation source that are applied to each of the plurality of channels. The system further includes a response detector and a reduced bit digitizer in each of the plurality of channels configured to digitize a measured response difference between the measured response at one or more of the transducers and at least one of an excitation of the single reference excitation source or an excitation derived from the single reference excitation source or a separate reference.

Abstract: A transmission circuit for use with an ultrasonic probe including an ultrasonic transducer is provided. The transmission circuit includes a high voltage current DAC configured to output a drive current of an ultrasonic transducer to transmit and receive ultrasound, and a waveform generator configured to output a control signal from the high voltage current DAC to the high voltage current DAC with a predetermined timing. The control signal configured to output the drive current with a desired magnitude.

Abstract: A receiving circuit in an ultrasonic probe that includes an ultrasonic transducer configured to receive ultrasonic waves is provided. The receiving unit includes an amplification unit configured to amplify an echo signal received at the ultrasonic transducer. The amplification unit includes a current output amplifier. The receiving circuit further includes a delay unit configured to provide a delay time to output signals of the amplification unit.

Abstract: A method includes providing a wide bandgap semiconductor substrate that includes a first transistor and a second transistor defined thereon. The method also includes coupling the first transistor to the second transistor. The method further includes coupling a bias circuit to the first transistor and the second transistor and forming a junction therebetween. The method also includes coupling the first transistor to a first voltage source and coupling the second transistor to a second voltage source. The first voltage source and the second voltage source are configured to define a predetermined differential input voltage.

Abstract: A multichannel digitizer and method of digitizing are provided. One digitizer includes an analog to digital convertor (ADC) having a plurality of channels receiving input analog signals; an operational amplifier in each channel and a comparator connected to the operational amplifier. The ADC further includes a logic circuit in each channel connected to the comparator and configured to generate an output based on a comparator signal received from the comparator. The ADC also includes a ramp generator connected to the plurality of channels and configured to provide a time varying reference signal.

Abstract: An event time stamping system comprising a current source, an integrator comprising an input and an output, and configured to output a voltage proportional to the length of time the current source is coupled to the input, and one or more switches configured to couple the current source to the input of the integrator upon receipt of an event signal and configured to de-couple the current source from the input of the integrator upon receipt of a control trigger. The system further comprises a lock-out signal generator configured to generate a lock-out signal, and a controller coupled to the one or more switches, wherein the controller is configured to generate the control trigger based on the lock-out signal to ensure a minimum integration time.

Abstract: An application-specific integrated circuit (ASIC) comprising a plurality of channels, each channel having circuitry for time and energy discrimination, a plurality of programmable registers, each programmable register configured to output at least one configuration parameter for the circuitry, and a channel-select register configured to identify a channel of the plurality of channels to be configured. The ASIC further includes a configuration-select register configured to identify the programmable register to be used for channel configuration, and a communications interface configured to transmit instructions received from a controller to one of the channel-select register, the configuration-select register, and the plurality of programmable registers.

Abstract: According to embodiments of the present technique, a system and a method for obtaining low-noise measurements for a wide range of analog signal strengths is provided. According to aspects of the present technique, a low-gain measurement of an input pixel charge is performed, wherein the input pixel charge is distributed to two feedback capacitors, which together provide a relatively low integrator gain. After the low-gain measurement, a high-gain measurement is performed, wherein one of the capacitors is remove from the feedback loop and the charge is redistributed to the remaining capacitor.

Abstract: Predictive Analog-to-Digital Converter system in one embodiment includes a sampling section producing a sampled analog input signal with a first summer section combining the sampled analog input signal and an analog prediction signal to produce an analog prediction error signal. There is at least one error analog-to-digital convertor digitizing the analog prediction error signal, wherein a digital error signal output from the error analog-to-digital convertor is one of a full bitwidth error signal during an over-range condition else a lower bitwidth error signal. A second summer is coupled to the digital error signal output and a digital prediction signal, and generates a full bitwidth digital output signal. A feedback section is coupled to the digital output signal and providing the digital prediction signal and the analog prediction signal.

Abstract: A technique is provided for acquiring data with reduced correlated low frequency noise interference via a data acquisition circuit. The data acquisition circuit includes a plurality of data channels comprising a plurality of amplifiers and a biasing circuit for providing bias voltages to the plurality of amplifiers. The biasing circuit is configured to generate the bias voltages and establish a relationship between the bias voltages so as to reduce correlated low frequency noise in the plurality of amplifiers.

Abstract: Predictive Analog-to-Digital Converter system in one embodiment includes a sampling section producing a sampled analog input signal with a first summer section combining the sampled analog input signal and an analog prediction signal to produce an analog prediction error signal. There is at least one error analog-to-digital convertor digitizing the analog prediction error signal, wherein a digital error signal output from the error analog-to-digital convertor is one of a full bitwidth error signal during an over-range condition else a lower bitwidth error signal. A second summer is coupled to the digital error signal output and a digital prediction signal, and generates a full bitwidth digital output signal. A feedback section is coupled to the digital output signal and providing the digital prediction signal and the analog prediction signal.