Abstract: A circuit for converting a charge signal into a binary format of output bits comprises: an integration circuit including an operational transconductance amplifier having an inverting input terminal and an output terminal, an integrating capacitor connected between the inverting input terminal and the output terminal, the integrating capacitor for storing a charge input selectively provided by a sensor diode; and a folding circuit having a fold capacitor, the fold capacitor switchably coupled either to a fold voltage source via a fold buffer for charging the fold capacitor to a predetermined fold charge value, or to the integrating capacitor for selectively removing at least a portion of the stored charge input.

Abstract: An embodiment of the invention includes a radiation detecting pixel array. The radiation detecting pixel array includes a substrate, a plurality of radiation detecting pixels arranged in a grid pattern on the substrate, a signal routing array embedded within the substrate in operative communication with the plurality of radiation detecting pixels, and at least two symmetrical communication channels arranged on each of two sides of the grid pattern. The signal routing array is formed of communication channels configured to provide operative communication between any of the plurality of radiation detecting pixels and each of the at least two symmetrical communication channels.

Abstract: A method for managing clinical study (CS) information for a clinical research entity using a server system coupled to a centralized database and at least one client system is provided. The centralized database has a plurality of templates stored therein. The method includes receiving at the server system CS information relating to at least one patient involved in a clinical study wherein the CS information is entered through a user selected template displayed on the client system, storing CS information received at the server system in the centralized database, tracking CS information stored in the centralized database, updating the centralized database periodically with newly received CS information to maintain CS information, and providing CS information in response to an inquiry.

Abstract: A circuit for converting a charge signal into a binary format of output bits comprises: an integration circuit including an operational transconductance amplifier having an inverting input terminal and an output terminal, an integrating capacitor connected between the inverting input terminal and the output terminal, the integrating capacitor for storing a charge input selectively provided by a sensor diode; and a folding circuit having a fold capacitor, the fold capacitor switchably coupled either to a fold voltage source via a fold buffer for charging the fold capacitor to a predetermined fold charge value, or to the integrating capacitor for selectively removing at least a portion of the stored charge input.

Abstract: A data acquisition system includes a charge-sensitive amplifier (CSA) configured to receive a charge from an x-ray detector, the CSA includes a high-gain electronic voltage amplifier, an electrical energy storage device coupled with the amplifier, and an electrical resistor coupled with the amplifier. The data acquisition system includes a baseline sampling circuit configured to receive an output from the CSA and to sample a baseline signal from the CSA, at least one discriminator coupled to an output of the CSA and to an output of the baseline sampling circuit, the at least one discriminator configured to output a voltage if the output of the CSA exceeds a threshold, and a counter coupled to an output of the discriminator and configured to output a digital signal indicative of a photon count received at the x-ray detector and based on the output from the CSA and on the signal from the CSA.

Abstract: According to embodiments of the present technique, a system and a method for obtaining low-noise measurements for a wide range of analog signal strengths is provided. According to aspects of the present technique, a low-gain measurement of an input pixel charge is performed, wherein the input pixel charge is distributed to two feedback capacitors, which together provide a relatively low integrator gain. After the low-gain measurement, a high-gain measurement is performed, wherein one of the capacitors is remove from the feedback loop and the charge is redistributed to the remaining capacitor.

Abstract: A data acquisition system including a readout Application Specific Integrated Circuit (ASIC) having a plurality of channels, each channel having a time discriminating circuit and an energy discriminating circuit, wherein the ASIC is configured to receive a plurality of signals from a semiconductor radiation detector. The data acquisition system also includes a digital-to-analog converter (DAC) electrically coupled to the ASIC and configured to provide a reference signal to the ASIC used in the generation of digital outputs from the ASIC, and a controller electrically coupled to the ASIC and to the DAC, the controller configured to instruct the DAC to provide the reference signal to the ASIC.

Abstract: A radiation detector includes at least one multiple channel pixelated detector driven via a plurality of pixelated anode electrodes and at least one planar cathode electrode. Each detector is configured to reduce the number of active pixelated anode electrodes until a rate of events detected via at least one corresponding planar cathode electrode exceeds a preset threshold above a background count rate within a predetermined time period.

Abstract: An embodiment of the invention includes a radiation detecting pixel array. The radiation detecting pixel array includes a substrate, a plurality of radiation detecting pixels arranged in a grid pattern on the substrate, a signal routing array embedded within the substrate in operative communication with the plurality of radiation detecting pixels, and at least two symmetrical communication channels arranged on each of two sides of the grid pattern. The signal routing array is formed of communication channels configured to provide operative communication between any of the plurality of radiation detecting pixels and each of the at least two symmetrical communication channels.

Abstract: A radiation detector includes at least one multiple channel pixellated detector driven via a plurality of pixellated anode electrodes and at least one planar cathode electrode. Each detector is configured to reduce the number of active pixellated anode electrodes until a rate of events detected via at least one corresponding planar cathode electrode exceeds a preset threshold above a background count rate within a predetermined time period.

Abstract: A technique is provided for acquiring data with reduced correlated low frequency noise interference via a data acquisition circuit. The data acquisition circuit includes a plurality of data channels comprising a plurality of amplifiers and a biasing circuit for providing bias voltages to the plurality of amplifiers. The biasing circuit is configured to generate the bias voltages and establish a relationship between the bias voltages so as to reduce correlated low frequency noise in the plurality of amplifiers.

Abstract: A system and a method for converting an analog signal to a digital signal are provided. The technique involves receiving a sampled analog signal, and selecting one of a plurality of segments of a segmented relation between DAC output values and desired ADC input values. Desired gain and offset values are applied to the DAC output values or to the sampled analog signal based upon the selected segment. The sampled analog signal is converted to a digital signal based upon the desired gain and offset values.

Abstract: A data acquisition system including a readout Application Specific Integrated Circuit (ASIC) having a plurality of channels, each channel having a time discriminating circuit and an energy discriminating circuit, wherein the ASIC is configured to receive a plurality of signals from a semiconductor radiation detector. The data acquisition system also includes a digital-to-analog converter (DAC) electrically coupled to the ASIC and configured to provide a reference signal to the ASIC used in the generation of digital outputs from the ASIC, and a controller electrically coupled to the ASIC and to the DAC, the controller configured to instruct the DAC to provide the reference signal to the ASIC.

Abstract: An application-specific integrated circuit (ASIC) comprising a plurality of channels, each channel having circuitry for time and energy discrimination, a plurality of programmable registers, each programmable register configured to output at least one configuration parameter for the circuitry, and a channel-select register configured to identify a channel of the plurality of channels to be configured. The ASIC further includes a configuration-select register configured to identify the programmable register to be used for channel configuration, and a communications interface configured to transmit instructions received from a controller to one of the channel-select register, the configuration-select register, and the plurality of programmable registers.

Abstract: An event time stamping system comprising a current source, an integrator comprising an input and an output, and configured to output a voltage proportional to the length of time the current source is coupled to the input, and one or more switches configured to couple the current source to the input of the integrator upon receipt of an event signal and configured to de-couple the current source from the input of the integrator upon receipt of a control trigger. The system further comprises a lock-out signal generator configured to generate a lock-out signal, and a controller coupled to the one or more switches, wherein the controller is configured to generate the control trigger based on the lock-out signal to ensure a minimum integration time.

Abstract: An amplifier circuit and method for reducing bias noise is disclosed. The amplifier circuit includes a passive biasing source for supplying a desired bias signal to the amplifier and an active biasing source for energizing the passive biasing source to supply the desired bias signal. The amplifier circuit also includes a decoupler for selectively decoupling the active biasing source from the passive biasing source when the amplifier is configured for amplifying an input signal so that the amplifier remains isolated from electronic noise produced by the active biasing source while still being supplied the desired bias signal by the passive source.

Abstract: An amplifier circuit and method for reducing bias noise is disclosed. The amplifier circuit includes a passive biasing source for supplying a desired bias signal to the amplifier and an active biasing source for energizing the passive biasing source to supply the desired bias signal. The amplifier circuit also includes a decoupler for selectively decoupling the active biasing source from the passive biasing source when the amplifier is configured for amplifying an input signal so that the amplifier remains isolated from electronic noise produced by the active biasing source while still being supplied the desired bias signal by the passive source.

Abstract: An adaptive data acquisition circuit (26) includes an amplifier (14) for amplifying electrical pulses generated by a detector (12) responsive to energy incident at the detector. The adaptive data acquisition circuit also includes a counting circuit (28) for counting amplified electrical pulses generated by the amplifier. In addition, the adaptive data acquisition circuit includes a digital logic circuit (30) for determining a pulse parameter indicative of a pulse rate and an amount of energy present in the amplified electrical pulses and for generating a control signal (34) responsive to the pulse parameter for controlling an operating parameter of the data acquisition circuit.

Abstract: An adaptive data acquisition circuit (26) includes an amplifier (14) for amplifying electrical pulses generated by a detector (12) responsive to energy incident at the detector. The adaptive data acquisition circuit also includes a counting circuit (28) for counting amplified electrical pulses generated by the amplifier. In addition, the adaptive data acquisition circuit includes a digital logic circuit (30) for determining a pulse parameter indicative of a pulse rate and an amount of energy present in the amplified electrical pulses and for generating a control signal (34) responsive to the pulse parameter for controlling an operating parameter of the data acquisition circuit.

Abstract: An adaptive imaging system includes a detector receiving energy transmitted through a target and generating electrical charge pulses at a pulse rate indicative of an intensity of received energy. The system also includes a switch for selectively coupling the charge pulses from one or more pixel elements of the detector to a charge pulse counter for counting the charge pulses and a charge pulse integrator for integrating the charge pulses. In addition, the system includes a prediction module for predicting a charge pulse rate expected to be produced by the detector and for operating the switch to selectively couple the charge pulses to the counter and the integrator responsive to a predicted charge pulse rate.