Patents by Inventor Nasrullah

Nasrullah has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11728909
    Abstract: Described are methods and apparatuses pertaining to stacked integrated circuits having application in ultra-low-power and small form factor design, with fast prototyping and mass-production cycle time, including application for millimeter wave radio frequency circuits.
    Type: Grant
    Filed: April 12, 2022
    Date of Patent: August 15, 2023
    Assignee: Shenzhen Chipuller Chip Technology Co., LTD
    Inventors: Jawad Nasrullah, Omar Alnaggar, Hanfeng Wang, Mohamed Sameh Mahmoud
  • Patent number: 11497765
    Abstract: Thioctamer, a nanoconjugate of glatiramer acetate (GA) and thioctic acid (TA), e.g. in the form of nanospheres, is provided as are compositions comprising thioctamer and methods of using the same for wound healing. Application of thioctamer to a wound accelerates wound healing, compared to control wounds that are not treated with the copolymer.
    Type: Grant
    Filed: February 27, 2022
    Date of Patent: November 15, 2022
    Assignee: KING ABDULAZIZ UNIVERSITY
    Inventors: Nabil A. Alhakamy, Usama A. Fahmy, Osama A. A. Ahmed, Basma G. Eid, Mohammed Z. Nasrullah, Ashraf B. Abdel-naim, Amgad Khedr, Gamal A. Mohamed, Mohamed W. Alrabei, Sabrin R. M. Ibrahim
  • Patent number: 11476182
    Abstract: Described is a packaged component having a first surface and an opposite second surface. The packaged component may comprise a first element a second element, and a third element. The first element may have a first surface and an opposite second surface. The second element may have a first surface and an opposite second surface. The third element may electrically connect a portion of the first element to a portion of the second element. The second surface of the first element may be adjacent to the second surface of the packaged component, and the second surface of the second element may be adjacent to the second surface of the packaged component.
    Type: Grant
    Filed: October 8, 2018
    Date of Patent: October 18, 2022
    Assignee: Shenzhen Chipuller Chip Technology Co., LTD
    Inventors: Zhiquan Luo, Jawad Nasrullah, Omar Mahmoud Afdal Alnaggar
  • Publication number: 20220319967
    Abstract: Described is a packaged component having a first surface and an opposite second surface. The packaged component may comprise a first element a second element, and a third element. The first element may have a first surface and an opposite second surface. The second element may have a first surface and an opposite second surface. The third element may electrically connect a portion of the first element to a portion of the second element. The second surface of the first element may be adjacent to the second surface of the packaged component, and the second surface of the second element may be adjacent to the second surface of the packaged component.
    Type: Application
    Filed: June 21, 2022
    Publication date: October 6, 2022
    Applicant: Shenzhen Chipuller Chip Technology Co., LTD.
    Inventors: Zhiquan Luo, Jawad Nasrullah, Omar Mahmoud Afdal Alnaggar
  • Publication number: 20220253584
    Abstract: Described is an apparatus for supporting Over-The-Air Hardware Updates comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may be operable to be fastened and electrically coupled in one or more regions to one or more respectively corresponding semiconductor dies. The second circuitry may be operable to configure the one or more regions of the first circuitry. The third circuitry may be operable to provide a set of wirelessly-received configuration instructions to the second circuitry.
    Type: Application
    Filed: April 25, 2022
    Publication date: August 11, 2022
    Applicant: Shenzhen Chipuller Chip Technology Co., LTD.
    Inventors: Hao Hua, Jawad Nasrullah
  • Publication number: 20220245425
    Abstract: A knowledge graph embedding method, system, and computer program product using a computing device to embed a knowledge graph using a graph convolutional network, the method including learning, by the computing device, an embedding of the knowledge graph that includes entities, relations, and edges, weighing, by the computing device, initial feature vectors of nodes and a convolutional layer output to compute a weight and modifying the embedding based on the weight, and using, by the computing device, the modified embedding to perform a task related to the knowledge graph.
    Type: Application
    Filed: January 29, 2021
    Publication date: August 4, 2022
    Inventors: Nasrullah Sheikh, Xiao Qin, Berthold Reinwald, Christoph Adrian Miksovic Czasch, Thomas Gschwind, Paolo Scotton
  • Publication number: 20220245460
    Abstract: A graph neural network (GNN) training method, system, and computer program product in a graph, include generating, by the computing device, one or more one or more hypothetical edges between two or more nodes of a plurality of nodes of a graph neural network, testing, by the computing device, to determine whether the one or more generated hypothetical edges should be connected by using negative sampling, and permanently connecting, by the computing device, the one or more tested hypothetical edges if the negative sampling indicates the connectivity.
    Type: Application
    Filed: January 29, 2021
    Publication date: August 4, 2022
    Inventors: Xiao Qin, Nasrullah Sheikh, Berthold Reinwald, Lingfei Wu
  • Publication number: 20220239389
    Abstract: Described are methods and apparatuses pertaining to stacked integrated circuits having application in ultra-low-power and small form factor design, with fast prototyping and mass-production cycle time, including application for millimeter wave radio frequency circuits.
    Type: Application
    Filed: April 12, 2022
    Publication date: July 28, 2022
    Applicant: Shenzhen Chipuller Chip Technology Co., LTD.
    Inventors: Jawad Nasrullah, Omar Alnaggar, Hanfeng Wang, Mohamed Sameh Mahmoud
  • Patent number: 11361138
    Abstract: Described is an apparatus for supporting Over-The-Air Hardware Updates comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may be operable to be fastened and electrically coupled in one or more regions to one or more respectively corresponding semiconductor dies. The second circuitry may be operable to configure the one or more regions of the first circuitry. The third circuitry may be operable to provide a set of wirelessly-received configuration instructions to the second circuitry.
    Type: Grant
    Filed: August 9, 2017
    Date of Patent: June 14, 2022
    Assignee: Shenzhen Chipuller Chip Technology Co., Ltd.
    Inventors: Hao Hua, Jawad Nasrullah
  • Patent number: 11329734
    Abstract: Described are methods and apparatuses pertaining to stacked integrated circuits having application in ultra-low-power and small form factor design, with fast prototyping and mass-production cycle time, including application for millimeter wave radio frequency circuits.
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: May 10, 2022
    Assignee: SHENZHEN CHIPULLER CHIP TECHNOLOGY CO., LTD
    Inventors: Jawad Nasrullah, Omar Alnaggar, Hanfeng Wang, Mohamed Sameh Mahmoud
  • Publication number: 20220092427
    Abstract: A method, a computer program product, and a system for non-obvious relationship detection. The method includes receiving a knowledge and inputting a first node and a second node from the knowledge graph into a twin neural network. The method also includes embedding the first node and the second node, aggregating neighborhood information and position information into the node embeddings. The method further includes concatenating the neighborhood information and the position information of the first node and the second node to produce a first output vector and a second output vector. The method also includes generating a final score by comparing the first output vector with the second output vector. The final score indicates a probability of a non-obvious relationship between the first node and the second node.
    Type: Application
    Filed: September 21, 2020
    Publication date: March 24, 2022
    Inventors: Phillipp Müller, Xiao Qin, Balaji Ganesan, Berthold Reinwald, Nasrullah Sheikh
  • Publication number: 20210143921
    Abstract: Described are methods and apparatuses pertaining to stacked integrated circuits having application in ultra-low-power and small form factor design, with fast prototyping and mass-production cycle time, including application for millimeter wave radio frequency circuits.
    Type: Application
    Filed: October 16, 2020
    Publication date: May 13, 2021
    Applicant: zGlue, Inc.
    Inventors: Jawad Nasrullah, Omar Alnaggar, Hanfeng Wang, Mohamed Sameh Mahmoud
  • Publication number: 20200279798
    Abstract: Described is a packaged component having a first surface and an opposite second surface. The packaged component may comprise a first element a second element, and a third element. The first element may have a first surface and an opposite second surface. The second element may have a first surface and an opposite second surface. The third element may electrically connect a portion of the first element to a portion of the second element. The second surface of the first element may be adjacent to the second surface of the packaged component, and the second surface of the second element may be adjacent to the second surface of the packaged component.
    Type: Application
    Filed: October 8, 2018
    Publication date: September 3, 2020
    Applicant: zGlue Inc.
    Inventors: Zhiquan Luo, Jawad Nasrullah, Omar Mahmoud Afdal Alnaggar
  • Patent number: 10760092
    Abstract: This disclosure provides a stress-responsive polypeptide sequence for fusion with a polypeptide to specifically induce stability of the fusion polypeptide under stress conditions, such as drought, high salt and high temperature, in plants. Also disclosed includes an expression vector for expressing a fusion polypeptide comprising the stress-responsive peptide in plants transformed therewith, and a method for generating a transgenic plant with enhanced tolerance to environmental stresses, comprising introducing into the transgenic plant a polynucleotide encoding a fusion polypeptide which comprises the stress-responsive peptide as disclosed and a plant anti-stress gene, such as the plant senescence-associated gene SSPP. A plant expressing the expression vector that have an enhanced stress tolerance, including Arabidopsis and soybean, is also provided.
    Type: Grant
    Filed: July 8, 2017
    Date of Patent: September 1, 2020
    Assignee: NANKAI UNIVERSITY
    Inventors: Ningning Wang, Li Xiong, Juanjuan Bi, Sheng Liu, Wei Xu, Lifang Sun, Zhaoxia Guo, Nasrullah, Dan Wang, Yuanyuan Mei
  • Patent number: 10725524
    Abstract: Systems and a method for controlling power of a device with power management software are described. In one embodiment, a computer implemented method initiates power control having ON-OFF keying to control power consumption of a device for energy efficiency and energy conservation. An ON-OFF period of the ON-OFF keying for the device is computed. The method sets a target frequency, a target supply voltage, and a power gate control for the device based on the ON-OFF keying.
    Type: Grant
    Filed: March 2, 2016
    Date of Patent: July 28, 2020
    Assignee: Intel Corporation
    Inventors: Jawad Nasrullah, Kelvin Kwan, David Roger Ditzel, Vjekoslav Svilan
  • Publication number: 20200026815
    Abstract: Described is an apparatus for supporting Over-The-Air Hardware Updates comprising a first circuitry, a second circuitry, and a third circuitry. The first circuitry may be operable to be fastened and electrically coupled in one or more regions to one or more respectively corresponding semiconductor dies. The second circuitry may be operable to configure the one or more regions of the first circuitry. The third circuitry may be operable to provide a set of wirelessly-received configuration instructions to the second circuitry.
    Type: Application
    Filed: August 9, 2017
    Publication date: January 23, 2020
    Inventors: Hao HUA, Jawad NASRULLAH
  • Patent number: 10281174
    Abstract: A gravity driven Thermosiphon solar water heating system to harness solar insolation in low sunshine regions. This innovatory system uses CO2 as the working fluid to collect even mild sunlight to heat the water in sub-zero temperature areas. This solar water heater harnesses solar energy by fitting U-shaped copper heat removal pipes in evacuated glass tubes. This system works automatically by natural thermosiphon circulation force caused by density difference of supercritical CO2 at different temperatures. This innovatory solar water heater can perform in ice cold temperature areas where water based systems cease to function after freezing.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: May 7, 2019
    Inventors: Naeem Abas, Nasrullah Khan, Aun Haider
  • Patent number: 10168765
    Abstract: In an embodiment, a processor includes a logic to cause at least one core to operate with a power control cycle including a plurality of on times and a plurality of off times according to an ON-OFF keying protocol, where the off times each correspond to a maximum off time for a platform including the processor. Other embodiments are described and claimed.
    Type: Grant
    Filed: May 3, 2016
    Date of Patent: January 1, 2019
    Assignee: Intel Corporation
    Inventors: David Pardo Keppel, Jawad Nasrullah
  • Patent number: 9965023
    Abstract: A method performed by a multi-core processor is described. The method includes, while a core is executing program code, reading a dirty cache line from the core's last level cache and sending the dirty cache line from the core for storage external from the core, where, the dirty cache line has not been evicted from the cache nor requested by another core or processor.
    Type: Grant
    Filed: September 13, 2016
    Date of Patent: May 8, 2018
    Assignee: INTEL CORPORATION
    Inventors: David Keppel, Kelvin Kwan, Jawad Nasrullah
  • Patent number: 9842784
    Abstract: A system according to some examples herein includes a base chip which may include a plurality of attachment slots for attaching dies thereto. One or more of the attachment slots may be programmable attachment slots. The base chip may further include circuitry for interconnecting the dies attached to the base chip. For example, the base chip may include a plurality of cross bar switches, each of which is associated with respective ones of the plurality of attachment slots. The base chip may further include a configuration block, which is adapted to receive and transmit test signals for determining electrically connected signal lines of one or more attachment slots when one or more dies are attached to the base chip and which is further adapted to receive configuration data for programming signal (including power and ground) channels of the cross bar switches.
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: December 12, 2017
    Assignee: ZGLUE, INC.
    Inventors: Jawad Nasrullah, Ming Zhang