Abstract: Techniques are disclosed for forming a through-body-via (TBV) isolated coaxial capacitor in a semiconductor die. In some embodiments, a cylindrical capacitor provided using the disclosed techniques may include, for example, a conductive TBV surrounded by a dielectric material and an outer conductor plate. The TBV and outer plate can be formed, for example, so as to be self-aligned with one another in a coaxial arrangement, in accordance with some embodiments. The disclosed capacitor may extend through the body of a host die such that its terminals are accessible on the upper and/or lower surfaces thereof. Thus, in some cases, the host die can be electrically connected with another die to provide a die stack or other three-dimensional integrated circuit (3D IC), in accordance with some embodiments. In some instances, the disclosed capacitor can be utilized, for example, to provide integrated capacitance in a switched-capacitor voltage regulator (SCVR).

Abstract: In at least one embodiment there is provided a method for managing bulk capacitance of a power supply system. The method includes precharging first and second bulk capacitors of the power supply system to approximately a first output voltage level and a second output voltage level, respectively; receiving a first command signal to generate, by the power supply, the first output voltage level; coupling the first bulk capacitance to load circuitry coupled to the power supply; receiving a second command signal to generate, by the power supply, the second output voltage level; and coupling the second bulk capacitance to the load circuitry coupled to the power supply.

Abstract: Processes, apparatuses, and systems associated with usage and contextual-based elevator operations management are disclosed herein. The operations management system may have the capability to learn and to constantly adapt to usage patterns on a temporal basis through continuous monitoring of elevator journeys. In embodiments, an elevator journey may include a start and termination floor for an individual. This data may be used to predict patterns of usage and maybe used, for example, to optimize the number of elevators operational at any time, determine the optimal parking position of each elevator, and/or determine an efficient allocation of elevators to groups or related floors. Other embodiments may be described and/or claimed.

Abstract: Systems, apparatuses and methods may provide for a transmit circuit including a light source and a receive circuit including a photodetector and a transimpedance amplifier (TIA) coupled to the photodetector. Additionally, a calibration circuit may be coupled to the transmit circuit and the receive circuit, wherein the calibration circuit includes a current controller to set an operational current of the light source to a minimum value that results in a target output voltage of the receive circuit. In one example, the gain of the TIA remains substantially constant during calibration of the receive circuit.

Abstract: Embodiments of the present disclosure describe a die with integrated microphone device using through-silicon vias (TSVs) and associated techniques and configurations. In one embodiment, an apparatus includes an apparatus comprising a semiconductor substrate having a first side and a second side disposed opposite to the first side, an interconnect layer formed on the first side of the semiconductor substrate, a through-silicon via (TSV) formed through the semiconductor substrate and configured to route electrical signals between the first side of the semiconductor substrate and the second side of the semiconductor substrate, and a microphone device formed on the second side of the semiconductor substrate and electrically coupled with the TSV. Other embodiments may be described and/or claimed.

Abstract: Embodiments include apparatuses, methods, and systems for jitter equalization and phase error detection. In embodiments, a communication circuit may include a data path to pass a data signal and a clock path to pass a clock signal. A jitter equalizer may be coupled with the data path and/or clock path to provide a programmable delay to the data signal and/or clock signal, respectively. The delay may be determined by a training process in which a supply voltage may be modulated by a modulation frequency. The delay may be dependent on a value of the supply voltage, such as a voltage level and/or jitter frequency component of the supply voltage. A phase error detector is also described that may be used with the communication circuit and/or other embodiments.

Abstract: Various embodiments are directed to apparatuses and methods to generate a first signal representing modulation data and a second signal representing an amplitude of the modulation data, the first signal and the second signal to depend on an output signal and vary a power supply voltage to a gain stage in proportion to the amplitude of the modulation data.

Abstract: Described is an apparatus which comprises: a substrate; a plurality of holes formed as vias (e.g., through-silicon-vias (TSVs)) in the substrate; and a metal loop formed in a metal layer positioned above the plurality of holes such that a plane of the metal loop is orthogonal to the plurality of holes.

Abstract: A device to output two or more coordinated haptic effects, comprising, a first haptic effect generator to output a first haptic effect, a second haptic effect generator to output a second haptic effect and a processor to coordinate operation of the second haptic effect generator with operation of the first haptic effect generator based on an input provided to the processor.

Abstract: In an embodiment, a system includes voltage sensing logic to determine a first source voltage Vfirst source corresponding to a first source, and a controller to receive an indication of Vfirst source from the voltage sensing logic. The controller is to, responsive to Vfirst source>a first output voltage (V1), select a first source first regulator to input Vfirst source and provide V1; responsive to Vfirst source>a second output voltage (V2), select a first source second voltage regulator that inputs Vfirst source, and provide V2; responsive to Vfirst source?V1, select a second source first voltage regulator that inputs a second source voltage Vsecond source that corresponds to a second source and is substantially constant in time where Vsecond source>V1, and provide V1 independent of the first source first regulator and the first source second voltage regulator. Other embodiments are described and claimed.

Abstract: A method monitors the consumption of materials, including determining the presence of materials in a smart receptacle using a sensor located in the smart receptacle. A server is alerted when an actionable item is detected.

Abstract: A system for amplifying a signal with active power management according to one embodiment includes a first digital to analog converter (DAC) circuit configured to provide a modulated carrier signal; a amplifier circuit coupled to the first DAC, where the amplifier circuit is configured to amplify the modulated carrier signal; an output stage circuit coupled to the amplifier circuit, where the output stage circuit is configured to provide the amplified signal to a network; a second DAC circuit configured to provide a full wave rectified envelope of the modulated carrier signal; and a switching regulator circuit including a voltage reference input coupled to the second DAC circuit, where the switching regulator circuit is configured to provide a supply voltage to the output stage circuit and the supply voltage is modulated in response to the envelope received at the voltage reference input.

Abstract: A dual mode voltage regulator according to one embodiment includes a passive regulator circuit, a switching regulator circuit, and a controller circuit configured to determine parameters of an external select input. The controller is configured to selectively couple, on a cold boot up, either the passive regulator circuit or the switching regulator circuit between an input voltage port and an output load based on the determination of parameters.

Abstract: Techniques are disclosed for forming a through-body-via (TBV) isolated coaxial capacitor in a semiconductor die. In some embodiments, a cylindrical capacitor provided using the disclosed techniques may include, for example, a conductive TBV surrounded by a dielectric material and an outer conductor plate. The TBV and outer plate can be formed, for example, so as to be self-aligned with one another in a coaxial arrangement, in accordance with some embodiments. The disclosed capacitor may extend through the body of a host die such that its terminals are accessible on the upper and/or lower surfaces thereof. Thus, in some cases, the host die can be electrically connected with another die to provide a die stack or other three-dimensional integrated circuit (3D IC), in accordance with some embodiments. In some instances, the disclosed capacitor can be utilized, for example, to provide integrated capacitance in a switched-capacitor voltage regulator (SCVR).

Abstract: Described is an apparatus which comprises: a first bridge to be coupled to a first load; a first Pulse Width Modulation (PWM) circuit to drive the first bridge; a second bridge to be coupled to a second load; and a second PWM circuit to drive the second bridge, wherein the first PWM circuit is controlled by a first digital word separate from a second digital word, wherein the second PWM circuit is controlled by the second digital, and wherein the second digital word is derived from the first digital word.

Abstract: Described is an apparatus which comprises: a source to generate a first current having AC and DC components; a current-to-voltage converter to convert the first current or a copy of the first current to a first voltage proportional to a resistance, the first voltage having AC and DC components that correspond to the AC and DC components of the first current; a sample-and-hold circuit to filter the AC component from the first voltage and for providing an output voltage with the DC component; and an amplifier to receive the output voltage.

Abstract: Described is an apparatus which comprises: an amplifier to receive a reference voltage; and calibration logic which is operable to receive a first voltage and to provide the reference voltage to the amplifier, wherein the calibration logic is operable to generate a look-up table (LUT) that maps the first voltage to a drive current.

Abstract: A memory controller operable for selective memory access to areas of memory exhibiting different attributes leverages different memory capabilities that vary access speed, retention time and power consumption, among others. Different areas of memory have different attributes while remaining available to applications as a single contiguous range of addressable memory. The memory controller employs an operating mode that identifies operational priorities for a computing device, such as speed, power conservation, or efficiency. The memory controller identifies an area of memory based on an expected usage of the data stored in the area, for example an access frequency indicating future retrieval. The memory controller therefore selects areas of memory based on the operating mode and the expected usage of data to be stored in the area according to a heuristic that favors areas of memory based on those exhibiting attributes having a high correspondence to the expected usage of the data.

Abstract: Generally, this disclosure describes an apparatus, systems and methods for adaptively controlling a voltage regulator.

Abstract: Embodiments of shielding apparatuses are disclosed herein. In some embodiments, a shielding apparatus may include first and second conductive regions and a plurality of vias disposed between the first and second conductive regions. The first and second conductive regions and the plurality of vias may surround an integrated circuit (IC) component and individual vias of the plurality of vias are spaced relative to one another to shield incoming or outgoing electromagnetic interference (EMI). Other embodiments may be described and/or claimed.