Abstract: Embodiments may comprise logic such as hardware and/or code for high-speed digital-to-analog conversion of signals. Many embodiments comprise a demultiplexer to distribute sets of bits to digital-to-analog converters, the digital-to-analog converters to receive the sets of bits and the operate concurrently to convert the sets of bits from digital representations of signal segments to output analog signal segments, and an interleaver to interleave the analog signal segments from each of digital-to-analog converters in the sequence to generate an analog signal. In many embodiments, the interleaver is adapted to interleave the analog signal segments by latching magnitudes of each of the analog signal segments to an interleaved output near ends of clock cycles to attenuate non-linearities in the magnitudes of each of the analog signal segments when the magnitudes are output.

Abstract: Techniques are disclosed that involve the reduction of DC offsets. For instance, embodiments may receive a baseband signal, and determine a DC characteristic of the baseband signal. When the DC characteristic has a value that is outside of a predetermined range, a correction signal is adjusted. The correction signal is injected into the baseband signal.

Abstract: Various embodiments are directed to apparatuses and methods to reduce average power dissipation in transceiver stages such as power amplifiers and low noise amplifiers (LNAs) that process signals of varying output amplitudes. Power dissipation may be reduced by varying the supply voltage in sympathy with the amplitude of the signal and/or the stage current density which may also be varied in sympathy with the signal amplitude.

Abstract: Apparatuses, systems, and methods that align channel filters for dual tuners are disclosed. An embodiment may comprise an IC having two tuners. Each tuner may have a low-noise amplifier, a mixer with a local oscillator, and channel filter. To perform a channel filter alignment, a bandwidth controller may cross-couple the local oscillator of each tuner to the input of the mixer of the opposite tuner. The bandwidth controller may adjust the frequencies of the local oscillators to produce different configuration tone frequencies at the outputs of the mixers, which are inputs to the channel filters. The bandwidth controller may then determine an amplitude difference between two separate measurements of a channel filter output and, based on a comparison of the measurements with predicted values, increment or decrement the filter bandwidth for each tuner and store parameters for the channel filters which create the largest signal amplitudes.

Abstract: An apparatus, a method and a system for correcting a phase imbalance are described. Embodiments may measure the phase imbalance inherent in a tuner and use the imbalance measure to correct the output of the tuner. Embodiments may include a tone generator to produce a single frequency tone and a tuner to receive the single frequency tone and output an intermediate frequency. The intermediate frequency may be corrected by a correction loop. Other embodiments are described and claimed.

Abstract: An embodiment of the present invention provides an apparatus, comprising a surface mounted device (SMD) inductor, the SMD inductor including at least two counter wound aircoils formed on a same SMD former; wherein the at least two counter wound aircoils are connected to three terminals on the SMD former, wherein a single terminal is connected to a common node of both windings with two independent terminals accessing the other winding node.

Abstract: Techniques are disclosed that involve the reduction of DC offsets. For instance, embodiments may receive a baseband signal, and determine a DC characteristic of the baseband signal. When the DC characteristic has a value that is outside of a predetermined range, a correction signal is adjusted. The correction signal is injected into the baseband signal.

Abstract: An apparatus, a method and a system for correcting a phase imbalance are described. Embodiments may measure the phase imbalance inherent in a tuner and use the imbalance measure to correct the output of the tuner. Embodiments may include a tone generator to produce a single frequency tone and a tuner to receive the single frequency tone and output an intermediate frequency. The intermediate frequency may be corrected by a correction loop. Other embodiments are described and claimed.

Abstract: Techniques for the reception and processing of wireless signals are disclosed. For instance, an apparatus may include multiple receiving paths, a content stream generation module, and a distribution module. The multiple receiving paths include a first receiving path that generates a first decoded signal from an input RF signal in accordance with a first tuning setting. The content stream generation module has first and second inputs. Based on decoded signals received at the first and second inputs, the content stream generation module may generate first and second content streams, respectively. In situations where both the first and second content streams correspond to the first tuning setting, the distribution module provides the first decoded signal to both the first and second inputs of the content stream generation module. Also, a control module may remove operational power from any of the plurality of receiving paths that are currently being unused.

Abstract: A wireless device includes a two-stage filter that separates UHF and VHF transmission bands in such a way as to maximize cross channel isolation, so preventing cross channel signal contamination and additionally protecting all signals from host coexistence blocking transmissions and harmonics of the wanted signals without the requirement for additional or selectable filter arrangements.

Abstract: A self-configurable amplifier and method of amplification, including an RF signal level detector having an input connected to an RF signal, and an output configured to produce a control signal responsive to a power level of the RF signal. The control signal is supplied to a parametric adjustment circuit that includes an input connected to the control signal, and an output configured to provide a negative feedback responsive to the control signal. The negative feedback is supplied to an RF amplifier that includes an input forming an input of the self-configurable amplifier, an output forming an output of the self-configurable amplifier, and a control port connected to the output of the parametric adjustment circuit, such that one or more parameters of the RF amplifier is responsive to the negative feedback.

Abstract: An amplifier includes steering stages to receive a control signal and collectively provide an output signal. Each steering stage receives an associated input signal and contributes to the output signal based on the control signal. The amplifier includes an attenuator to selectively attenuate the input signals to form different gain control ranges for the amplifier.

Abstract: A self-configurable amplifier and method of amplification, including an RF signal level detector having an input connected to an RF signal, and an output configured to produce a control signal responsive to a power level of the RF signal. The control signal is supplied to a parametric adjustment circuit that includes an input connected to the control signal, and an output configured to provide a negative feedback responsive to the control signal. The negative feedback is supplied to an RF amplifier that includes an input forming an input of the self-configurable amplifier, an output forming an output of the self-configurable amplifier, and a control port connected to the output of the parametric adjustment circuit, such that one or more parameters of the RF amplifier is responsive to the negative feedback.

Abstract: An amplifier includes steering stages to receive a control signal and collectively provide an output signal. Each steering stage receives an associated input signal and contributes to the output signal based on the control signal. The amplifier includes an attenuator to selectively attenuate the input signals to form different gain control ranges for the amplifier.

Abstract: A wireless device includes a two-stage filter that separates UHF and VHF transmission bands in such a way as to maximize cross channel isolation, so preventing cross channel signal contamination and additionally protecting all signals from host coexistence blocking transmissions and harmonics of the wanted signals without the requirement for additional or selectable filter arrangements.

Abstract: A wireless device includes an impedance transforming network that couples an antenna to a Low Noise Amplifier (LNA) and includes at least one digitally controllable variable capacitor that may be adjusted to maximize an impedance transformation ratio on a desired channel. A tuned response centered on the desired channel provides attenuation to undesired channels.

Abstract: A single conversion frequency converter comprises an image reject mixer and a local oscillator. The local oscillator comprises a variable frequency oscillator and a variable divider. The variable divider supplies to the mixer a local oscillator signal whose frequency is a sub-multiple of the frequency of the variable frequency oscillator.

Abstract: A zero or near zero IF frequency changer for use in a digital tuner comprises multipliers which receive the RF input signal from an input. The multipliers receive quadrature local oscillator signals from a first oscillator of an arrangement which comprises first and second phase-locked loops. The first phase-locked loop comprises a programmable divider, a comparator and a control loop so that the first oscillator is phase-locked to a second oscillator. A second phase-locked loop comprises the second oscillator and a synthesizer containing a reference oscillator to which the second oscillator is phase-locked. The output frequency of the second oscillator is in a frequency band which is outside the RF input frequency band of the frequency changer.

Abstract: A tuner demodulator alignment system adjusts the centre-frequency of the PLL-demodulator VCO to achieve alignment with the center-frequency of the IF entering the demodulator by: injecting into the PLL stage a signal having a frequency equal to the nominal center-frequency of the IF, electronically adjusting, e.g. by means of a digital-to-analogue converter (DAC) controlled from a tuner micro-controller, the VCO frequency until this frequency is aligned with the injection frequency, then removing the injection signal and reverting to normal tuner operation. Alignment with the injection frequency may be signalled by a change in logical stage of an AFC flag signal provided by the PLL stage and employed during normal use of the tuner. This may be repeated on an ad-hoc basis, e.g. whenever channels are changed by the user, or more periodically by the tuner software, or may be performed on a one-off basis only on the production bench.

Abstract: A voltage to current converter comprises a first long tail pair comprising transistors whose emitters are connected via equal value resistors to a constant current source. The first long tail pair forms a main transconductance stage. A subsidiary or corrector transconductance stage is connected in anti-phase with the main stage. The corrector stage is based on another long tail pair comprising transistors whose emitters are connected via resistors to another constant current source. The linear part of the transconductance of the corrector stage is substantially less than that of the main stage but the non-linear part is substantially equal to that of the main stage. Thus, non-linear distortion can be substantially reduced.