Abstract: An electronic device disclosed herein includes a locked loop circuit configured to receive a reference signal intended to have an intended frequency, wherein the locked look circuit is intended to generate an intended output signal having an intended frequency equal to the intended frequency multiplied by an intended multiplier. A frequency counter counts a number of pulses of the reference signal during a time window so as to determine an actual frequency of the reference signal. A control circuit determines an actual multiplier for the locked loop circuit that, when multiplied by the actual frequency of the reference signal, causes the locked loop circuit to generate an actual output signal having an actual frequency equal to the intended frequency.

Abstract: A system and method of characterizing a geographical location for a wireless device in a wireless network is described. The system includes a first config management log, a second config management log, a correlation module, data bins, a location module, a predictive analysis module and a service layer module. The first config management log is associated with a plurality of base stations. The second config management log is associated with a network component communicatively coupled to the plurality of base stations. The correlation module correlates the first config management log and the second config management log with a geographic area. Each of the data bins is associated with a geographic area. The predictive analysis module analyzes the communication parameters associated with a particular geographic area. The service layer module identifies the communication parameters affecting at least one of a user experience and a quality of experience (QoE) in the particular geographic area.

Abstract: A laminar phased array has a first sub-array configured to operate in one of a receive mode with a first polarity and a transmit mode with a second polarity, and a second sub-array configured to operate in one of a receive mode with the second polarity and a transmit mode with the first polarity. The first polarity is physically orthogonal to the second polarity. The array also has a controller configured to control the first and second sub-arrays so that they operate together in either 1) a receive mode or 2) a transit mode. Accordingly, both sub-arrays are configured to operate at the same time to receive signals in the first and second polarities when in the receive mode. In a corresponding manner, both sub-arrays are configured to operate at the same time to transmit signals in the first and second polarities when in the transmit mode.

Abstract: An imaging system is provided that includes at least one detector configured to acquire imaging information, a processing unit, and a display unit. The processing unit is operably coupled to the at least one detector, and is configured to reconstruct an image using the imaging information. The image is organized into voxels having non-uniform dimensions. The processing unit is configured to perform a penalized likelihood (PL) image reconstruction using the imaging information. The PL image reconstruction includes a penalty function. Performing the penalty function includes interpolating a voxel size in at least one dimension from an original size to an interpolated size before determining a penalty function, determining the penalty function using the interpolated size to provide an initial penalty, interpolating the initial penalty to the original size to provide a modified penalty, and applying the modified penalty in the PL image reconstruction.

Abstract: A ring oscillator circuit is formed by series connected inverter circuits with a feedback loop. The inverter circuits are source biased with an oscillator voltage. A resistor-less bias current generator circuit generates a bias current for application to a replica inverter circuit to generate a bias voltage. A scaling circuit operates to scale the bias voltage by a selectable scaling factor to generate the oscillator voltage in a manner which balances a mobility effect of the inverter circuits within the ring oscillator circuit against a threshold voltage effect of the inverter circuits within the ring oscillator circuit. The clock signal output from the ring oscillator circuit has a frequency which is independent of process, voltage and temperature (PVT) spread.

Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be pre-programmed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.

Abstract: A conditioning integrated circuit (CDIC) chip can be used to aggregate signals to/from a number of beam forming integrated circuit (BFIC) chips, and signals to/from a number of CDIC chips can be aggregated by an interface integrated circuit (IFIC) chip. The CDIC chip includes temperature compensation circuitry to adjust the gain of the transmit and receive signals as a function of temperature based on inputs from a temperature sensor. The CDIC may include a plurality of beam forming channels each having a transmit circuit and a receive circuit, a common port coupled to the beam forming channels for selectively providing a common transmit signal to the beam forming channels and receiving a common receive signal from the beam forming channels, and a temperature compensation circuit configured to provide variable attenuation to the common transmit signal and the common receive signal based on a temperature sense signal.

Abstract: The present invention provides a method and apparatus of handling in-device co-existence interference in a wireless communication environment. In one embodiment, a method includes detecting in-device co-existence interference between a LTE module and an ISM module in user equipment. The method further includes identifying subframes and corresponding HARQ processes in a set of subframes allocated to the LTE module which are affected by the ISM module operation. Additionally, the method includes reserving the remaining subframes and corresponding HARQ processes in the set of subframes for the LTE module operation. Furthermore, the method includes indicating to a base station that the remaining subframes and the corresponding HARQ processes are reserved for the LTE module operation to resolve the in-device co-existence interference.

Abstract: A beamforming integrated circuit system is configured to optimize performance. Among other things, the system may run at a lower power than conventional integrated circuits, selectively disable branches to control certain system functions, and/or selectively position ground pads around receiving pads to enhance isolation. The system also may use a beamforming integrated circuit as a distribution circuit for a number of similar or like beamforming integrated circuits.

Abstract: Techniques for intelligent designated forwarder (DF) and master router selection (for router redundancy) are provided. In one embodiment, a network router that is part of a set of network routers connected to a common LAN segment can retrieve a priority value adapted for use by the network router in electing a DF for multicast traffic. The network router can further check for the presence or absence of one or more routes to one or more multicast sources in a routing table of the network router. The network router can then modify the priority value based on the presence or the absence of the one or more routes and can transmit a multicast routing protocol control packet including the modified first priority value to one or more other network routers in the set of network routers.

Abstract: In certain exemplary embodiments, register banks are used to allow for fast beam switching (FBS) in a phased array system. Specifically, each beam forming channel is associated with a register bank containing M register sets for configuring such things as gain/amplitude and phase parameters of the beam forming channel. The register banks for all beam forming channels can be preprogrammed and then fast beam switching circuitry allows all beam forming channels across the array to be switched to use the same register set from its corresponding register bank at substantially the same time, thereby allowing the phased array system to be quickly switched between various beam patterns and orientations. Additionally or alternatively, active power control circuitry may be used to control the amount of electrical power provided to or consumed by one or more individual beam forming channels such as to reduce DC power consumption of the array and/or to selectively change the effective directivity of the array.

Abstract: A system is provided that includes at least one detector and a processing unit. The at least one detector is configured to acquire imaging information. The processing unit is operably coupled to the at least one detector, and is configured to acquire the imaging information from the at least one detector. The processing unit is configured to acquire patient scanning information for an imaging operation, determine a target activity based on the patient scanning information, determine a target time for performing the imaging operation corresponding to the target activity, perform the imaging operation at the target time to acquire targeted imaging information; and reconstruct an image using the targeted imaging information.

Abstract: A laminar phased array has a plurality of receive elements and dual transmit/receive elements supported on a substrate. The plurality of receive elements and dual transmit/receive elements form a patch array across the substrate. As such, the receive elements and dual transmit/receive elements form an array of patch antennas on the substrate. The phased array also has a plurality of integrated circuits supported on the substrate. At least a first set of the plurality of integrated circuits is configured to control receipt of signals by the receive elements. In a corresponding manner, at least a second set of the plurality of integrated circuits is configured to control receipt and transmission of signals by the dual transmit/receive elements.

Abstract: A beamforming integrated circuit has a single channel with a transmit chain and a receive chain. The transmit chain is configured to transmit an output signal and, in a corresponding manner, the receive chain is configured to receive an input signal. The integrated circuit also has separate horizontal and vertical polarity ports, and a double pole, double throw switch operably coupled between the chains and the ports. The double pole, double throw switch is configured to switch between operation in a first mode and a second mode.

Abstract: An imaging system is provided that includes at least one detector configured to acquire imaging information, a processing unit, and a display unit. The processing unit is operably coupled to the at least one detector, and is configured to reconstruct an image using the imaging information. The image is organized into voxels having non-uniform dimensions. The processing unit is configured to perform a penalized likelihood (PL) image reconstruction using the imaging information. The PL image reconstruction includes a penalty function. Performing the penalty function includes interpolating a voxel size in at least one dimension from an original size to an interpolated size before determining a penalty function, determining the penalty function using the interpolated size to provide an initial penalty, interpolating the initial penalty to the original size to provide a modified penalty, and applying the modified penalty in the PL image reconstruction.

Abstract: In some example implementations, there may be provided methods for beamforming calibration of active electronically steered arrays (AESA). In some implementations, one or more adders may generate a phase offset by adding phase calibration data from non-volatile memory and phase command data from static memory, and/or generate a gain offset by adding gain calibration data from the non-volatile memory and gain command data from the static memory. Further, a phase-shift circuit can modify, based on the phase offset, a phase of a first output signal, and an amplitude gain circuit can modify, based on the gain offset, an amplitude of the first output signal. In accordance with these implementations, the modified phase of the first output signal and the modified amplitude of the first output signal are provided to enable pre-calibration of the first output signal and/or a first antenna. Related systems, methods, and articles of manufacture are also described.

Abstract: A phased array has a laminar substrate, a plurality of elements on the laminar substrate forming a patch phased array, and integrated circuits on the laminar substrate. Each integrated circuit is a high frequency integrated circuit configured to control receipt and/or transmission of signals by the plurality of elements in the patch phased array. In addition, each integrated circuit has a substrate side coupled with the laminar substrate, and a back side. The phased array also has a plurality of heat sinks. Each integrated circuit is coupled with at least one of the heat sinks. At least one of the integrated circuits has a thermal interface material in conductive thermal contact with its back side. The thermal interface material thus is between the at least one integrated circuit and one of the heat sinks. Preferably, the thermal interface material has a magnetic loss tangent value of between 0.5 and 4.5.

Abstract: An apparatus may include a plurality of antenna elements forming an antenna array. The apparatus may further include a beamformer that determines one or more of phase and amplitude shifts to cause the plurality of antenna elements to produce a beam in the direction of a target. The apparatus may further include a null limiter comprising dither circuits. The dither circuits may dither the one or more of phase and amplitude shifts by adding noise to cause a side lobe of the beam to increase above a threshold value. The dither circuits may be enabled by a control signal, and the dithered one or more of phase and amplitude shifts may be provided to the antenna elements to produce the beam in the direction of the target with the side lobes above the threshold value.

Abstract: A beamforming integrated circuit has a single channel with a transmit chain and a receive chain. The transmit chain is configured to transmit an output signal and, in a corresponding manner, the receive chain is configured to receive an input signal. The integrated circuit also has separate horizontal and vertical polarity ports, and a double pole, double throw switch operably coupled between the chains and the ports. The double pole, double throw switch is configured to switch between operation in a first mode and a second mode.

Abstract: Approaches to sharing information about third-party data sets in the context of an application. A computing device may be used to determine the context of an application that is executing on the computing device and searching an index that includes entries representing publisher data sets. The computing device may search the index for entries that are associated with the context of the application. In response to finding such an entry, the computing device displays information about the publisher data set that is associated with the entry.