Abstract: An interconnection structure includes an interlevel insulating film, made of organic-containing silicon dioxide, between lower- and upper-level metal interconnects. A phenyl group, bonded to a silicon atom, is introduced into silicon dioxide in the organic-containing silicon dioxide.

Abstract: In a method for forming an interconnection structure, first, second and third insulating films and a thin film are sequentially formed over lower-level metal interconnects. Then, the thin film is masked with a first resist pattern and etched to form a mask pattern with openings for interconnects. Next, the third insulating film is masked with a second resist pattern and dry-etched such that the third insulating film and the first and second resist patterns are etched at a high rate and that the second insulating film is etched at a low rate to form openings for contact holes in the third insulating film and remove the first and second resist patterns. Then, the second insulating film is masked with the third insulating film and dry-etched such that the second insulating film is etched at a high rate and that the first and third insulating films are etched at a low rate to form the openings for contact holes in the second insulating film.

Abstract: A method for fabricating a semiconductor device according to the present invention includes the steps of: a) forming an insulator film having Si—H bonds; b) forming a resist mask over a selected region of the insulator film; c) etching part of the insulator film that is not covered with the resist mask, thereby forming a recess in the insulator film; and d) removing the resist mask. The step d) includes the step of e) ashing the resist mask by using plasma produced from a gas comprising water vapor as a main component.

Abstract: Using a CVD method, there is deposited, on a semiconductor substrate, a first silicon oxide layer on which a porous layer is then deposited. The porous layer is then etched to form a wiring groove. Using a CVD method, a second silicon oxide layer is deposited throughout the surface of the porous layer, and the first and second silicon oxide layers are etched to form a through-hole therein. Then, a conductive layer is deposited throughout the surface of the semiconductor substrate. Then, the conductive layer is subjected to CMP to form a wiring layer composed of the conductive layer.

Abstract: In a method for forming an interconnection structure, first, second and third insulating films and a thin film are sequentially formed over lower-level metal interconnects. Then, the thin film is masked with a first resist pattern and etched to form a mask pattern with openings for interconnects. Next, the third insulating film is masked with a second resist pattern and dry-etched such that the third insulating film and the first and second resist patterns are etched at a high rate and that the second insulating film is etched at a low rate to form openings for contact holes in the third insulating film and remove the first and second resist patterns. Then, the second insulating film is masked with the third insulating film and dry-etched such that the second insulating film is etched at a high rate and that the first and third insulating films are etched at a low rate to form the openings for contact holes in the second insulating film.

Abstract: An organic acid containing solution obtained by adding an organic acid having an alkyl group to a solution including silanol condensate particles is applied on a substrate so as to form a coating film. The coating film is heat treated so as to form a porous film.

Abstract: Using a CVD method, there is deposited, on a semiconductor substrate, a first silicon oxide layer on which a porous layer is then deposited. The porous layer is then etched to form a wiring groove. Using a CVD method, a second silicon oxide layer is deposited throughout the surface of the porous layer, and the first and second silicon oxide layers are etched to form a through-hole therein. Then, a conductive layer is deposited throughout the surface of the semiconductor substrate. Then, the conductive layer is subjected to CMP to form a wiring layer composed of the conductive layer.

Abstract: A material containing, as a main component, an organic silicon compound represented by the following general formula:R.sup.1.sub.x Si(OR.sup.2).sub.4-x(where R.sup.1 is a phenyl group or a vinyl group; R.sup.2 is an alkyl group; and x is an integer of 1 to 3) is caused to undergo plasma polymerization or react with an oxidizing agent to form an interlayer insulating film composed of a silicon oxide film containing an organic component. As the organic silicon compound where R.sup.1 is a phenyl group, there can be listed phenyltrimethoxysilane or diphenyldimethoxysilane. As the organic silicon compound where R.sup.1 is a vinyl group, there can be listed vinyltrimethoxysilane or divinyldimethoxysilane.

Abstract: Using a CVD method, there is deposited, on a semiconductor substrate, a first silicon oxide layer on which a porous layer is then deposited. The porous layer is then etched to form a wiring groove. Using a CVD method, a second silicon oxide layer is deposited throughout the surface of the porous layer, and the first and second silicon oxide layers are etched to form a through-hole therein. Then, a conductive layer is deposited throughout the surface of the semiconductor substrate. Then, the conductive layer is subjected to CMP to form a wiring layer composed of the conductive layer.

Abstract: A method of manufacturing a semiconductor device comprises a lower-metallization-layer forming step of forming a lower metallization layer on a semiconductor substrate, an insulating-film forming step of forming an interlayer insulating film on said lower metallization layer, and an upper-metallization-layer forming step of forming an upper metallization layer on said interlayer insulating film. The insulating-film forming step includes the step of mixing a solution of a particulate silanol condensate having a fluorine-silicon bond and a solution of a particulate silanol condensate having an organic group-silicon bond to prepare a solution mixture, which is applied onto the semiconductor substrate formed with the lower metallization layer and thermally treated to form the foregoing interlayer insulating film.

Abstract: A first insulating film is formed on a semiconductor substrate. A metal wire made of an aluminum alloy containing copper is formed on the first insulating film. An antireflection film is formed on the top face of the metal wire. On the region of the side face of the metal wire uncovered with an aluminum oxide film, there is formed a copper sulfide film, which is a sulfide film of copper. A second insulating film is formed over the metal wire formed with the antireflection film as well as the copper sulfide film and the first insulating film.

Abstract: Metal formed on a semiconductor wafer is brought into contact with ions adapted to corrode the metal, and subjected to constant-current electrolysis using a galvanostat. The electrode potential of the metal is measured. There are obtained (i) the relationship between current value and time of pitting corrosion and (ii) the critical current value, based on which the metal is evaluated for surface smoothness, the pitting corrosion resistance of metal surface, resistance to pitting corrosion, the segregation amount and concentration of trace metal contained in the metal, and the grain size or grain boundary length of the metal.

Abstract: A semiconductor substrate production in which the treatment of semiconductor substrates and the removal of deposits previously formed on the used wall portion are simultaneously performed, so that at least two wall portions alternately constitute the substrate treating chamber after cleaning, thereby continuing the production of semiconductor substrates without breaks for the removal of detrimental deposits.