Patents by Inventor Nobuo Higaki
Nobuo Higaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 7840036Abstract: A human being detection apparatus includes a moving object detecting part for detecting a target region from the picture image as a region of the moving object and a target distance as a distance to the moving object, a head region setting part for setting the head region corresponding to the target distance, a sample storing image part for storing a sample image having a predetermined size corresponding to the head region of the human being, and a human being determining part for determining whether or not the moving object is a human being by comparing the head region in the picture image converted to have a predetermined size with the sample image.Type: GrantFiled: December 6, 2006Date of Patent: November 23, 2010Assignee: Honda Motor Co., Ltd.Inventor: Nobuo Higaki
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Publication number: 20100289674Abstract: A variable-length code decoding apparatus that decodes a bitstream includes: a storage unit that stores a variable-length code table; a bitstream cutout unit that outputs a bit string of a fixed length; a reference unit that outputs decoded data and a code length with reference to the storage unit; a determination unit that determines whether a bit string of the fixed length is accumulated; a determination unit that determines whether a bit string of a length that is shorter than the fixed length is accumulated; and a selection unit that selects one of the determination results from the determination units. The bitstream cutout unit sets a starting bit based on the selected determination result, and the selection unit switches the selection of the determination results from the determination units.Type: ApplicationFiled: July 27, 2010Publication date: November 18, 2010Applicant: PANASONIC CORPORATIONInventors: Yuya SHIGENOBU, Motokazu OZAWA, Nobuo HIGAKI, Takeshi FURUTA, Takahiro KAGEYAMA, Masaki MINAMI
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Patent number: 7823142Abstract: When a branch instruction is decoded by the instruction decoders 409a˜409c, the upper 29 bits of the PC relative value included in the branch instruction are sent to the upper PC calculator 411 and the lower 3 bits are sent to the lower PC calculator 405. The lower PC calculator 405 adds the lower 3 bits of the PC relative value and the lower 3 bits of the present lower PC 404 and sends the result to the lower PC 404 as the updated lower PC. The upper PC calculator 411 adds the upper 29 bits of the PC relative value, the upper 29 bits of the present upper PC 403, and a carry that may be received from the lower PC calculator 405, and sends the result to the upper PC 403 as the updated upper PC.Type: GrantFiled: October 7, 2005Date of Patent: October 26, 2010Assignee: Panasonic CorporationInventors: Shuichi Takayama, Hajime Ogawa, Kenichi Kawaguchi, Nobuo Higaki, Kensuke Odani, Tetsuya Tanaka, Shinya Miyaji, Taketo Heishi
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Patent number: 7761692Abstract: In order to overcome the problem that conditionally executed instructions are executed as no-operation instructions if their condition is not fulfilled, leading to poor utilization efficiency of the hardware and lowering the effective performance, the processor decodes a number of instructions that is greater than the number of provided computing units and judges their execution conditions with an instruction issue control portion before the execution stage, Instructions for which the condition is false are invalidated, and subsequent valid instructions are assigned so that the computing units (hardware) is used efficiently. A compiler performs scheduling such that the number of instructions whose execution condition is true does not exceed the upper limit of the degree of parallelism of the hardware. The number of instructions arranged in parallel at each cycle may exceed the degree of parallelism of the hardware.Type: GrantFiled: June 14, 2006Date of Patent: July 20, 2010Assignee: Panasonic CorporationInventors: Taketo Heishi, Shuichi Takayama, Tetsuya Tanaka, Hajime Ogawa, Nobuo Higaki
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Publication number: 20100180095Abstract: The buffer control device of this invention includes: a pointer holding unit which holds a virtual pointer different from a read pointer and a write pointer; an access control unit that controls an access to a ring buffer; a judging unit that judges whether or not one of the read pointer and the write pointer has reached an address substantially identical to an address indicated by the virtual pointer; and disabling unit that disables a normal access using the one of the read pointer and the write pointer, when the judging unit judges that the one of the read pointer and the write pointer has reached the address substantially identical to the address indicated by the virtual pointer, the normal access being controlled by the access control unit, wherein the access control unit further controls a reaccess to the ring buffer.Type: ApplicationFiled: November 28, 2006Publication date: July 15, 2010Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Masanori Fujibayashi, Nobuo Higaki, Kazushi Kurata, Tomoko Matsui
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Patent number: 7756299Abstract: The invention provides a face region estimating device capable of extracting a person's face region even when an illumination environment, for example, is changed and persons with different skin colors are contained in a picked-up image taken by a camera. The face region estimating device includes: a mobile body detecting unit for extracting the outline of a mobile body from the picked-up image and for generating an object distance image composed of pixels corresponding to a distance in which the mobile body exists; a head region setting unit for setting a head region based on the pixel distribution in the object distance image corresponding to a predetermined range on the basis of a pixel position at the upper part of the outline; and a face region extracting unit for extracting the person's face region from the picked-up image based on the color distribution in the picked-up image corresponding to the head region.Type: GrantFiled: December 13, 2005Date of Patent: July 13, 2010Assignee: Honda Motor Co., Ltd.Inventor: Nobuo Higaki
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Publication number: 20100169614Abstract: A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code “cc” that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant “const”. The content of the 4-bit operation field 52 is specified by a format code provided in the format field 51.Type: ApplicationFiled: February 12, 2010Publication date: July 1, 2010Applicant: Panasonic CorporationInventors: Shuichi TAKAYAMA, Nobuo Higaki
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Patent number: 7720685Abstract: To automate the work of recognizing a guest, check the appointment, notify a host of the arrival of the guest and conduct the guest to a designated place, a robot having a function to autonomously travel is equipped with camera/microphone for recognizing a guest at least according to image information. The system comprises management database adapted to communicate with the robot and equipped with an information database for identifying the recognized guest, and identifies the guest according to the information obtained from the camera/microphone and management database. The robot recognizes the guest from the image thereof, and the recognized guest is identified and verified by comparing the image of the visitor with the information contained in the database so that the robot can automatically conduct the guest to the designated meeting room according to the information of the appointment stored in the database.Type: GrantFiled: September 23, 2003Date of Patent: May 18, 2010Assignee: Honda Giken Kogyo Kabushiki KaishaInventors: Yoshiaki Sakagami, Shinichi Matsunaga, Nobuo Higaki, Kazunori Kanai, Naoaki Sumida, Takahiro Oohashi, Sachie Hashimoto
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Patent number: 7716391Abstract: A data transfer apparatus according to the present invention has; a DMAC and another DMAC which transfer data by direct memory access among a plurality of buses; a command queue which holds, as a queue, commands for instructing the data transfer; a bus information obtainment unit which obtains the commands from the command queue; a grouping unit which groups the held commands, based on a source and a destination designated in each of the obtained commands; a schedule unit which decides an order of issuing the commands sequentially from a group having more command, as a priority; and a selector which selects a command to be issued according to the decided order.Type: GrantFiled: May 9, 2006Date of Patent: May 11, 2010Assignee: Panasonic CorporationInventors: Kazuya Furukawa, Nobuo Higaki, Hideyo Tsuruta, Kazushi Kurata, Shigeki Fujii, Kousuke Yoshioka, Hiroyuki Morishita
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Patent number: 7693514Abstract: In an event site or the like, a visitor may waste time and effort trying to find a spot where an event of interest may be taking place because the visitor is unable to look through the entire site from any particular spot. An information gathering robot roams in such an event site typically along a prescribed route, and notes spots of interest to transmit this information to a data server. The visitor can access the data server to find a spot of interest of his or her choice substantially on a real time basis.Type: GrantFiled: August 11, 2004Date of Patent: April 6, 2010Assignee: Honda Motor Co., Ltd.Inventors: Yoshiaki Sakagami, Yoko Saito, Koji Kawabe, Takamichi Shimada, Nobuo Higaki
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Patent number: 7685351Abstract: In response to a write request from a master to write to an external device, a control unit holds a write address and write data from the master in a write address holding unit and in a write data holding unit, respectively, outputs a reception signal to the master, and writes the write data to the external device specified by the write address. When the master holds the read address in the read address holding unit, the control unit reads data from the external device specified by the read address, and holds the read data in the read data holding unit.Type: GrantFiled: June 6, 2006Date of Patent: March 23, 2010Assignee: Panasonic CorporationInventors: Takao Kawakami, Masaitsu Nakajima, Tokuzo Kiyohara, Hiroyuki Morishita, Nobuo Higaki, Yousuke Kudo
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Patent number: 7593552Abstract: A gesture recognition apparatus for recognizing postures or gestures of an object person based on images of the object person captured by cameras. The gesture recognition apparatus includes: a face/fingertip position detection means which detects a face position and a fingertip position of the object person in three-dimensional space based on contour information and human skin region information of the object person to be produced by the images captured; and a posture/gesture recognition means which operates to detect changes of the fingertip position by a predetermined method, to process the detected results by a previously stored method, to determine a posture or a gesture of the object person, and to recognize a posture or a gesture of the object person.Type: GrantFiled: March 22, 2004Date of Patent: September 22, 2009Assignee: Honda Motor Co., Ltd.Inventors: Nobuo Higaki, Takamichi Shimada
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Publication number: 20090193226Abstract: A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code “cc” that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant “const”. The content of the 4-bit operation field 52 is specified by a format code provided in the format field 51.Type: ApplicationFiled: April 6, 2009Publication date: July 30, 2009Applicant: PANASONIC CORPORATIONInventors: Shuichi TAKAYAMA, Nobuo Higaki
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Patent number: 7551980Abstract: An apparatus 1 for controlling a movable robot recognizes the person to be followed up from an image taken by a camera C by an image processing portion 20, controls leg portions R1 of a movable robot A so as to keep a prescribed interval between the movable robot A and the person by a portion 50 for detecting an action, and notify the degree of the distance between the movable robot A and the person to the person by a voice from a voice outputting portion 62.Type: GrantFiled: April 1, 2004Date of Patent: June 23, 2009Assignee: Honda Motor Co., Ltd.Inventors: Yoshiaki Sakagami, Shinichi Matsunaga, Nobuo Higaki, Naoaki Sumida, Takahiro Oohashi
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Publication number: 20090148034Abstract: There is disclosed a mobile robot including an image processor that generates recognition information regarding a target object included in a taken image, and a main controller integrally controlling the robot based on this recognition information.Type: ApplicationFiled: December 3, 2008Publication date: June 11, 2009Applicant: Honda Motor Co., Ltd.Inventors: Nobuo Higaki, Ryujin Watanabe
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Patent number: 7533243Abstract: A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code “cc” that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant “const”. The content of the 4-bit operation field 52 is specified by a format code provided in the format field 51.Type: GrantFiled: May 22, 2002Date of Patent: May 12, 2009Assignee: Panasonic CorporationInventors: Shuichi Takayama, Nobuo Higaki
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Publication number: 20090059033Abstract: In an exposure controller of a camera mounted on a robot for taking an image utilizing incident light from external world in which an object such as a human being is present, a brightness histogram of the image is generated and exposure parameters are set based on the generated histogram. Then, it is determined whether the set exposure parameters are within a predetermined range and when they are out of the range and if a high-brightness imaging region is present in the image due to high-brightness incident light, it is again determined whether it is necessary to remove the high-brightness imaging region. When it is determined to be necessary, the high-brightness imaging region is extracted and is removed from the image, thereby enabling the camera to image the object with suitable brightness even when a bright light source such as the sun is within the camera angle of view.Type: ApplicationFiled: August 25, 2008Publication date: March 5, 2009Inventors: Takamichi Shimada, Nobuo Higaki
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Publication number: 20090063734Abstract: A bus controller capable of shortening the time required before a flush is completed so as not to degrade the performance of a processor. A bus controller includes: a FIFO for temporarily holding, on a first-in first-out basis, data to be stored from a processor into a memory; a flush pointer for holding a pointer which indicates end data held by the FIFO at a time when a trigger signal is received; a memory control unit for writing a portion of the data held by the FIFO into the memory according to the trigger signal so as to partially flush the FIFO, the portion ranging from start data through end data indicated by the flush pointer; and a wait circuit for generating a wait signal for a specific access instruction, which is executed by the processor, until the memory control unit completes the partial flush.Type: ApplicationFiled: February 27, 2006Publication date: March 5, 2009Applicant: MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD.Inventors: Kazushi Kurata, Nobuo Higaki
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Publication number: 20090037779Abstract: In response to a write request from a master to write to an external device, a control unit holds a write address and write data from the master in a write address holding unit and in a write data holding unit, respectively, outputs a reception signal to the master, and writes the write data to the external device specified by the write address. When the master holds the read address in the read address holding unit, the control unit reads data from the external device specified by the read address, and holds the read data in the read data holding unit.Type: ApplicationFiled: June 6, 2006Publication date: February 5, 2009Applicant: Matsushita Electric Industrial Co., Ltd.Inventors: Takao Kawakami, Masaitsu Nakajima, Tokuzo Kiyohara, Hiroyuki Morishita, Nobuo Higaki, Yousuke Kudo
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Patent number: RE41751Abstract: A processor can decode short instructions with a word length equal to one unit field and long instructions with a word length equal to two unit fields. An opcode of each kind of instruction is arranged into the first unit field assigned to the instruction. The number of instructions to be executed by the processor in parallel is s. When the ratio of short to long instructions is s-1:1, the s-1 short instructions are assigned to the first unit field to the s-1tA unit field in the parallel execution code, and the long instruction is assigned to the sth unit field to the (s+k?1)th unit field in the same parallel execution code.Type: GrantFiled: November 24, 2003Date of Patent: September 21, 2010Assignee: Panasonic CorporationInventors: Taketo Heishi, Tetsuya Tanaka, Nobuo Higaki, Shuichi Takayama, Kensuke Odani