Patents by Inventor Nobuo Nakamura

Nobuo Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7369169
    Abstract: An MOS-type solid-state imaging apparatus includes an imaging region formed by two-dimensionally arranging unit cells serving as photoelectric conversion portions on a semiconductor substrate, a plurality of vertical address lines arranged in a row direction of the imaging region to select a row of unit cells to be addressed, a plurality of vertical signal lines arranged in a column direction of the imaging region to read out signals from the unit cells in each column, a plurality of load transistors each connected to one end of each of the vertical signal lines, and a plurality of horizontal selection transistors each connected to the other end of each of the vertical signal lines.
    Type: Grant
    Filed: August 12, 2004
    Date of Patent: May 6, 2008
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshiyuki Matsunaga, Shinji Ohsawa, Nobuo Nakamura, Hirofumi Yamashita, Hiroki Miura
  • Publication number: 20080102554
    Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.
    Type: Application
    Filed: October 5, 2007
    Publication date: May 1, 2008
    Inventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
  • Publication number: 20080042175
    Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.
    Type: Application
    Filed: October 9, 2007
    Publication date: February 21, 2008
    Inventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
  • Publication number: 20080033077
    Abstract: The present invention has its object to provide a resin composition excellent in impact resistance, tensile properties and transparency using a plant-derived biodegradable polymer obtained by positive fixation of carbon dioxide on the earth and, moldings thereof, and, further, provide a resin composition and moldings thereof improved in processability and thermal stability. The present invention relates to a resin composition which comprises (A) an aliphatic polyester type biodegradable polymer and (B) at least one copolymer selected from the group consisting of composite rubber graft copolymers (b1) and core-shell type graft copolymers (b2); or, a resin composition which comprises (A) an aliphatic polyester type biodegradable polymer and (C) at least one compound selected from the group consisting of sorbitol compounds (c1) having a particular chemical structure and urea bond-containing substituted urea compounds (c2).
    Type: Application
    Filed: December 14, 2005
    Publication date: February 7, 2008
    Applicant: Kaneka Corporation
    Inventors: Yoshihiko Hashimoto, Taizo Aoyama, Nobuo Nakamura, Noriyuki Suzuki
  • Publication number: 20080029673
    Abstract: It is an object of the invention to provide a hanger with which a height position of an object can be adjusted easily after the object is hung in hanging the object by using wire rope. There is provided a hanger with wire rope inserted through a lock case and having a wire grip mechanism and a hook, in which a height position of the lock case with respect to the wire rope can be adjusted after the object is hung on the hook.
    Type: Application
    Filed: September 7, 2006
    Publication date: February 7, 2008
    Applicant: TAKIYA Co., Ltd
    Inventor: Nobuo Nakamura
  • Publication number: 20070235781
    Abstract: P type semiconductor well regions 8 and 9 for device separation are provided in an upper and lower two layer structure in conformity with the position of a high sensitivity type photodiode PD, and the first P type semiconductor well region 8 at the upper layer is provided in the state of being closer to the pixel side than an end portion of a LOCOS layer 1A, for limiting a dark current generated at the end portion of the LOCOS layer 1A. In addition, the second P type semiconductor well region 9 at the lower layer is formed in a narrow region receding from the photodiode PD, so that the depletion layer of the photodiode PD is prevented from being obstructed, and the depletion is secured in a sufficiently broad region, whereby enhancement of the sensitivity of the photodiode PD can be achieved.
    Type: Application
    Filed: June 5, 2007
    Publication date: October 11, 2007
    Inventors: Hiroaki Fujita, Ryoji Suzuki, Nobuo Nakamura, Yasushi Maruyama
  • Patent number: 7279712
    Abstract: Forming a back-illuminated type CMOS image sensor, includes process for formation of a registration mark on the wiring side of a silicon substrate during formation of an active region or a gate electrode. A silicide film using an active region may also be used for the registration mark. Thereafter, the registration mark is read from the back side by use of red light or near infrared rays, and registration of the stepper is accomplished. It is also possible to form a registration mark in a silicon oxide film on the back side (illuminated side) in registry with the registration mark on the wiring side, and to achieve the desired registration by use of the registration mark thus formed.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: October 9, 2007
    Assignee: Sony Corporation
    Inventors: Takashi Abe, Nobuo Nakamura, Keiji Mabuchi, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu, Hiroki Sato
  • Patent number: 7268812
    Abstract: A solid-state image pickup device and a pixel defect testing method thereof are disclosed. A solid-state image pickup device including: a pixel unit having a plurality of unit pixels that perform photoelectric conversion; a driving circuit for driving the pixel unit to control output of a pixel output signal; an output signal processing circuit for subjecting the pixel output signal outputted from the pixel unit according to the driving of the driving circuit to predetermined signal processing, and outputting a resulting pixel output signal; a pixel defect determining circuit for capturing the pixel output signal outputted from the pixel unit according to the driving of the driving circuit, and determining a pixel defect by comparing the pixel output signal with a predetermined reference signal; and a timing generator for supplying a predetermined operating pulse to the driving circuit, the output signal processing circuit, and the pixel defect determining circuit.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: September 11, 2007
    Assignee: Sony Corporation
    Inventors: Hiroki Sato, Nobuo Nakamura, Keiji Mabuchi, Takashi Abe, Tomoyuki Umeda, Hiroaki Fujita, Eiichi Funatsu
  • Patent number: 7227570
    Abstract: The invention makes it possible to perform effective A/D conversion on pixel signals read from a pixel array part, to achieve a reduction in power consumption and reductions in the size and the price of an image pickup device as well as simplification of the construction of the device, and to realize a high-quality image output. The device includes an pixel array part having a plurality of unit pixels, a CDS (correlated double sampling) circuit, and an A/D converter. A pixel signal read from a pixel array part via a signal line is subjected to CDS processing (noise elimination processing) in the CDS circuit, and then this pixel signal is inputted into the A/D converter which performs A/D conversion on the pixel signal. The A/D converter includes a ?? modulator and a digital filter to perform highly accurate A/D conversion. The invention can also be applied to a construction in which an A/D converter is provided at the front stage of the CDS circuit.
    Type: Grant
    Filed: June 2, 2003
    Date of Patent: June 5, 2007
    Assignee: Sony Corporation
    Inventors: Hiroki Sato, Keiji Mabuchi, Nobuo Nakamura, Tetsuya Iizuka
  • Publication number: 20070120990
    Abstract: The invention makes it possible to perform effective A/D conversion on pixel signals read from a pixel array part, to achieve a reduction in power consumption and reductions in the size and the price of an image pickup device as well as simplification of the construction of the device, and to realize a high-quality image output. The device includes an pixel array part having a plurality of unit pixels, a CDS (correlated double sampling) circuit, and an A/D converter. A pixel signal read from a pixel array part via a signal line is subjected to CDS processing (noise elimination processing) in the CDS circuit, and then this pixel signal is inputted into the A/D converter which performs A/D conversion on the pixel signal. The A/D converter includes a ?? modulator and a digital filter to perform highly accurate A/D conversion. The invention can also be applied to a construction in which an A/D converter is provided at the front stage of the CDS circuit.
    Type: Application
    Filed: January 19, 2007
    Publication date: May 31, 2007
    Applicant: Sony Corporation
    Inventors: Hiroki Sato, Keiji Mabuchi, Nobuo Nakamura, Tetsuya Iizuka
  • Patent number: 7224003
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Grant
    Filed: March 24, 2006
    Date of Patent: May 29, 2007
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 7118649
    Abstract: A loudspeaker diaphragm manufacturing apparatus of the present invention comprises; a paper tank, a pulp dispersion reservoir tank connected to the paper tank, a stirring means provided in the paper tank, a water inlet unit connected to the paper tank, a drain unit disposed under the paper tank, and a paper mold disposed at the bottom of the paper tank or in the drain unit, wherein a sectional area of the drain unit is larger than the plane area of the paper mold. The drain unit may be further provided with a water flow control plate in a draining direction of the paper mold. According to the manufacturing apparatus and the manufacturing method of the present invention, diaphragms with very uniform internal composition and diaphragms with intentionally varied internal composition in accordance with required sound characteristics can be mass-produced with good reproducibility.
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: October 10, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yukinori Morohoshi, Shinya Mizone, Nobuo Nakamura, Kazuto Nakamura
  • Patent number: 7113213
    Abstract: An image system uses an amplification-type MOS sensor for receiving an optical image through a photoelectric conversion element, converting the image into an electrical signal, and outputting the signal. This system includes an optical system for guiding this optical image to a predetermined position, an image processing means having a sensor for photoelectrically converting the optical image guided to the predetermined position by the optical system into an electrical signal in units of pixels, and a signal process device for processing an output from the image processing means, and outputting the resultant data.
    Type: Grant
    Filed: August 13, 2001
    Date of Patent: September 26, 2006
    Inventors: Yoshiyuki Matsunaga, Keiji Mabuchi, Shinji Ohsawa, Nobuo Nakamura, Hirofumi Yamashita, Hiroki Miura, Nagataka Tanaka
  • Publication number: 20060203113
    Abstract: When pixels are simply skipped while keeping both an order of pixel information and a spatial positional relation the same as those in all-pixel readout, since a distance between pixels to be read out increases, the Nyquist frequency decreases and aliasing noise increases. A 5×5 pixel block is set as a unit pixel block and pieces of pixel information in first, third, and fifth columns of first, third, and fifth rows of a pixel arrangement are added and outputted as an output in an ath row and an ath column of the unit pixel block. Then, pieces of pixel information in sixth, eighth, and tenth columns of the first, the third, and the fifth rows of the pixel arrangement are added and outputted as an output in the ath row and a bth column of the unit pixel block. Subsequently, pieces of pixel information are added and outputted up to a last column or a column near the last column.
    Type: Application
    Filed: February 20, 2004
    Publication date: September 14, 2006
    Inventors: Takamasa Wada, Eiichi Funatsu, Keiji Mabuchi, Ken Nakajima, Katsuaki Hirota, Nobuyuki Satou, Takashi Abe, Tomoyuki Umeda, Nobuo Nakamura, Hiroaki Fujita, Hiroki Sato
  • Publication number: 20060163684
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Application
    Filed: March 24, 2006
    Publication date: July 27, 2006
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Publication number: 20060164527
    Abstract: When pixel signals are separately read from a plurality of horizontal signal lines to achieve high-speed processing, color difference in image signals and stripes are eliminated. In the operation of reading the pixel signals from the (2n)th row, the pixel signals from R pixels on odd columns are output to an output system A through a horizontal signal line (60A). On the other hand, the pixel signals from Gr pixels on even columns are output to an output system B through a horizontal signal line (60B). In the operation of reading the pixel signals from the (2n+1)th row, the pixel signals from Gb pixels on the odd columns are output to the output system B through the horizontal signal line (60B) by the switching operation in a switching circuit (50). Similarly, the pixel signals from B pixels on the even columns are output to the output system A through the horizontal signal line (60A) by the switching operation in the switching circuit (50).
    Type: Application
    Filed: November 21, 2003
    Publication date: July 27, 2006
    Inventors: Takamasa Wada, Eiichi Funatsu, Keiji Mabuchi, Ken Nakajima, Takashi Abe, Tomoyuki Umeda, Nobuo Nakamura, Hiroaki Fujita, Hiroki Sato
  • Patent number: 7042061
    Abstract: The present invention provides a solid-state image pickup apparatus which is able to easily discharge signal charges in a signal accumulating section and which is free from reduction in the dynamic range of the element, thermal noise in a dark state, an image-lag and so forth even if the pixel size of the MOS solid-state image pickup apparatus is reduced, the voltage of a reading gate is lowered and the concentration in the well is raised. The solid-state image pickup apparatus according to the present invention incorporates a p-type silicon substrate having a surface on which a p+ diffusion layer for constituting a photoelectric conversion region and a drain of a reading MOS field effect transistor are formed. A signal accumulating section formed by an n-type diffusion layer is formed below the p+ diffusion layer. A gate electrode of the MOS field effect transistor is, on the surface of the substrate, formed between the p+ diffusion layer and the drain.
    Type: Grant
    Filed: December 5, 2003
    Date of Patent: May 9, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Nobuo Nakamura, Hisanori Ihara, Ikuko Inoue, Hidenori Shibata, Akiko Nomachi, Yoshiyuki Shioyama, Hidetoshi Nozaki, Masako Hori, Akira Makabe, Hiroshi Naruse, Hideki Inokuma, Seigo Abe, Hirofumi Yamashita, Tetsuya Yamaguchi
  • Patent number: 6999120
    Abstract: Disclosed is a solid-state imaging device comprising pickup circuit formed by the arrangement of a unit cell in two dimensions, a plurality of reading lines provided in a horizontal direction corresponding to each pixel row in the pickup region to transmit the reading drive signal ?READi for driving each reading circuit of the unit cell of respectively corresponding pixel row, a vertical drive selection circuit configured to drive the reading circuit by selectively supplying the reading drive signal to these reading lines, and first row selection circuit and a second row selection circuit configured to control the vertical drive circuit so as to drive reading circuit of each pixel row on the basis of the first pulse and the second pulse ?ROREAD and ?ESREAD respectively. The solid-state imaging device is capable of controlling a minimum electric charge accumulation time in the photodiode to less than 1H (a horizontal cycle) and is capable of conducting an extremely high-speed shutter operation.
    Type: Grant
    Filed: October 6, 2000
    Date of Patent: February 14, 2006
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yoshitaka Egawa, Shinji Ohsawa, Yukio Endo, Nobuo Nakamura
  • Patent number: D521913
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: May 30, 2006
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Nobuo Nakamura, Junichi Hashiba, Noriyuki Tanaka
  • Patent number: D539714
    Type: Grant
    Filed: February 15, 2005
    Date of Patent: April 3, 2007
    Assignee: Toyota Jidosha Kabushiki Kaisha
    Inventors: Masaki Toyama, Nobuo Nakamura, Junichi Hashiba